JPS5992608A - Power amplifier circuit - Google Patents

Power amplifier circuit

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Publication number
JPS5992608A
JPS5992608A JP57201890A JP20189082A JPS5992608A JP S5992608 A JPS5992608 A JP S5992608A JP 57201890 A JP57201890 A JP 57201890A JP 20189082 A JP20189082 A JP 20189082A JP S5992608 A JPS5992608 A JP S5992608A
Authority
JP
Japan
Prior art keywords
winding
output
transformer
amplifiers
outputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57201890A
Other languages
Japanese (ja)
Other versions
JPS6258166B2 (en
Inventor
Tetsuo Yoshida
哲雄 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP57201890A priority Critical patent/JPS5992608A/en
Publication of JPS5992608A publication Critical patent/JPS5992608A/en
Publication of JPS6258166B2 publication Critical patent/JPS6258166B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To eliminate the need for a transformer for composition by providing the 3rd winding to the output transformer of each power amplifier which combines outputs of plural power amplifiers and connecting all serial circuits of winding and resistances in parallel. CONSTITUTION:Bridge-connected amplifiers A1, A2, A3, A4, and A5 input the same excitation input IN-2 and send outputs to transformers T. Output windings of the transformers T are connected in series and their outputs are combined together and sent to an output terminal OUT. Resistances R for absorption are connected to the 3rd windings (n), which are connected in parallel; when the value of the absorbing resistance R is (RL/5).(n3/n2)<2>, the current flowing through the 1st winding n1 is proportional to only an input voltage e1, so isolation is attained. Therefore, the transformer for composition is unnecessary, so the size and weight are reduced and the number of amplifiers are selected optionally.

Description

【発明の詳細な説明】 本発明は、簡単にして多数の電力増幅器を合成可能な電
力増幅回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power amplifier circuit that can easily synthesize a large number of power amplifiers.

第1図は従来のブリッジ接続電力増幅器の合成による電
力増幅回路のブロック図であシ、図中、INLjは電源
端子、lN−2は励振入力端子、OUTは出力端子、T
−は高周波トランス、A、−%−A4は夫々ブリッジ接
続の電力増幅器(以下、単に増幅器と云う)である。又
、前記増幅器A1〜A4は夫々同一回路で構成されてお
り、例えば増幅器A1において、eは励振入力端子、B
は電源端子、T。
Fig. 1 is a block diagram of a power amplifier circuit formed by combining conventional bridge-connected power amplifiers. In the figure, INLj is a power supply terminal, lN-2 is an excitation input terminal, OUT is an output terminal, and T
- is a high-frequency transformer, and A and -%-A4 are bridge-connected power amplifiers (hereinafter simply referred to as amplifiers). Further, the amplifiers A1 to A4 are each composed of the same circuit. For example, in the amplifier A1, e is an excitation input terminal, and B is an excitation input terminal.
is the power terminal, T.

は励振トランス、Ql−QlはMOS FET 、 C
、はデカップリング用のコンデンサ、C2はカップリン
グ用のコンデンサ、(+)、(−)は逆相の関係にある
出力の得られる出力端子である。
is an excitation transformer, Ql-Ql is a MOS FET, C
, are decoupling capacitors, C2 is a coupling capacitor, and (+) and (-) are output terminals from which outputs having an opposite phase relationship are obtained.

ここで、上記増幅器A1において、励振入力端子eに入
力が与えられると、励振トランスToによってMOS 
FETであるQt〜Q4のダート・ソース間に励振電圧
が印加される。これにより、図示する励振トランスTo
の巻線の極性信号にしたがってQl  、QlおよびQ
2 、Q3が交互にオン。
Here, in the amplifier A1, when an input is given to the excitation input terminal e, the excitation transformer To causes the MOS
An excitation voltage is applied between the dirt sources of the FETs Qt to Q4. As a result, the illustrated excitation transformer To
Ql , Ql and Q according to the polarity signal of the winding of
2, Q3 is turned on alternately.

オフのスイッチング動作する。その結果、出力端子(+
)および(−)の相互間には電源端子Bの電源電圧を振
幅として励振入力端子eよりの励振入力の周波数で極性
切替えを行った波形が現われるのである。すなわち、交
流(高周波)に変換された出力が得られることになる。
Switching off works. As a result, the output terminal (+
) and (-), a waveform appears in which the amplitude is the power supply voltage of the power supply terminal B and the polarity is switched at the frequency of the excitation input from the excitation input terminal e. In other words, an output converted to alternating current (high frequency) is obtained.

次いで、この得られた出力は対接地形式ではないので対
応して配された高周波トランスTlで直流的に絶縁する
とともに、平衡−不平衡の変換を行う。この時、必要な
らばインピーダンス変成も行なわれ、又、増幅器A2〜
A4の夫々も既述と同様の動作が行なわれることは説明
するまでもない。
Next, since the obtained output is not of a ground type, it is isolated in terms of direct current by a correspondingly arranged high frequency transformer Tl, and is also subjected to balanced-unbalanced conversion. At this time, impedance transformation is also performed if necessary, and amplifiers A2 to
It goes without saying that each of A4 performs the same operation as described above.

上述の如くして増幅器AI %A4からの出力は、夫々
対応する高周波トランス’rl−’r4を経て対接地信
号として得られ、次いで、夫々の信号、この場合は4系
統の出力は合成されるのである。すなわち、各出力はT
12+Rt2とT’s< l R34およびT 123
41 R1234によ多構成されるハイブリッド合成回
路によって合成され、出力として出力端子OUTより得
られるのである。なお、前記説明中、T111 + T
 34 r T 1234はハイブリッド合成用の高周
波トランスであシ、R12* R34* R1234は
不平衡吸収用の抵抗である。
As described above, the output from the amplifier AI%A4 is obtained as a ground signal through the corresponding high frequency transformer 'rl-'r4, and then the respective signals, in this case, the outputs of the four systems are combined. It is. That is, each output is T
12+Rt2 and T's< l R34 and T 123
41 R1234 is synthesized by a hybrid synthesis circuit, and the output is obtained from the output terminal OUT. In addition, in the above description, T111 + T
34 r T 1234 is a high frequency transformer for hybrid synthesis, and R12*R34* R1234 is a resistor for unbalance absorption.

しかしながら、これまで述べたような回路構成では、 (1)  ブリッジ出力−不平衡出力変換の為の出カド
ランス(高周波トランスTI−T4 )の他に合成用の
ハイブリッドトランス(高周波トランスT 12 + 
T 34 +およびTl234)が必要となって回路構
成が複雑化するとともに、占有面積(体積)も大きくな
る。
However, in the circuit configuration as described so far, (1) In addition to the output transformer (high frequency transformer TI-T4) for converting bridge output to unbalanced output, a hybrid transformer for synthesis (high frequency transformer T12 +
T 34 + and Tl234) are required, which complicates the circuit configuration and increases the occupied area (volume).

(2)増幅器A−の数が2” (n = 1 、2 、
3 、− )の合成以外は合成の際に同一パワーでなく
なるのでその為の条件が増し、合成が容易でなくなる。
(2) The number of amplifiers A- is 2" (n = 1, 2,
Except for the combination of 3, -), the power is no longer the same during combination, so the conditions for this increase and the combination becomes difficult.

(3)適合負荷インピーダンスを一定として設計す乙と
、合成数(増幅器A−の数)が増す程、対応する高周波
トランスT−に要求されるインピーダンス比が大きくな
シ、多数の合成には不向きである。
(3) Design with a constant compatible load impedance, and as the number of combinations (number of amplifiers A-) increases, the impedance ratio required for the corresponding high-frequency transformer T- increases, making it unsuitable for multiple combinations. It is.

更に、第1図に示した例では、使用する高周波トランス
にT、−T4とT12 + T 34およびT1234
の3種類必要(合成する増幅器出力数の増加とともに増
す)と々る等、多くの問題があった。
Furthermore, in the example shown in Figure 1, the high frequency transformers used are T, -T4 and T12 + T34 and T1234.
There were many problems, such as the need for three types (which increases as the number of amplifier outputs to be synthesized increases).

本発明はこのような点に鑑みてなされたものであって、
ブリッジ出力−不平衡出力変換の為の出カドランスに3
巻線を適用し、合成回路を構成したものである。すなわ
ち、複数の増幅器よシ成広その出力を合成して動作する
電力増幅回路において、各増幅器対応に3巻線の出方ト
ランスを配し、更に、3巻線のうちの第1の巻線は夫々
対応する増幅器の出力を接続し、第2の巻線はその全て
を直列接続して電力増幅回路の出力端子とし、第3の巻
線は夫々に直列に吸収抵抗を挿入し、がっ、並列に接続
して構成したものであシ、このように構成したことによ
シ前述した従来技術の問題点の除去を図ったものである
。以下、図を用いて本発明を説明する。
The present invention has been made in view of these points, and
3 for output voltage for bridge output-unbalanced output conversion
A composite circuit is constructed by applying windings. That is, in a power amplifier circuit that operates by combining the outputs of multiple amplifiers, a three-winding output transformer is arranged for each amplifier, and the first winding of the three windings is are connected to the outputs of their corresponding amplifiers, the second windings are all connected in series to serve as the output terminals of the power amplifier circuit, and the third windings are each connected with an absorption resistor in series. , are connected in parallel, and this configuration is intended to eliminate the problems of the prior art described above. Hereinafter, the present invention will be explained using figures.

第2図は本発明に係る電力増幅回路の一実施例を示すブ
ロック図で、図中、A1〜A5は従来のそれと同様なブ
リッジ接続の増幅器であって、その数はここでは従来技
術では合成が容易でない数の5個である。Tは高周波の
出カドランスで3巻線よシ成るもので、その他は第1図
のものと同じである。更に、前記3巻線の出力トラ2ン
スTは増(5) 幅器A1〜A5に対応して配され、その第1の巻線nl
は高周波出力の得られる増幅器A、−A5の出力端に接
続されている。又、第2の巻線n2はその全てを直列接
続して出力端子OUTに至り、第3の巻線n3はその巻
き始めを全て共通に接続するとともに巻き終りを夫々吸
収抵抗Rで終端、換言すると第3の巻線n3は夫々吸収
抵抗Rを直列に挿入した上で並列接続されている。
FIG. 2 is a block diagram showing an embodiment of the power amplification circuit according to the present invention. In the figure, A1 to A5 are bridge-connected amplifiers similar to those of the conventional one; There are five, which is a difficult number. T is a high-frequency output transformer consisting of three windings, and the rest is the same as that in FIG. Further, the output transformer T having three windings is arranged corresponding to the amplifiers A1 to A5 (5), and the first winding nl
are connected to the output terminals of amplifiers A and -A5 which provide high frequency outputs. In addition, the second winding n2 has all its windings connected in series to reach the output terminal OUT, and the third winding n3 has its winding starts all connected in common, and the winding ends are each terminated with an absorption resistor R, in other words. Then, the third windings n3 each have an absorbing resistor R inserted in series and are connected in parallel.

ここで、出カドランスTが理想のトランスであるとする
と、吸収抵抗Rの値かのにおいては増幅器A1〜A5の
出力を単に直列接続したことに等価であシ、又、吸収抵
抗Rの値が零であれば第3の巻線n3が増幅器AI%A
5の出力電圧を等しくする如く作用するので増幅器A1
〜A5の出力を並列に接続したのと等価であることは明
らかである。
Here, if the output transformer T is an ideal transformer, the value of the absorption resistance R is equivalent to simply connecting the outputs of the amplifiers A1 to A5 in series, and the value of the absorption resistance R is equivalent to simply connecting the outputs of the amplifiers A1 to A5 in series. If it is zero, the third winding n3 is the amplifier AI%A
Amplifier A1 acts to equalize the output voltages of A1 and A1.
It is clear that this is equivalent to connecting the outputs of ~A5 in parallel.

次に、吸収抵抗Rの値をあらかじめ選択し、設定した場
合に、各増幅器A、%A5の負荷が互いにアイソレーシ
ョン特性を有し、ハイブリッド合成と等価の動作をする
ことを第3図を用いて説明(6) する。
Next, we will use Figure 3 to show that when the value of the absorption resistance R is selected and set in advance, the loads of each amplifier A and %A5 have isolation characteristics from each other, and the operation is equivalent to hybrid synthesis. Explain (6).

第3図は本発明の合成動作の原理を説明する説明図であ
って、図中、Tは第2図で示した出カドランスと同様の
3巻線の出カドランスであシ、ここでは理想トランスと
して論じる。又、夫々のトランスの第1の巻線nlには
入力電圧el、e2゜e3  + e4  # esが
供給され、第2の巻線n2は全て直列接続されて負荷抵
抗RLに接続され、更に第3の巻線n3は夫々巻線に直
列に吸収抵抗Rを挿入した上で全て並列接続している。
FIG. 3 is an explanatory diagram illustrating the principle of the synthesis operation of the present invention. In the figure, T is a three-winding output transformer similar to the output transformer shown in FIG. Discussed as. In addition, the input voltage el, e2゜e3 + e4 #es is supplied to the first winding nl of each transformer, and the second winding n2 is all connected in series to the load resistor RL, and the second winding n2 is connected in series to the load resistor RL. The windings n3 of No. 3 are all connected in parallel after an absorption resistor R is inserted in series with each winding.

なお、図中、吸収抵抗Rの共通接続点を接地しているが
、特に接地する必要があるわけではなく、その時の使用
状態に応じて使い分ければよいものである。
Note that although the common connection point of the absorption resistors R is grounded in the figure, it is not particularly necessary to ground it, and it may be used depending on the usage condition at that time.

ここで、以上の如く接続された回路における負荷抵抗R
Lの電圧eoは、 =  (et+ez+es+84+es)    ”(
1)1 となる。又、第2の巻線n2の共通接続点の電圧exは
\ となシ、これはN個の第3の巻線、この場合は5個の平
均電圧である。又、トランス1個の巻線の電流の関係式
として、負荷電流(あるいは第2の巻線の電流)をi0
s第1の巻線の電流を’Ltt 、第3の巻線の電流を
i31とすると、 to n2 = Zll nl  Zll n3   
  ”’(3)が成立する。更に、第3の巻線電流i3
1は、で求められ、負荷電流i6は、 で求められるのである。
Here, the load resistance R in the circuit connected as above
The voltage eo of L is = (et+ez+es+84+es) ”(
1) It becomes 1. Also, the voltage ex at the common connection point of the second winding n2 is \, which is the average voltage of the N third windings, in this case five. Also, as a relational expression for the current in one winding of a transformer, the load current (or the current in the second winding) is expressed as i0
sIf the current in the first winding is 'Ltt and the current in the third winding is i31, to n2 = Zll nl Zll n3
''(3) holds.Furthermore, the third winding current i3
1 can be found as follows, and the load current i6 can be found as follows.

次に、以上求めた各式(1)〜(5)において、(3)
式に(4) 、 (5)式を代入し、更に(1) 、 
(4)式を代入し、(2)式を代入すると、 ・・・(6) となシ、これよシ第1の巻線電流i+xを求めると、・
・・(7) となる。ここで、 の条件が成立すると、(eI+・・・十〇s)の項は消
去され、第1の巻線電流i11は入力電圧e、にのみ比
例することになる。すなわち、 の場合に各入力間にアイソレーションを有する合成回路
として動作することが理解される。
Next, in each equation (1) to (5) obtained above, (3)
Substitute equations (4) and (5) into equations, and then (1),
Substituting equation (4) and substituting equation (2), ...(6) To find the first winding current i+x,...
...(7) becomes. Here, if the following conditions are satisfied, the term (eI+...10 s) will be eliminated, and the first winding current i11 will be proportional only to the input voltage e. That is, it is understood that the circuit operates as a synthesis circuit with isolation between each input in the case of .

なお、前記(9)式中、Nは合成する増幅器の数で2.
3.4・・・であって、この場合は′5”となる。
Note that in the above formula (9), N is the number of amplifiers to be combined, which is 2.
3.4..., which in this case is '5''.

(9) 以上述べた説明から理解出来るように本発明によれば、 (1)  ブリッジ接続の増幅器の出力側に必ず接続さ
れる出カドランスの夫々に、第3の巻線を付加するのみ
で新たにハイブリッド合成用のトランスが不要であるの
で、スペースは小さく、回路が単純になるので、小型軽
量化、経済性および信頼性等の面で有効である。
(9) As can be understood from the above explanation, according to the present invention, (1) a new Since a transformer for hybrid synthesis is not required, the space is small and the circuit is simple, which is effective in terms of size and weight reduction, economy, and reliability.

(2)合成する増幅器の数(N)は従来のそれと較べて
特に制限されることはなく、例えば第2図。
(2) The number (N) of amplifiers to be combined is not particularly limited compared to the conventional one; for example, as shown in FIG.

第3図で説明の如き5合成等の実現が容易で、必要最低
限の合成数による最適設計が可能となる。
It is easy to realize five combinations as explained in FIG. 3, and it is possible to perform an optimal design using the minimum necessary number of combinations.

(3)合成特性については、各入力間のアイソレーショ
ンが保証され、周波数に依存する回路素子を使用してい
ないので広帯域トランスと同程度の広帯域特性が得られ
、更に、増幅器の合成数が増加してもそれら対応の出カ
ドランスの第2の巻線が直列接続されているので適合負
荷インピーダンスが低下せず、適度の巻数比のトランス
で実現出来る。
(3) Regarding synthesis characteristics, isolation between each input is guaranteed, and since no frequency-dependent circuit elements are used, wideband characteristics comparable to that of a wideband transformer can be obtained, and the number of amplifiers to be synthesized has increased. However, since the second windings of the corresponding output transformers are connected in series, the applicable load impedance does not decrease and can be realized with a transformer with an appropriate turns ratio.

(10) (4)  (9)式にて示す如く第3の巻線によシ吸収
抵抗Rの抵抗値が選択出来、しかも同一定格のものを合
成数用意すればよいので、構成素子の標準化が図れる。
(10) (4) As shown in equation (9), the resistance value of the absorbing resistor R can be selected by the third winding, and it is only necessary to prepare a composite number of the same rating, so the component elements can be standardized. can be achieved.

(5)吸収抵抗の一方の端子を接地することが出来るの
で、一般的な終端用のダミーロード等が利用出来、不平
衡の検出等も容易に出来る。
(5) Since one terminal of the absorption resistor can be grounded, a general dummy load for termination can be used, and unbalance can be easily detected.

等の優れた効果が期特出来るのである。Excellent effects such as these can be obtained.

第4図は本発明に係る電力増幅回路の他の実施例を示す
回路図で、既述の5個の増幅器の合成とは異なシ、2個
以上の任意の数の増幅器出力の合成の場合を示すもので
、N個の場合の吸収抵抗値Rは既述した第1の実施例の
場合と同様の計算によシ で求められる。
FIG. 4 is a circuit diagram showing another embodiment of the power amplifier circuit according to the present invention, which is different from the combination of five amplifiers described above, and is a case of combining the outputs of any number of two or more amplifiers. The absorption resistance value R in the case of N number of elements can be obtained by the same calculation as in the first embodiment described above.

又、第4図に示す回路では、ブリッジ出力の平衡−不平
衡変換特性の改善あるいは出カドランスTの出力を直列
接続した場合の巻線間のストレー容量による要影響を軽
減させる為に平衡度改善用のトランスTBを用いている
が、既述の如き本発明の効果を損うものではない。更に
、夫々の増幅器A、−A5の電源端子および励振端子を
lN11゜lN−12+ ”’ IN−I nおよびl
N−21+ lN−22”’ lN−2nの如く図示し
ない独立した電源や変調器より電源を供給し、および図
示しない独立した励振回路より励振する如く構成してい
るが、この場合でも第1の実施例のそれと同様に動作す
るもので、何ら問題を生ずることはない。増幅器A、−
A5についても、第1の実施例同様、ブリッジ接続の増
幅器であるが、その増幅素子は所定の機能を備えていれ
ばよく、第1図で示した回路構成に限定されるものでは
ない。
In addition, in the circuit shown in Figure 4, the degree of balance is improved in order to improve the balanced-unbalanced conversion characteristics of the bridge output or to reduce the effect of stray capacitance between windings when the outputs of output transformers T are connected in series. Although a conventional transformer TB is used, this does not impair the effects of the present invention as described above. Furthermore, the power supply terminal and excitation terminal of each amplifier A, -A5 are connected to lN11゜lN-12+ ''' IN-I n and l
The configuration is such that power is supplied from an independent power supply or modulator (not shown) such as N-21+ lN-22"' lN-2n, and excitation is provided by an independent excitation circuit (not shown), but even in this case, the first It operates in the same manner as in the embodiment and does not cause any problems.Amplifiers A, -
Similarly to the first embodiment, A5 is a bridge-connected amplifier, but its amplifying element only needs to have a predetermined function, and is not limited to the circuit configuration shown in FIG.

なお、以上述べた吸収抵抗Rの値については、必ずしも
計算値に等しいものを使用する必要はなく、許容範囲に
おいて意図的に計算値よシ変化させ、直列接続または並
列接続に近い合成特性で使用することも可能で、特に説
明するまでもない事項である。
Regarding the value of the absorption resistance R mentioned above, it is not necessarily necessary to use a value equal to the calculated value, but it is possible to intentionally vary it from the calculated value within the allowable range and use it with a composite characteristic similar to series connection or parallel connection. It is also possible to do so, and there is no need to specifically explain it.

以上、詳細に述べて来たように本発明によれば、任意の
数のブリッジ接続の増幅器を容易に合成出来るので、素
子損失の大きな(例えば100ワット級)素子を用いて
大電力を得る必要のある固体化電力増幅回路による高出
力ラジオ放送機器等に利用可能で、これまで述べて来た
優れた効果が期特出来るのである。
As described above in detail, according to the present invention, any number of bridge-connected amplifiers can be easily synthesized, so there is no need to use elements with high element loss (for example, 100 watt class) to obtain large power. It can be used in high-output radio broadcasting equipment using certain solid-state power amplifier circuits, and the excellent effects described above can be expected.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のブリッジ接続電力増幅器の合成による電
力増幅回路を示すブロック図、第2図は本発明に係る電
力増幅回路の一実施例を示すブロック図、第3図は本発
明の合成動作の原理を説明する回路図、第4図は本発明
に係る電力増幅回路の他の実施例を示すブロック図であ
る。 ■N1+lN−11+lN−12+ ”・lN−Inは
電源端子、 lN−2゜lN−21,lN−22,−I
N−2nは励振入力端子、OUTは出力端子、A、#A
、は増幅器、Tは高周波の出カドランス、Rは吸収抵抗
、TBは平衡度改善用のトランスである。 (13) 手続補正書(自発) 58.37 昭和  年  月  日 特許庁長官 殿 1、事件の表示 昭和57年 特 許 願第201890 号2、発明の
名称 電力増幅回路 3、補正をする者
FIG. 1 is a block diagram showing a power amplifying circuit by combining conventional bridge-connected power amplifiers, FIG. 2 is a block diagram showing an embodiment of the power amplifying circuit according to the present invention, and FIG. 3 is a combining operation of the present invention. FIG. 4 is a block diagram showing another embodiment of the power amplifier circuit according to the present invention. ■N1+lN-11+lN-12+ ”・lN-In is the power supply terminal, lN-2゜lN-21, lN-22, -I
N-2n is the excitation input terminal, OUT is the output terminal, A, #A
, T is an amplifier, T is a high frequency output transformer, R is an absorption resistor, and TB is a transformer for improving balance. (13) Procedural amendment (voluntary) 58.37 Director General of the Japan Patent Office (Monday/Monday) 1. Indication of the case 1982 Patent Application No. 201890 2. Name of the invention Power amplifier circuit 3. Person making the amendment

Claims (1)

【特許請求の範囲】 複数の電力増幅器出力を合成して動作する電力増幅回路
において、 逆相の関係にある出力を夫々対応の端子相互間より得る
ブリッジ接続の電力増幅器と、該ブリッジ接続の電力増
幅器に対応して3巻線の出カドランスを配して成り、し
かも3巻線の出カドランスの第1の巻線は夫々対応のブ
リッジ接続の増幅器の出力に接続し、第2の巻線はその
全てを直列接続して出力端子と成し、第3の巻線は夫々
に直列に吸収抵抗を挿入するとともに全て並列接続して
構成したことを特徴とする電力増幅回路。
[Scope of Claims] A power amplifier circuit that operates by combining the outputs of a plurality of power amplifiers, comprising: a bridge-connected power amplifier that obtains outputs in an opposite phase relationship between corresponding terminals; and a power amplifier of the bridge connection. A three-winding output transformer is arranged corresponding to the amplifier, and the first winding of the three-winding output transformer is connected to the output of the corresponding bridge-connected amplifier, and the second winding is connected to the output of the corresponding bridge-connected amplifier. A power amplifier circuit characterized in that all of the windings are connected in series to form an output terminal, and the third winding is configured by inserting an absorption resistor in series with each winding and connecting all of them in parallel.
JP57201890A 1982-11-19 1982-11-19 Power amplifier circuit Granted JPS5992608A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57201890A JPS5992608A (en) 1982-11-19 1982-11-19 Power amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57201890A JPS5992608A (en) 1982-11-19 1982-11-19 Power amplifier circuit

Publications (2)

Publication Number Publication Date
JPS5992608A true JPS5992608A (en) 1984-05-28
JPS6258166B2 JPS6258166B2 (en) 1987-12-04

Family

ID=16448524

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57201890A Granted JPS5992608A (en) 1982-11-19 1982-11-19 Power amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5992608A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08256027A (en) * 1995-01-13 1996-10-01 Tektronix Inc Device and method for amplifying and insulating separative route
JP2017509224A (en) * 2014-01-27 2017-03-30 日本テキサス・インスツルメンツ株式会社 Systems, methods, and devices for power amplification of signals in integrated circuits

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7232067B2 (en) 2019-02-07 2023-03-02 株式会社ジェイテクト motor controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08256027A (en) * 1995-01-13 1996-10-01 Tektronix Inc Device and method for amplifying and insulating separative route
JP2017509224A (en) * 2014-01-27 2017-03-30 日本テキサス・インスツルメンツ株式会社 Systems, methods, and devices for power amplification of signals in integrated circuits

Also Published As

Publication number Publication date
JPS6258166B2 (en) 1987-12-04

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