JPS5984939U - Noise reduction circuit for magnetic recording and reproducing devices - Google Patents

Noise reduction circuit for magnetic recording and reproducing devices

Info

Publication number
JPS5984939U
JPS5984939U JP17858882U JP17858882U JPS5984939U JP S5984939 U JPS5984939 U JP S5984939U JP 17858882 U JP17858882 U JP 17858882U JP 17858882 U JP17858882 U JP 17858882U JP S5984939 U JPS5984939 U JP S5984939U
Authority
JP
Japan
Prior art keywords
noise reduction
magnetic recording
reduction circuit
level
reproducing devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17858882U
Other languages
Japanese (ja)
Inventor
達郎 白井
Original Assignee
日本ビクター株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本ビクター株式会社 filed Critical 日本ビクター株式会社
Priority to JP17858882U priority Critical patent/JPS5984939U/en
Publication of JPS5984939U publication Critical patent/JPS5984939U/en
Pending legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の雑音低減回路の一例の記録時の周波数特
性図、第2図は本考案雑音低減回路の一実施例のブロッ
ク系統図、第3図は第2図示の回路の記録時の周波数特
性図である。 1・・・入力端子、2,7・・・コンパンダ、3・・・
バッファ、4.8・・・演算増幅器、5・・・可変イン
ピーダンス回路、6.11・・・制御回路、9・・・可
変高域フィルタ、10・・・高域ブイルタ、12・・・
出力端子、81〜ミ10・・・スイッチ。□
Figure 1 is a frequency characteristic diagram of an example of a conventional noise reduction circuit during recording, Figure 2 is a block diagram of an embodiment of the noise reduction circuit of the present invention, and Figure 3 is a diagram of the circuit shown in Figure 2 during recording. It is a frequency characteristic diagram. 1...Input terminal, 2,7...Compander, 3...
Buffer, 4.8... Operational amplifier, 5... Variable impedance circuit, 6.11... Control circuit, 9... Variable high-pass filter, 10... High-pass filter, 12...
Output terminal, 81 to Mi10... switch. □

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 供給される信号を全帯域にわたり該供給される信号のレ
ベルに応じてレベルの圧縮又は伸張を行なう第1のコン
パンダと、供給される信号をその中・高域について該中
・高域の信号のレベルに応じてレベルの圧縮又は伸張を
行なう第2のコンパンダとを互いに縦続接続してなり、
記録時に入来する信号を該第1及び第2のコンパンダで
圧縮し、再生時に再生された信号を該第1及び第2のコ
ンパンダで伸張するよう構成してなる磁気記録再生装置
の雑音低減回路。
A first compander compresses or expands the level of the supplied signal over the entire band according to the level of the supplied signal; A second compander that compresses or expands the level according to the level is connected in cascade with each other,
A noise reduction circuit for a magnetic recording/reproducing device, which is configured to compress an incoming signal during recording using the first and second companders, and expand the reproduced signal during playback using the first and second companders. .
JP17858882U 1982-11-26 1982-11-26 Noise reduction circuit for magnetic recording and reproducing devices Pending JPS5984939U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17858882U JPS5984939U (en) 1982-11-26 1982-11-26 Noise reduction circuit for magnetic recording and reproducing devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17858882U JPS5984939U (en) 1982-11-26 1982-11-26 Noise reduction circuit for magnetic recording and reproducing devices

Publications (1)

Publication Number Publication Date
JPS5984939U true JPS5984939U (en) 1984-06-08

Family

ID=30387694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17858882U Pending JPS5984939U (en) 1982-11-26 1982-11-26 Noise reduction circuit for magnetic recording and reproducing devices

Country Status (1)

Country Link
JP (1) JPS5984939U (en)

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