JPS5982924U - timer device - Google Patents

timer device

Info

Publication number
JPS5982924U
JPS5982924U JP17870382U JP17870382U JPS5982924U JP S5982924 U JPS5982924 U JP S5982924U JP 17870382 U JP17870382 U JP 17870382U JP 17870382 U JP17870382 U JP 17870382U JP S5982924 U JPS5982924 U JP S5982924U
Authority
JP
Japan
Prior art keywords
power supply
timer
switch
circuit
supply circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17870382U
Other languages
Japanese (ja)
Inventor
仁宏 藤山
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP17870382U priority Critical patent/JPS5982924U/en
Publication of JPS5982924U publication Critical patent/JPS5982924U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、電子機器に接続し、かつバックアップ機能を
備えた従来のタイマー装置のブロック図、第２図は本考
案の実施例による、バックアップ機能を備えたタイマー
装置のブロック図である。 主な図番の説明、１・・・電源回路、２・・・バックア
ップ電源、３・・・タイマー回路、５・・・電源トラン
ス、６・・・第１のスイッチ、７・・・第２のスイッチ
、９・・・タイマー用リセットスイッチ。FIG. 1 is a block diagram of a conventional timer device connected to an electronic device and equipped with a backup function, and FIG. 2 is a block diagram of a timer device equipped with a backup function according to an embodiment of the present invention. Explanation of main drawing numbers, 1...Power supply circuit, 2...Backup power supply, 3...Timer circuit, 5...Power transformer, 6...First switch, 7...Second switch, 9... timer reset switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子機器に設けたタイマー装置において、第１のスイッ
チを入力端に設けた電源回路と、該電源回路に接続され
たバックアップ電源と、前記電源回路に接続したタイマ
ー回路と、該タイマー回路に接続した電子機器とより成
り、前記第１のスイッチに連動する第２のスイッチを前
記電源回路と前記バックアップ電源との間に設けたこと
を特徴とするタイマー装置。A timer device installed in an electronic device includes a power supply circuit having a first switch at an input end, a backup power supply connected to the power supply circuit, a timer circuit connected to the power supply circuit, and a timer circuit connected to the timer circuit. 1. A timer device comprising an electronic device, characterized in that a second switch interlocked with the first switch is provided between the power supply circuit and the backup power source.
JP17870382U 1982-11-25 1982-11-25 timer device Pending JPS5982924U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17870382U JPS5982924U (en) 1982-11-25 1982-11-25 timer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17870382U JPS5982924U (en) 1982-11-25 1982-11-25 timer device

Publications (1)

Publication Number Publication Date
JPS5982924U true JPS5982924U (en) 1984-06-05

Family

ID=30387913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17870382U Pending JPS5982924U (en) 1982-11-25 1982-11-25 timer device

Country Status (1)

Country Link
JP (1) JPS5982924U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5747832B2 (en) * 1980-06-10 1982-10-12

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5747832B2 (en) * 1980-06-10 1982-10-12

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