JPS5977490A - Electronic equipment with non-volatile display means - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to electronic equipment that can extend the life of non-volatile display means.

Conventionally, the display method for this building was generally to display from the rightmost girder to the leftmost girder.

That is, as shown in FIG. 91, the display contents are changed while sequentially carrying up from the rightmost digit toward the left.

However, the lifespan of display materials such as L1 electrochromic display materials tends to be shortened as the number of times the display content is switched increases.

Therefore, if the display method according to the present invention shown in FIG. 9H is adopted, the number of display switching times will be drastically reduced. That is, in the case of FIG. 9 1,
The same number of display switches is required at the rightmost digit, but the 9th
In the case of FIG. 1, the number of display switching times for the leftmost digit is zero.

An object of the present invention is to provide an electronic device with a non-volatile display means that has a function of preventing a decrease in the life of the non-volatile display means.

A good example of the nonvolatile display means used in the present invention is an electrochromic material.

This electrochromic apricot is a general term for substances exhibiting a phenomenon in which the color is developed by the application of electricity, and the color is reversibly erased and painted by the application of electricity, the application of reverse polarity 111, heating, or a combination of the two.

Although the mechanism that causes electrochromy is not necessarily single, it is often thought to be a so-called redox reaction between an electrolyte and a coloring substance. In this case, the electrolyte and the coloring substance are not necessarily mutually exclusive. The same substance can be a color-forming substance and an electrolyte at the same time. or,
From another point of view, as in the case of photochromy, there is a view that the light absorption characteristics change due to the injection of injected electrons into the color center, but in reality, electrochromy is the result of a combination of these It is understood that a phenomenon is occurring.

Since electrochromy electrically changes the inherent color of a material, the combinations of colors are diverse. Furthermore, whether a material can transmit light, reflect light, or scatter light is not determined by the properties of the material itself, but rather by the method of constructing the electrochromic layer. Both types have the property of being configurable.

In addition to these configurations and the above-mentioned diversity, there are also materials that have a memory property in which coloring continues even without power being supplied after coloring occurs until it is erased, and there are also materials whose coloring changes in response to the applied voltage value. In recent years, research has been actively conducted on this method, as it can be used in a wide variety of applications.

Typical display cell configurations include (1) one in which an electrochromy (hereinafter abbreviated as EC) layer is energized between a surface electrode and a needle electrode, and (2) one in which an ICc layer is energized between a surface electrode. At least one of the electrodes may be an appropriate patterned electrode (example in Figure 4).
3) Although the EC layer is provided between the two plane electrodes, the EO°
A layer (for example, a photoconductor layer) that can change from an electrically non-conductive state to a conductive state depending on an external signal is provided between the layer and at least one electrode, realizing a conductive state in a pattern. It is desirable to have the property that it can be used.

Typical application examples include those used in electronic desktop calculators and time d tens as numeric display elements, character/symbol display elements, etc., and as display elements for displaying general images.
For example, those used for bulletin boards, weather map display boards, road sign display boards, X-ray video display boards, etc. Also, soft facsimile displays that can be erased and reused for recording optical shutters or facsimile signals, similar to blackboards. There are writing boards that can be written on and erased.

There is a wide range of materials used for XC, including organic and inorganic substances. All of these can be used in the present invention. EC materials often consist of a combination of color former and electrolyte, but single materials are also known.

These known materials are shown, for example, in British Patent No. 1,186,541.

The method of forming xojl, especially the method of forming the coloring layer, includes
Various methods can be applied to form thin or thick films.

Typical methods are vacuum evaporation, sputtering, CvD (Oh
It is an abbreviation for chemical vapor deposition, and is known as a method of performing vapor phase growth by decomposing or reacting chemical substances. ), spraying, coating, printing such as screen printing, etc. Vacuum evaporation and sputtering are suitable for forming thin films and transmission type L10VD can be used for engraving a wide range of layers from thin films to thick films. Generally, when forming a transmission type layer, the layer thickness is selected within the range of several microns to several hundred angstroms, but a preferred range is several microns to 1000 angstroms. Also, the scattering-reflection type layer is selected to have a thickness in the range of several hundred microns to several thousand angstroms. The preferred range is 100 microns to 1 micron. Even if the layer thickness is the same, depending on the manufacturing method and manufacturing conditions, it is possible to create either a transmissive type or a reflective type. It has unprecedented display properties in that it can display images as easily as printed matter.

An embodiment of the non-volatile display means used in the present invention has a structure as shown in FIG. A metal electrode 4 is provided on another transparent glass plate 3 facing the glass plate, and an electrochromic layer 6 and an electrolyte 7 are provided between the two glass plates with an insulating spacer 5 interposed therebetween. It is.

Therefore, when displaying numbers, etc., the voltage of the power source 9 is applied between both electrodes 4 and 6 using the switch 8, the electrochromic single layer is colored, and the difference between the colored part and the non-colored part is observed by the observer.
0 identifies.

To erase the color, operate the switch 11 to connect the power source 12 opposite to the power source 9, and drive with reverse polarity.

Here, as the transparent electrode, indium oxide (In20
3), tin oxide (5n02) v Gold (Au), silver (Ag), aluminum (h, lJ), etc. are used as the metal electrode. Electrochromic substances include, for example, titanium oxide (T102), tungsten oxide (WOs) + magnesium oxide (Mg0), antimony oxide (Sb, 03), silver oxide (Ag2O), iridium sulfide (S), etc. , cobalt oxide (0o20
．． ), mercuric sulfide (HgS), etc., and as an electrolyte, for example, Ca? , , β-At, O, , BaTi0. There are also products in which these are dispersed in resin. Also other memorability. G as a certain substance 6,7
Irregular ferroelectric materials such as d2 (Mo 04 )3 and its isomorphs, presteryl nonanoate, cholesteryl chloride, and cholesteryl cinnamate at 70:25 each
It is possible to use cholesteric liquid crystal which is encapsulated by mixing the liquid crystal at a ratio of 5 and other non-volatile liquid crystals.

The present invention uses a low power consumption semiconductor circuit section (for example, a CMOB-complementary metal oxide semiconductor, etc.) to control the display of such non-volatile display means, and also performs the internal clearing operation of this semiconductor circuit and the above-mentioned One of the features is that the clearing operation of the nonvolatile display means is configured to be performed by a single clear command generation means.

In Fig. 2, Fig. 1 or the above (i) + fz+,
A basic block diagram of an electronic device according to the present invention is shown using non-volatile display means of type (3). In the figure, D is a display section including the above-mentioned non-volatile display means, B is a power supply operation section, ps is a power on/off system (all switch), and L is for drive control of the non-volatile display section and other data processing. This control section includes a semiconductor circuit section, and this circuit section is non-volatile (synonymous with memory, meaning that even if the power supply is cut off, the stored contents will not be destroyed and will be preserved). (This is the same as the explanation for the non-volatile display means.) or volatile display means, but in this example, for the time being,
Assuming a volatile circuit, I configured it entirely with 0MO8) transistors. K is a manual operation unit for manually inputting various commands.The controller is configured so that various data processing can be performed by the control unit and display observation can be performed by the display unit by inputting various commands from this K. It is. A specific example of this figure 2 is a small electronic calculator.

For electronic devices such as microreaders, copiers, cameras, etc.
K each has numerical values and function keys, search command key, copy command key, shutter button, film winding lever, etc., and L each has four arithmetic operations and display control circuit, film and optical system and their drive control digital circuit, and photosensitive. It has a drum, its drive control digital circuit, exposure control digital circuit, etc., and each D is a non-volatile multi-digit numeric display device, a non-volatile film image projection section, a non-volatile editing drum, and a non-volatile one in the finder. It will have a gender display means, etc. B is a power on/off control unit common to all electronic devices. Further, the specific coupling relationship shown in FIG. 2 is common to any of the other electronic devices mentioned above. That is, various commands are input from the manual operation section K to the control section through input lines 11-14. Line 15 is a power supply line for supplying power to the control section and manual operation section K'IC'ffI power source P2. Lines 16, 1!7 are paths for supplying image information to the non-volatile display. Line 19 is a path for selecting clear signals generated at various timings from the control section to clear the non-volatile display section. The line 111 is a power supply line for supplying the power supply voltage P1 to the display section, and the line 11O is the power supply voltage P1 of the line 111.
This is a control line that carries commands from the control unit to turn on and off at various timings. Let us now briefly explain the operation of an electronic device having an embodiment in which the content displayed on a non-volatile display section is memorized and saved even when the power switch PS is turned off. The new operator did not need the information content used and displayed by the previous operator. At this time, when the power switch ps is turned on, the power supply voltage P2 is supplied to each control part through the power supply line 15 to the operating part, and the power supply voltage PI is supplied to the surface part through the power supply line 111. Now, the supply voltage P2 on line 15 can also cause a clear circuit included in the control to operate for a certain period of time.

Therefore, the clear circuit operates to control registers in semiconductor circuits, especially digital circuits.

Clear counters, etc., reset flip-flops, etc. The technology up to this point, commonly known as a power clear mechanism (a mechanism for clearing and resetting the internal circuit at the same time as the power switch ps is turned on), is well known and commonly used, so a detailed explanation will be omitted. One point to which this embodiment takes care is to also clear the previous image information stored in the non-volatile display section in connection with the clearing operation of the internal circuit of the control section. That is, the supply box 1 pressure P2 on the line 15 activates the above-mentioned clear circuit or another clear circuit in the control section to clear the display contents of the non-volatile display section through the line 19. This clear signal is preferably a clear pulse with the opposite polarity to the writing time in the case of the above-mentioned electrochromic material or irregular ferroelectric material, and is preferably a high-frequency pulse that is sufficient to erase the material in the case of liquid crystal, etc. . Further, in the case of substances that are cleared by heat, light, etc., the cleaning may be done through the passage 19. In short, any signal that can clear the non-volatile display quality is fine.
An optimal configuration may be provided depending on the physical properties.

Conventionally, when the power switch of an electronic calculator using a volatile display material (such as a light emitting diode) is turned on, the display register, counter, flip-flop, etc. are all cleared and reset as described above. Therefore, the display device has the content of the cleared display register, i.e. ooo]oo
is displayed, or in computers with a built-in unnecessary zero display suppression mechanism, the display device becomes completely black (W), or only one digit (0), such as ([0), is lit. However, this is just the result of clearing only the contents of the register, and the display device itself is not equipped with a line 19 or the like to which a clear signal should be applied. That is, the scope of the term "clearing operation of a nonvolatile display section" used in this specification according to the present invention does not include the above matters. Further, the line 19 of the present invention is unnecessary for the above-mentioned electronic equipment using the conventional volatile display section. Now, as described above, since the internal control circuit and the non-volatile display section can be cleared at once by turning on a single power switch ps, an extremely favorable mode of operation can be presented.

Furthermore, since a clear key dedicated to the display section is not required, it is obvious that it is easy to achieve low cost and miniaturization. Next, a configuration may be considered in which the nonvolatile display section is cleared when the power switch ps is turned off, and this is shown in FIG. That is, if the capacitor 0 is charged from the supply voltage P2 or the like while the electronic device is in use, and the switch S is closed in succession with turning off the power switch ps, the line A12 is charged.

Since a closed circuit is formed by I13, the discharge current of the capacitor C flows into the non-volatile display section, and if the polarity is reversed to that during writing, it can be successfully cleared. If the semiconductor circuit in this control section is volatile, it will of course store random numbers or be in an undefined state. However, if the configuration shown in Figure 2 is used for this part, the semiconductor circuit will be cleared when the power switch is turned on.

It can be reset and used normally. The timing of other clears is similar to line 19 in Figure 2, and of course can be done on line 7.

In addition, the non-volatile display section was cleared as appropriate at various other timings by going to "FIG. 2". In addition to this, the control for the non-volatile display section was carried out on line 19, but in addition to this, the characteristic control of the present invention, that is, the supply to the non-volatile display section r4H
E P 1 can be turned on and off by an appropriate timing signal on the control line 15.

In other words, it is ideal for various electronic devices, such as automatically determining whether the display is complete within the control unit, and when detected, running a control signal on line 15 to set Pl to 0, or as a computation completion signal, immediately after turning on the power switch PS, etc. It is possible to stop the supply of the supply voltage P1 at the timing of .

The electronic device of the present invention will be described below in the case of an electronic pocketable computer in which most of the control section is composed of semiconductor circuits such as CMO8. Figure 4 shows the basic cell in Figure 1 with numerical representation 'aD.
sP, and the non-volatile numeric display DSP shown in FIG. 4 is installed in the output display section of a small electronic calculator as shown in FIG.

The battery E1 in the power supply section B is for driving the non-volatile display section (12 is for driving one control section on the keyboard, and PS is an interlocking power switch, but it is preferable when aiming for greater safety and reliability. However, the battery E1 may be left connected to the emitter of the transistor Tr without any particular interlocking.The transistor controls on/off control of the supply voltage P1 to the display section.In the control section, 21-24 are connected to the emitter of the transistor Tr. SR type tough flip-flops 25, 26, and 27 are edge trigger type flip-flops that are set at the rising edge of a pulse; 28 to 30 are delay circuits that each delay a predetermined time; 31
~43 and 91~98.99 are A, ND gate, 5]7
56 are OR gates, and 61 to 68 are inverters, which are connected as shown in the figure.

13 is an ordinary computer arithmetic circuit; in particular, R is an input or display register that stores numerical signals from a group of numerical keys on the keyboard; The signal is applied to a converter 73 including a decimal decoder, a 7-segment code encoder, etc., and is amplified by a segment driver circuit 74. 71 is a digit pulse generator that is triggered by a signal from the arithmetic circuit 13 and sequentially generates digit pulses TDl to TD8;
~98 is an AND gate that controls the digit pulse generated at 71 with a signal pin, and 72 is A! JD Gate 9], ~98
A digit pulse driver circuit amplifies the digit pulses TDI to TD8 that have been superimposed i, respectively, and sequentially drives the digits and poles D1 to D8 of the display DSP. Segment driver circuit 74 is commonly connected to the same segment of each digit. These structures are almost the same as a time-division dynamic display device using a normal volatile display section. However, since the display material is non-volatile, normal time-division scanning (digit pulses are TDI and TD2).

---1TD8 are generated sequentially, and when register error R completes one cycle, all digits are displayed, and this does not disappear.II) At 1, the next second scan, ie, TDl-TD8, a second round circulation operation of the register is performed. ) has the advantage that it only needs to be done once.

In the above configuration, from keyboard K to old field]
When performing calculations that are input in the order of numbers, the on/off operation of the set outputs FINF4, supply voltage PL, and P2 of the flip-flops 21 to 24 (on = 1.off 20) and the operation of the display section are as follows. It will look like the following table. This example is an embodiment in which the displayed content (eg, the previous calculation result 56) does not disappear even if the power switch is turned off.

Below, according to this status table, Japan on -) Country → Country → (2) →
An example of the operation will be explained as follows: 1st → 11th → 11th → "JEU off".

■ When the interlocking power switch ps of the N-buchi operation part B is turned to the on side terminal, the supply voltage P of the battery E2 is supplied to the volatile control part, and this voltage P, which is turned off, is also supplied to the clear circuit 14, Therefore, the clear circuit 14 operates and distributes the all clear signal CO to the control section to reset all of the free lag flops (hereinafter abbreviated as FF) 22 to 27. This all-clear signal CO is naturally applied to the arithmetic circuit 13, and clears and resets most of the register R1 and other registers, counters, FFs, etc. This clear circuit 14 can be constructed from a known circuit. Further, a certain counter tFF may be preset. In other words, F'?
21 is once set by the all-clear signal CO, and then reset after passing h a delay time r1 routine.

It is also easy to use a conventional technique in which one digit of the DSP display, such as DSI i, D38, is colored to indicate that the power switch has been turned on. The output F1 of this FF21 is input to the base of the transistor Tr via the amplifier circuit A1 resistor r1 of the Mf1 source section B, and the output F1 is input to the base of the transistor Tr. Therefore, when Fl-0 is reached, the transistor Tr is turned on and the supply voltage PL is applied to the display section. Since the FF2526.2'7 is configured with an edge trigger type that is activated by the rise of the input pulse, the output of the inverter 61 becomes high level at the moment Fl becomes low level.
25 is set, and at the same time, FII'26 is also reset by the set output of FF25 which has passed through the OR gate 56. The display contents that have been applied to the circuit 72 and the segment driver circuit 73 and have been stored in the display unit DSP (for example, the number of previous calculation results 5)
6). The period when QD=1 is 't, the high level/L/period of the set output of FF26 is a time T that is sufficient to completely clear all the memory contents of the display device DSP and switch to L, and during that period, the delay circuit It is established with two. The delay time T of this delay circuit 29 is determined to be an optimum time (depending on the physical properties of the non-volatile display device DSP).

When the delay time elapses, the FF 26 is reset, so that CD goes to low level (OD=O) and the clearing operation of the DSP ends. As a specific measure for this clearing operation, when the display DSP is constructed of the aforementioned electrochromic material, irregular ferroelectric material, etc., a signal having a polarity opposite to the signal polarity at the time of writing is applied.

For example, when pumping in, the polarity voltage (
If a voltage of e polarity is applied to the segment electrodes A to G, a voltage of e polarity may be applied to DI-DB and a voltage of black polarity to A to G at the time of clearing. Furthermore, in the case of a non-volatile liquid crystal material, a high frequency pulse or the like may be applied. Or display device DSP for heating, light illumination and various measures.
It can be used depending on the physical properties of the material. When this clearing operation is completed, the output of the delay circuit 29 is applied to the AND gate 43 as shown in FIG.
Oi (FF21 through gate 55 and AND gate 31
Set. Therefore, the set output F1 is at a high level, and the transistor Tr is cut off through the interface A. On the other hand, AND ))'-to43
The output is sent to the edge trigger type FF27 via the inverter 65.
When the output signal of the delay circuit 29 falls, that is, the output of the inverter 65 rises, the FF 27 is set and its output signal rises as shown in FIG. 5A.

This rising output signal is inverted by the inverter 66 and becomes a low level signal, which closes the p-AND gate 43. Therefore, the AND gate 43 is not opened from now on, and the output signal of the delay circuit 29 generated thereafter is prevented from being applied to the FF'21. This process (■) can be expected to have the same effect even if the normal all-clear key is pressed twice. Further, when the normal entry clear key is pressed, in addition to clearing the display register R, an output signal is also obtained from the OR gate 56, so that the display DSP can be cleared in the same manner as described above.

■Next, input the calculation data l by pressing the numeric keys on the keyboard. This decimal value signal N is
3 via input line 12, encoded and stored in register R. On the other hand, at the stage of ■ above, FF21
Since has been set, an output signal is generated in the AND gate 41, and is applied to one input terminal of the AND gate 36 via the OR gate 52, so the numeric key (1) is pressed.) A, ND gate 36 opens and its output signal sets IFIF 24. Also, this input line 4
Since the above numerical signal N is also applied to the AND gate 32, the FIP 21 is reset. Therefore, the set output cuff 1 becomes low level again, and the transistor Tr is turned on by the same operation as described above, and the supply voltage P1 is completely supplied to the display section again, and preparations are made for loading new display contents. Also, by resetting FF21) F'F25.26 operates in the same way as when the previous power switch ps was turned on.
is set and a clear signal OD is generated to clear the display DSP again, but in this case there is no change in the display DSP because the previous ps press has already been cleared. However, depending on the physical properties of the display device DSP, it may not be possible to completely clear the screen with just one clear operation, so it is clearly recommended that a display device with such physical properties perform the clear operation twice. This is effective for the purpose of obtaining contrast.

Further, the above-mentioned operation is essential when pressing the first arithmetic number, which will be described later, and it is effective to perform the same control with a smaller circuit configuration as in this embodiment. Next, the arithmetic circuit 13 confirms that the value 1 has been stored in the register R and outputs m1.
16 to generate an activation command for the digit pulse generator 71, and a numerical value l signal from the output line 17 is applied to the decoder 73 to be decoded into a decimal code, and further to the segments A to G.
is encoded into a combination code and applied to the segment driver circuit 74. Segment driver circuit 74
A signal representing a numerical value 1 (for example, a signal S□ at the output m la, lb to display segments A, B).

Generate SB. ) appears and all segments A and B of each digit are driven. At this time, the digit pulse TDI that drives the first digit is output from the digit pulse generator 71 and is amplified by the digit pulse driver circuit 72, so that the first digit D of the display DSP is
The number 1 is written to Sl.

This writing technique is the same as the configuration of a normal dynamic display drive system, but the digit pulses TDI to TD8 are each 1
Writing can be completed with one output. In addition, the register IR can output all numerical values and complete writing to the display DSP in one cycle, so there is no need to lead the output of the register R to the display DSP, and it can be used for other purposes. It is also possible to store used values or clear them to store other numerical contents.

■ When the numerical value l stored in the register area R is displayed on the first digit DSI of the display DSP by pressing the numerical key (1), press the function key (1) next. Then, the function signal F passes through the input line 71 to FF2.
3. Set and reset 24 respectively.

This funxylan signal r is also input to the arithmetic circuit 13, which sets various circuit elements to the addition mode, performs an addition operation between the operand 1 and the numerical value O, and stores the result @1 (sum) again in the register memory. Store in R. Such processing can be easily accomplished using ordinary computer technology. When this calculation is completed, a calculation end signal E sets the output LSFF 26 from the output line 18. Therefore, the clear signal CD was generated as described above, and the number displayed on the first digit DSl of the 1st display DSF]
- Clear. Also, as before, the clearing operation ends when the set time of the delay circuit 29 ends. The completed calculation signal E is applied to the extension circuit 28, and the display u
After the maximum time for completing writing to the DSP has elapsed, the display completion signal S is outputted from the delay circuit 28 and applied to the set input terminal of the FF 22 to set the FF 22. During the activation time of the delay circuit 28, the numerical value 1 stored in the register R is transferred to the first digit DS of the display DSP in the same manner as before.
Write to I again.

The display completion signal S is also applied to the delay circuit 3o, and after being delayed for a predetermined time, the FF 21 is turned on and the PIF 22 is reset. Since the FF21 has been set, the forward-looking transistor Tr is turned off to stop supplying the supply voltage PI to the display section. Therefore, the battery E1 is not consumed until the next calculation number 2 is set, and the operator can slowly proceed with preparations such as selection of the calculation number.

■ Store the operation number 2 in the frame register R by pressing the numerical key several times. The operand number 1 previously stored in the register R is transferred to another register (not shown) in the arithmetic circuit 13 at the stage when the function key is pressed or immediately after the operand number 2 is pressed. When numeric key (2) is pressed, FF21.2
3 is reset and FF24 is set. Then, the display device DSP goes through the same process as in ■, and after clearing the previously displayed number l, the number 2 is written to DS1.

■ When the eye key is pressed, it goes through the same process as ■. That is, FFs 23 and 24 are set and reset, and the addition operation of 1+2=3 is processed by the arithmetic circuit 5.
The number 3 is output and written to the display DSP.

■ To perform continuous calculations on the previous calculation results, simply press the ward key. The state of 7IF21.23 (Fl:1, F3=1) remains unchanged and waits for the next set number.

■ Press the numeric country key. The state of each part changes in the same process as (2), and the number 4 is written and displayed on the display DSF.

■ When you press the eye key, the display D goes through the same process as ■.
The calculation result number 12 is displayed on the IP with an overlay.

■ When the power switch ps is turned off, the display DSP
The displayed value 12 is displayed as it is, and the voltage PL is 1.
, the supply of P2 is cut off. Since the number of calculation results continues to be maintained as long as the memorability of the display device DIP remains, a large number of calculation results can continue even after the power is turned off.

However, as mentioned above, when LPS is off, it is also possible to clear the display DSP using the electrical energy previously stored in the capacitor as shown in Figure 3, but the clearing mechanism is similar to that shown in the example in Figure 5 above. It is clear that the operation can be performed in substantially the same way. -1, and the display completion signal S in FIG. 5 is generated by the delay circuit 28 which receives the operation completion signal E and delays it by a predetermined time, but this is not necessarily the case. For example, the last digit pulse of the digit pulse generator 71 (
The trailing edge of TD8) also has the meaning of display completion. That is, as shown in Fig. 6, the trailing edge BE of the final digit pulse TD8 is the time when the digit scanning of the 8-digit numerical display DSP is completed, so the last digit is sent to the flip-flop DF, which is set at the falling edge of the pulse as shown in Fig. 7. By applying the pulse TD8, the υ display completion signal S can be generated, and the signal S can be applied to the FF 22 in the same manner as in FIG. Furthermore, in the case of a computer, the display DSP and the display register R rarely store all-digit display numeric information, and there are often zeros that do not need to be displayed in the upper digits.

In this case, since a normal zero suppress circuit ZS as shown in FIG. 8 is provided, this output signal is used to generate the display completion signal S.
can also be generated.

In other words, the output of the ZS circuit is, for example, A, B, etc.
A flip-flop ZD for detecting the display effective digit end signals 81 and 82 may be provided in the same manner as in FIG. In this case, a general display method in which the numbers are shifted and displayed from the right end to the left end of the display DSP as shown in FIG. 9I is easy in terms of structure.

Numerical information to be displayed from the lower digit to the upper digit is taken from the terminal register R, and digit pulses are generated from the digit pulse generator 71 in the order of TD8, TD7,...TD2, TDI. Then, the signal s1 in Fig. 8
, s2 can become the display completion signal S. In addition, in the case of a configuration in which the display is performed from the left end to the right end of the display DSP as shown in Figure 9 (■), the register IR is taken out in order from the upper digit to the lower digit, and the zero the breath circuit ZS determines zeros that do not need to be displayed in the lower order. It can be configured as follows. These specific implementation methods are within the range that can be implemented much more easily by a designer than conventional zero suppression technology, and are all techniques of the present invention? l
It is included in the tr range. Further, as soon as the display of the effective digits is completed, the display completion signal S is generated and the supply voltage P1 of the display device DSP is turned off using the two methods described above, namely, the method using the delay circuit 28, and the method using the digit pulse TD8. This method is more flexible than the method of detecting , and is extremely superior in that it improves the overall processing speed and also improves the effect of saving the battery E1. Also, Figure 9■
As shown in the figure (the method of displaying from the left end of the DSP is optimal as a display method using non-volatile display materials. This is because in the case of Figure 9 1, the display proceeds while shifting the numbers. Therefore, the content written before a certain digit must be cleared before proceeding to the next display, whereas ■
In the case of I, this is not necessary, and therefore has the advantage that a special clear circuit, shift circuit, etc. are not required and the circuit configuration is extremely simple. In addition, the power saving effect, which is the greatest advantage of non-volatile display materials, can be maximized as shown in FIG. 9, which is a feature of the present invention.

Now, let's take a look at the unique characteristics of non-volatile display materials, especially electrochromic materials.

The electrochromic material 6 is electrically resistive, and although there are differences in compatibility, its specific resistance is approximately 108 to 1.
011 [Ωm].

The electrolyte 7 has a specific resistance about 104 times that of the electrochromic material 6, and a relative permittivity of 2 to several tens of tens.

- For example, the cross-sectional area lXl0''''2 [Go] is 6 and 7 respectively.
When the thickness of the electrochromic material 6 is about 5000A, the series resistance r8 of the electrochromic material 6 is about 1000, and the resistance rp of the electrolyte 7 is several mQ. In addition, the capacitance is ]-0' ~ 105 (P
IF). In other words, an equivalent circuit as shown in FIG. 10 is obtained.

When a pulse having a waveform PtQ as shown in FIG. 12(a) is applied from the pulse generator PG of FIG. 11 to both electrode terminals 2a and 4a of FIG. A waveform as shown in (b) is observed on the oscilloscope. That is, when the input voltage P rises, a current suddenly flows, and the display element 6.7 develops a color. However, when the pulse P falls, the charge accumulated in the electrolyte 7 flows backward, and although there is no danger that the element 6.7 will be discolored by the reverse current of 2, the coloring density will be lowered. This is shown in FIG. 12 (Q). When a certain erasing pulse Q is applied, the color is erased when the pulse Q falls, but when the pulse Q rises, it erases the color.
During the rainbow season, the color reappears, albeit at a lower concentration, due to the movement of the coffin stone. This is not preferable because it causes a decrease in the display contrast of the above-mentioned Tosake coloring and decoloring. ], 3
The figure solves the above-mentioned difficulties and shows a specific example of the driver circuit section 72, 74 of the display section of FIG. Figure 13 shows the display shown in Figure 4: M: o3p is 3 digits, A, B
This is a representative description of two segments. Each digit driver 72-1 of the digit pulse driver circuit 72,
72-2 and 72-3 have the circuit configuration of 72-1 as shown. Similarly, each segment driver 74-1, 74-2 of the segment driver circuit 74 has the same circuit configuration as the circuit configuration of the segment driver circuit 74-1. FIG. 14 is a timing chart of each part of FIG. 13. Here, we assume a 3-digit, 2-segment display, and its operation is OD:=] to erase all digits L1, then display the first digit in both segments A and B, and 2
This is a timing chart where only segment A is displayed in the digit, and nothing is displayed in the third digit.

Hereinafter, the operation of the embodiment shown in FIG. 13 will be explained using the timing chart shown in FIG. 14. When CD=1 and 1! AND gates 91 to 98 in FIG. 5 are closed, and TDINTD8
All outputs of the inverter 41 are at low level.
The outputs of the Q, NA, ND gates) 145 and 146 become l, respectively, and the output of the inverter 14-3 becomes 0, so the P channel Mos transistor 151 e 1
Since N-channel transistors 154 and 155 are both turned on, the digit pulse output ADI is connected to the reference potential source. AD2 and A
D3 is similarly connected to a reference potential source. Same (CD: l
At this time, the operation of the segment driver circuit 74 is as follows.
The AND gate 99 in the figure is closed, and the outputs Sa to Sg are all at low level, and the output of the NOR gate 147 in FIG. The segment output SA is connected to a positive voltage source E. Moreover, the segment output SB is also connected to E in the same way. In this embodiment, the power or girder electrodes D1 to D3 are configured to be connected as follows.
By setting the voltage to the reference potential and the segment electrodes A and B to the positive position, all the displays can be erased at the same time. O
When digit pulse signals such as TDI to TD3 in FIG. 14 are applied to the digit driver circuit 72 immediately after D:1 is completed, ADl - AD3 is selected as shown in FIG. 14, but when 11 is not selected, Since the transistors 152 and 154 are automatically turned off, they are in a floating state where they are not connected to any power source. The dashed line represents the 70-ting condition. On the other hand, in response to the segment signals Sa and Sb from the converter circuit 73, SA, Sb in FIG.
A segment drive signal like SB is output, but when the digit pulse AD is 1, both SA and SB are at the reference potential, so segments A and E of the first digit DSL of the display DSP develop color. Thereafter, due to its non-volatile nature, color development can be maintained without a write pulse. When the second digit AD:2 occurs, only SA becomes the reference potential, so only segment A of the second digit DS2 develops color, and this is maintained. For the third digit DS3, no segment is colored. This configuration has the following features. 1) All digits can be cleared at the same time, increasing the clearing speed.
This is a big advantage that contributes to improving the speed of the entire process.

In particular, electrochromic materials require a long time for both writing and erasing when they are in the dusty stage. Therefore, it takes approximately 0.1 seconds to clear each digit, and in the case of an 8-digit display DSP, a clearing time of 0.8 seconds is required, but with the configuration shown in Figure 13, the clearing time for each digit is 0] seconds. It is possible to complete the digit-to-same clearing, which is extremely preferable.

2) As explained above in the electrical characteristics of electrochromic materials, in the case of a display material that has the characteristic that a reverse current flows at the end of the writing pulse and the color is slightly erased,
Since the transistors 152 and 154 in FIG. 13 are configured to be turned off at the same time, almost no reverse current is generated.
It is possible to produce an extremely beneficial effect in improving contrast. Such a configuration is effective for all display substances that have a memory effect. For example, even when applied to the above-mentioned irregular ferroelectric material, liquid crystal material, etc., the contrast can be greatly improved. Furthermore, if not only the digit electrodes D1 to D3 side but also the segment (2) electrodes A and B side are configured to be in a floating state at the end of the write signal, the effect of preventing reverse current outflow will be more complete. This example is shown in FIG. 15, but since its operation is the same as that in FIG. 13, the explanation will be omitted. Furthermore, as another example of this reverse current outflow prevention measure, a MOS transistor MT as shown in FIG. 16 may be used in place of the voltage P1 on/off control transistor Tr shown in FIG. MOS) transistors are conveniently used for these purposes because their insulation resistance is extremely high. Although this embodiment has been described above in the case where the numerical data are all one digit, the same applies of course to multiple digits. In addition, in the case of multiple digits, it is possible to easily obtain a configuration in which the supply voltage P1 is cut off immediately after one digit is entered by simply adding a few 7-lip-flop gates. Further, not only a volatile circuit but also a non-volatile circuit can be easily used, and in that case, the voltage P2 does not need to be continuously supplied and can be turned on and off in substantially the same manner as the on-off operation of the voltage P1.

As a result, battery savings have improved dramatically, and a single mercury battery can be used for several years or more. Further, as explained in the general section, the present invention can be applied not only to small electronic calculators but also to microreaders, copying machines, and other electronic devices having non-volatile display means, and is extremely useful industrially.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an embodiment of the nonvolatile 1 (indicating means) used in the present invention, FIG. 2 is a basic block of the present invention, and FIG.
An example of a case where the display long cylinder shown in the figure is used in a small electronic calculator. Figure 5A is a timing chart explaining the timing chart that explains the operation when the power switch is turned on. Figure 15 is a timing chart that explains the timing chart. Another embodiment of the figure, FIG. 16 is another embodiment of the same transistor Tr as shown in FIG. 5! be. K~-m-manual operation section, L-111 control section, B-111 power supply operation section, o----display section. Applicant: Gyanon Co., Ltd. No.

Claims (1)

[Claims] An electronic device with a non-volatile display means, comprising a non-volatile display means consisting of a plurality of digits and a display control means for sequentially displaying the display means from the left side to the right side.