JPS597400B2 - speech analysis device - Google Patents

speech analysis device

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Publication number
JPS597400B2
JPS597400B2 JP56044016A JP4401681A JPS597400B2 JP S597400 B2 JPS597400 B2 JP S597400B2 JP 56044016 A JP56044016 A JP 56044016A JP 4401681 A JP4401681 A JP 4401681A JP S597400 B2 JPS597400 B2 JP S597400B2
Authority
JP
Japan
Prior art keywords
signal
input
output signal
output
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56044016A
Other languages
Japanese (ja)
Other versions
JPS57158897A (en
Inventor
誠 中村
文夫 杉山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP56044016A priority Critical patent/JPS597400B2/en
Publication of JPS57158897A publication Critical patent/JPS57158897A/en
Publication of JPS597400B2 publication Critical patent/JPS597400B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は、音声分析合成システムや音声認識装置に使
用される音声分析装置に係り、特に音声の基本パラメー
タの一つである部分自己相関係数を抽出する音声分析装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speech analysis device used in speech analysis and synthesis systems and speech recognition devices, and in particular to a speech analysis device for extracting partial autocorrelation coefficients, which are one of the basic parameters of speech. Regarding.

近年、音声を基本パラメータの組に分解して低ビット
レートで伝送し、受信側でこれらの基本パラメータを用
いて音声を合成する音声分析合成システムや、話者識別
等の目的で音声の基本パラメータを抽出する音声認識装
置が広く用いられるようになつてきた。
In recent years, speech analysis and synthesis systems have been developed that break down speech into sets of basic parameters and transmit them at a low bit rate, and use these basic parameters to synthesize speech on the receiving side, as well as speech analysis and synthesis systems that break down speech into sets of basic parameters, transmit them at low bit rates, and synthesize speech using these basic parameters on the receiving side. Speech recognition devices that extract speech are becoming widely used.

この場合の音声の基本パラメータの一つとして、音声
信号波形の近接したサンプル値の間の相関に着目し、部
分自己相関係数を抽出する音声分析装置が知られている
(特公昭49−18007)。
As one of the basic parameters of speech in this case, a speech analysis device is known that focuses on the correlation between adjacent sample values of the speech signal waveform and extracts a partial autocorrelation coefficient (Japanese Patent Publication No. 49-18007 ).

ここで、部分自己相関係数とは、既に知られているよう
に、音声信号波形の2時点間の相関を、そD2時点間の
サンプル値により予測した値と、実際のサンプル値との
差の相関で表現したものであん この種の音声分析装置
は、第1図に示すように、音声信号入力端子1に複数n
段の格子型遅延フィルタ21〜2nを縦続接続したもの
で、各段の遅延フィルタは遅延回路3、乗算器4、5、
和又は差信号を出力する加算器6、T及び相関器8によ
り図示したように構成される。この構成において、相関
器8は音声信号入力端子1に入力される、サンプリング
された音声信号と、遅延回路3により1サンプル時間間
隔だけ遅延された音声信号とのアナログ相関を求め、こ
の値により乗算器4、5の係数を定める。しかし、実際
には、このアナログ相関を求める為の相関器10の存在
が、回路規模を増大づせ、装置を実現する上での大きな
障害となつていた。そこで、本発明者はこのような相関
器10の不要な音声分析装置を発明した(特願55−4
1547)0この発明は、上記の相関器10に代えて、
係数発生回路とこの回路により得られる係数を加算器6
,7の少なくとも一方の出力信号値が小さくなる方向に
修正する係数修正回路を用いる。
Here, the partial autocorrelation coefficient is, as already known, the difference between the correlation between two points in the audio signal waveform, predicted by the sample value between D2 points, and the actual sample value. This type of speech analysis device is expressed by the correlation of
Stages of lattice delay filters 21 to 2n are connected in cascade, and each stage of delay filters includes a delay circuit 3, multipliers 4, 5,
It is constructed as shown by an adder 6, T, and a correlator 8 which output a sum or difference signal. In this configuration, the correlator 8 calculates an analog correlation between the sampled audio signal input to the audio signal input terminal 1 and the audio signal delayed by one sample time interval by the delay circuit 3, and multiplies it by this value. Determine the coefficients of devices 4 and 5. However, in reality, the existence of the correlator 10 for determining this analog correlation increases the circuit scale, which is a major obstacle in realizing the device. Therefore, the present inventor invented a speech analysis device that does not require such a correlator 10 (Patent Application No. 55-4).
1547)0 In this invention, instead of the above correlator 10,
The coefficient generation circuit and the coefficients obtained by this circuit are added to the adder 6.
, 7 is used to modify the output signal value of at least one of them in the direction of decreasing.

この構成により、音声分析装置の回路規模を小さくする
ことができる。本発明は、この音声分析装置を更に改良
したものである。
With this configuration, the circuit scale of the speech analysis device can be reduced. The present invention is a further improvement of this speech analysis device.

本発明は、上記のような格子型遅延フイルタを複数段縦
続接続し又はこのフイルタの各手段を繰り返して用いて
各段の信号処理を行ない、初段の第1及び第2の入力端
子にサンプリングづれた音声信号を入力し各段の係数発
生手段に}いて得られる係数を部分自己相関係数として
抽出する音声分析装置に訃いて、係数修正手段は第1の
加算手段の出力信号と第2の入力端子への入力信号また
は遅延手段の出力信号と第2の加算手段の出力信号の少
なくとも一方の相関をとる相関手段と、この相関手段の
出力を所定量減衰づせる減衰手段とから成り、高次の段
にふ一ける前記減衰手段の減衰量を低次の段に卦ける減
衰手段の減衰量より小さくなるように構成する。
The present invention connects multiple stages of lattice-type delay filters as described above in cascade, or repeatedly uses each means of these filters to perform signal processing at each stage, and provides sampling to the first and second input terminals of the first stage. The speech analysis device inputs a speech signal inputted to the coefficient generation means of each stage and extracts the obtained coefficients as partial autocorrelation coefficients. It consists of correlation means that correlates at least one of the input signal to the input terminal or the output signal of the delay means and the output signal of the second addition means, and attenuation means that attenuates the output of the correlation means by a predetermined amount. The attenuation amount of the attenuation means in the next stage is configured to be smaller than the attenuation amount of the attenuation means in the lower stage.

このように構成したことにより、本発明は部分自己相関
係数をより速くしかも正確に求めることができる効果を
有する。
With this configuration, the present invention has the advantage that partial autocorrelation coefficients can be determined more quickly and accurately.

以下、本発明の実施例について説明する。Examples of the present invention will be described below.

第2図に、この発明の一実施例の音声分析装置の構成を
示す0この実施例に訃いても、複数n段の格子型遅延フ
イルタ21〜2nを縦続接続して構成されて訃り、各段
の遅延フイルタは次のように構成される031,32は
入力端子であり、第1の入力端子31への入力信号は遅
延回路33により1サンプル時間間隔Tだけ遅延された
後、第1の乗算器34及び第1の加算器35に入力され
、一方、第2の入力端子32への入力信号は第2の乗算
器36及び第2の加算器37に入力される。第1、第2
の乗算器34,36の係数は係数発生回路38により与
えられ、この回路の発生する係数は係数修正回路39に
よつて、第1の加算器35の出力信号値が小さくなるよ
うに修正される。係数発生回路38は、加算器40とこ
の出力信号を1サンプル時間間隔Tだけ遅延させる遅延
回路41とから成る。加算器40は係数修正回路39の
出力信号を遅延回路41の出力信号に加える。一方、係
数修正回路39は、この実施例では、第2の入力端子3
2への入力信号と第1の加算器35の出力信号の乗算を
行なう乗算器42と、この乗算出力を定量減衰させる減
衰器43とから構成され、その出力を加算器40に入力
する。このように構成された格子型遅延フイルタを縦続
接続された音声分析装置の、初段の遅延フイルタ21の
第1、第2の入力端子31,32に、音声信号入力端子
30を介してサンプリングされた音声信号を入力する。
FIG. 2 shows the configuration of a speech analysis device according to an embodiment of the present invention. Even in this embodiment, it is constructed by cascading a plurality of n stages of lattice type delay filters 21 to 2n. The delay filters in each stage are constructed as follows. Reference numerals 031 and 32 are input terminals, and the input signal to the first input terminal 31 is delayed by one sample time interval T by the delay circuit 33, and then the first The input signal to the second input terminal 32 is input to the second multiplier 36 and the second adder 37. 1st, 2nd
The coefficients of the multipliers 34 and 36 are given by a coefficient generation circuit 38, and the coefficients generated by this circuit are modified by a coefficient modification circuit 39 so that the output signal value of the first adder 35 becomes smaller. . The coefficient generation circuit 38 includes an adder 40 and a delay circuit 41 that delays the output signal by one sample time interval T. Adder 40 adds the output signal of coefficient correction circuit 39 to the output signal of delay circuit 41. On the other hand, in this embodiment, the coefficient correction circuit 39 is connected to the second input terminal 3
The multiplier 42 multiplies the input signal to the first adder 2 by the output signal of the first adder 35, and the attenuator 43 quantitatively attenuates the multiplication output.The output thereof is input to the adder 40. A sampled audio signal is sent to the first and second input terminals 31 and 32 of the first-stage delay filter 21 of the audio analysis device in which the lattice-type delay filters configured in this way are connected in cascade through the audio signal input terminal 30. Input the audio signal.

各段の第1の加算器35は、遅延回路33の出力信号と
第2の乗算器36の出力信号との和または差信号、即ち
後方予測誤差信号を第1の出力端子44に送出し、第2
の加算器37は第2の入力端子32への入力信号と第1
の乗算器34の出力信号との和または差信号、即ち前方
予測誤差信号を第2の出力端子45に送出する。各段の
係数発生回路38内の遅延回路41より部分自己相関係
数Ki(1=1〜n)が得られ、第1、第2の乗算器3
4,36に与えられると共に、伝送の為に外部に取り出
される〇ここで、部分自己相関係数とは、既に知られて
いるように、音声信号波形の近接2時点間の相関を、そ
の2時点間のサンプル値により予測した値と実際のサン
ブル値との差の相関で表現したものである〇上記実施例
に基づき、初段の遅延フイルタから遠い高次の遅延フイ
ルタにお一ける係数修正回路内の減衰器の減衰量を、低
次の遅延フイルタに卦ける係数修正回路内の減衰器の減
衰量より小さくなるように構成することにより、部分自
己相関係数をより速く且つ正確に求められることを、数
式を用いて説明する01段目の遅延フイルタ21の遅延
回路33の出力信号をx1(t)、第2の入力端子32
の入力信号をY,(t).遅延回路41の出力信号をk
1(t)とすれば、第1及び第2の加算器35,37の
出力信号Ell)(t)及びElf(t)は、それぞれ
次の通り表わされる。
The first adder 35 in each stage sends a sum or difference signal between the output signal of the delay circuit 33 and the output signal of the second multiplier 36, that is, a backward prediction error signal, to the first output terminal 44, Second
The adder 37 inputs the input signal to the second input terminal 32 and the first
The sum or difference signal with the output signal of the multiplier 34, that is, the forward prediction error signal, is sent to the second output terminal 45. A partial autocorrelation coefficient Ki (1=1 to n) is obtained from the delay circuit 41 in the coefficient generation circuit 38 of each stage, and
4, 36, and taken out to the outside for transmission.Here, as is already known, the partial autocorrelation coefficient refers to the correlation between two adjacent points in the audio signal waveform. It is expressed by the correlation of the difference between the value predicted by the sample value between points in time and the actual sample value.〇Based on the above embodiment, the coefficient correction circuit in the high-order delay filter far from the first-stage delay filter By configuring the attenuator in the filter to be smaller than the attenuator in the coefficient correction circuit of the low-order delay filter, the partial autocorrelation coefficient can be determined more quickly and accurately. This will be explained using a mathematical formula.The output signal of the delay circuit 33 of the 01st stage delay filter 21 is x1(t), and the second input terminal 32
The input signal of Y, (t). The output signal of the delay circuit 41 is k
1(t), the output signals Ell)(t) and Elf(t) of the first and second adders 35 and 37 are expressed as follows, respectively.

乗算器42は、第2の入力端子32の入力信号y1(t
)と第1の加算器35の出力信号Elb(t)の乗算を
行ない、減衰器43はこの乗算器42の出力を所定量減
衰させるから、この減衰器43が入力信号を△,倍して
出力するとすれば、この出力はΔ,・E,b(t)・y
1(t)となる。
The multiplier 42 receives the input signal y1(t
) by the output signal Elb(t) of the first adder 35, and the attenuator 43 attenuates the output of the multiplier 42 by a predetermined amount, so the attenuator 43 multiplies the input signal by Δ. If output, this output is Δ,・E,b(t)・y
1(t).

加算器40は上記減衰器43の出力と遅延回路41の出
力k1(t)を加算し、遅延回路41はこの加算出力を
次の出力k1(t+1)とする。したがつて、次式が得
られるOここで、減衰器43のゲイン△1を適切に選べ
ばK,は一次の部分自己相関係数に収束する。
The adder 40 adds the output of the attenuator 43 and the output k1(t) of the delay circuit 41, and the delay circuit 41 uses this added output as the next output k1(t+1). Therefore, the following equation is obtained: where, if the gain Δ1 of the attenuator 43 is appropriately selected, K converges to a first-order partial autocorrelation coefficient.

2段目以降の格子型遅延フイルタについても同様であり
、一般にi段目の遅延フイルタではi次の部分自己相関
係数Kiが次のように逐次近似により得られる。
The same applies to the second-stage and subsequent lattice-type delay filters, and generally, in the i-th stage delay filter, the i-th order partial autocorrelation coefficient Ki is obtained by successive approximation as follows.

ところで一般に、音声信号の周波数スペクトルは時々刻
々変化する。
Generally, the frequency spectrum of an audio signal changes from moment to moment.

例えば、日本語の発声スピードは通常5〜10音節/秒
であり、音声信号の周波数スペクトルは100〜200
secの間に全く異なつたものに変化する。また、子音
の継続時間は母音の継続時間に比べてはるかに短く、し
たがつて少なくとも数10msecで音声の特性が変化
すると考えられる。上記の音声分析装置において、上述
のように部分自己相関係数は逐次近似により求まる。
For example, the speaking speed of Japanese is usually 5 to 10 syllables/second, and the frequency spectrum of the audio signal is 100 to 200.
changes into something completely different within seconds. Furthermore, the duration of a consonant is much shorter than that of a vowel, and therefore it is thought that the characteristics of speech change at least in several tens of milliseconds. In the above speech analysis device, the partial autocorrelation coefficient is determined by successive approximation as described above.

この逐次近似の収束速度は、減衰器43の利得△iが大
きい程速くなる反面、残留振動誤差が大きくなり、合成
音声の歪が増大する。一方、減衰器43の利得Δ1を小
さくすれば、当然残留振動誤差は小さくなるが収束速度
は遅くなる。そこで逐次近似が音声のスペクトル変化に
充分追随でき、しかも残留誤差が小さくなるように減衰
器43の利得△1を選ばなければならない。この△iの
値の適切な範囲はかなり小さく、実験によればせいぜい
6dB程度である。本発明は各段の遅延フイルタに卦け
る減衰器43の利得Δiを上記最適に近い値に設定する
ことにより性能を向上させるものである。即ち、音声信
号は各段の遅延フイルタを通過する毎に相関を除去され
ていくので通過段数が増すにつれて信号の平均電力は徐
々に小さくなる。即ち、高次(n段目)の遅延フイルタ
の入力信号y1(t)の平均電力は低次(m段目)の遅
延フイルタの入力信号Ynl(t)の平均電力より小さ
くなる。但し、n>mである。また、当然n段目の遅延
フイルタに訃ける第1の加算器35の出力Enb(t)
の平均電力はm段目の遅延フイルタにおける第1の加算
器35の出力Errt)(t)の平均電力より小さい。
したがつて、n段目とm段目の遅延フイルタに訃ける減
衰器43の利得ΔN,Δ.を等しいとすると、各フイル
タに卦ける係数修正回路39の出力、即ち修正量の平均
値の間には次の不等式が成り立つ。したがって、これら
の平均値をほぼ等しくするには次のようにすればよい。
The convergence speed of this successive approximation becomes faster as the gain Δi of the attenuator 43 becomes larger, but the residual vibration error becomes larger and the distortion of the synthesized speech increases. On the other hand, if the gain Δ1 of the attenuator 43 is made smaller, the residual vibration error will naturally become smaller, but the convergence speed will become slower. Therefore, the gain Δ1 of the attenuator 43 must be selected so that the successive approximation can sufficiently follow the change in the voice spectrum and the residual error is small. The appropriate range of the value of Δi is quite small, and according to experiments, it is about 6 dB at most. The present invention improves performance by setting the gain Δi of the attenuator 43 in each stage of the delay filter to a value close to the optimum value. That is, since the correlation of the audio signal is removed each time it passes through the delay filters at each stage, the average power of the signal gradually decreases as the number of stages it passes through increases. That is, the average power of the input signal y1(t) of the high-order (n-th stage) delay filter is smaller than the average power of the input signal Ynl(t) of the low-order (m-th stage) delay filter. However, n>m. Also, the output Enb(t) of the first adder 35, which naturally falls into the n-th stage delay filter.
The average power of is smaller than the average power of the output Errt)(t) of the first adder 35 in the m-th delay filter.
Therefore, the gains ΔN, Δ . Assuming that they are equal, the following inequality holds between the outputs of the coefficient correction circuit 39 for each filter, that is, the average values of the correction amounts. Therefore, in order to make these average values approximately equal, the following can be done.

即ち、高次の遅延フイルタに訃ける減衰器の利得を、低
次の遅延フイルタに卦ける減衰器の利得以上とすればよ
い。
That is, the gain of the attenuator associated with the high-order delay filter may be made greater than the gain of the attenuator associated with the lower-order delay filter.

減衰量により比較すれば、高次の遅延フイルタに訃ける
減水器の減衰量を低次の遅延フイルタにおけるそれより
も小さくなるようにすればよい。ここで△。≧Δ.はN
,mの値によつてΔ。=△.となる場合もあるがそのう
ちの少なくとも1つの場合は△。〉△.となることを意
味する。実験によれば、2段目の格子型遅延フイルタの
入力信号Y2(f)の平均電力は初段の入力信号y1(
t)の平均電力のほぼ1/2〜1/6であり、3段目の
格子型遅延フイルタの入力信号Y3(t)の平均電力は
Y2(t)の平均電力の約1/2〜1/3である。
Comparing the attenuation amounts, the attenuation amount of the water reducer that is similar to the high-order delay filter may be made smaller than that of the low-order delay filter. Here △. ≧Δ. is N
, Δ depending on the value of m. =△. In some cases, at least one of them is △. 〉△. It means that. According to experiments, the average power of the input signal Y2(f) of the second stage lattice delay filter is equal to the input signal y1(f) of the first stage.
t), and the average power of the input signal Y3(t) of the third stage lattice delay filter is approximately 1/2 to 1/2 of the average power of Y2(t). /3.

また4段目以降の格子型遅延フイルタの平均電力はあま
り変化しない。したがつて、初段の入力信号y1(t)
のダイナミツクレンジを−1〜+1、遅延回路41から
第1、第2の乗算器3436に供給される係数を−1〜
+1とした場合、各段の遅延フイルタにおける減衰器4
3の利得△lは例えば次のように選ばれる。あるいは次
のように選ばれる。
Furthermore, the average power of the lattice delay filters in the fourth and subsequent stages does not change much. Therefore, the first stage input signal y1(t)
The dynamic range of -1 to +1, and the coefficients supplied from the delay circuit 41 to the first and second multipliers 3436 are -1 to +1.
+1, attenuator 4 in each stage delay filter
For example, the gain Δl of 3 is selected as follows. Or choose as follows:

このように減衰器の利得を選ぶことにより各段の遅延フ
イルタの係数発生回路38に入力される修正量をほぼ一
定にでき、部分自己相関係数を速く巨つ正確に得ること
ができる。
By selecting the gain of the attenuator in this manner, the correction amount input to the coefficient generation circuit 38 of each stage of delay filter can be made almost constant, and the partial autocorrelation coefficient can be obtained quickly and accurately.

上記実施例では、各段の格子型遅延フイルタの係数修正
回路39内の相関器として乗算器42を用い、第2の入
力信号Yi(t)と第1の加算器35の出力信号Eib
(t)の乗算出力を得ている。
In the above embodiment, the multiplier 42 is used as a correlator in the coefficient correction circuit 39 of the lattice delay filter of each stage, and the second input signal Yi(t) and the output signal Eib of the first adder 35 are
(t) multiplication output is obtained.

しかし、第3図に示すように遅延回路33の出力信号X
,(t)と第2の加算器37の出力信号Ei’f(t)
の乗算器44により得るようにしてもよい。この実施例
の場合、上記(5)式に対応する式は次のようになるが
同じ(6)式が得られる。更に、上記乗算器42,44
の代わりに単なる符号変換器を用いることもできる。
However, as shown in FIG.
, (t) and the output signal Ei'f(t) of the second adder 37
It may also be obtained by the multiplier 44 of . In the case of this embodiment, the equation corresponding to the above equation (5) is as follows, but the same equation (6) is obtained. Furthermore, the multipliers 42 and 44
A simple code converter can also be used instead.

例えば第4図に示すように、第1の加算器35の出力信
号E,bの符号に応じて第2の入力端子32への入力信
号ylの符号を変える符号変換器45を用い、この出力
信号を減衰器43に入力するようにすることができる。
この場合、各格子型遅延フイルタ2iにおける係数修正
回路39の出力は△i−Sgn{Elb(t)}・Y,
(t)となる。但し、したがつて係数発生回路38の出
力信号Ki(t)の時刻t+1における値Ki(t+1
)は、次式により表わされる。
For example, as shown in FIG. 4, a code converter 45 is used to change the sign of the input signal yl to the second input terminal 32 according to the signs of the output signals E and b of the first adder 35, and the output The signal may be input to an attenuator 43.
In this case, the output of the coefficient correction circuit 39 in each lattice type delay filter 2i is △i−Sgn{Elb(t)}·Y,
(t). However, therefore, the value Ki(t+1) of the output signal Ki(t) of the coefficient generation circuit 38 at time t+1
) is expressed by the following formula.

この場合にも、n段目の遅延フイルタ及びm段目の遅延
フイルタにおける減衰器43の利得△1,△mを等しい
とすると、前記(5)式に対応する次の不等式が得られ
る。
Also in this case, assuming that the gains Δ1 and Δm of the attenuator 43 in the n-th stage delay filter and the m-th stage delay filter are equal, the following inequality corresponding to the above equation (5) is obtained.

この場合にもこれらの平均値をほぼ等しくするには前記
(6)式が成り立てばよい。
In this case as well, in order to make these average values approximately equal, the above-mentioned equation (6) should hold true.

更に、図示していないが、第1の加算器35の出力信号
Eib(t)を第2の入力端子32への入力信号Yi(
t)の符号に応じて変える符号変換器を第4図の実施例
の符号変換器45に代えて用いてもよへこの場合にも前
記(6式が成り立てばよい。
Furthermore, although not shown, the output signal Eib(t) of the first adder 35 is input to the second input terminal 32 as an input signal Yi(
A code converter that changes the sign of t) according to the sign may be used in place of the code converter 45 of the embodiment shown in FIG. 4, as long as the above-mentioned formula (6) holds.

*また、更に、第3図の本発明の実施例における乗算
器44の代わりに遅延回路33の出力信号Xiの符号に
応じて第2の加算器37の出力信号Eifの符号に応じ
て変える符号変換器を用いることもできる。この場合、
前記(5)式に対応する不等式は次のようになるがやは
りこの場合も前記(6)式が得られる○また、逆に第2
の加算器3Tの出力信号Eifの符号に応じて、遅延回
路33の出力信号Xiの符号を変えるようにすることも
できる。
*Furthermore, instead of the multiplier 44 in the embodiment of the present invention in FIG. Transducers can also be used. in this case,
The inequality corresponding to the above equation (5) is as follows, but in this case as well, the above equation (6) is obtained.In addition, conversely, the second equation
It is also possible to change the sign of the output signal Xi of the delay circuit 33 depending on the sign of the output signal Eif of the adder 3T.

更に、また第5図に示すように、遅延回路33の出力信
号Xi(t)と第2の加負器37の出力信号Eif(t
)の乗算を行なう乗算器46、第1の加算器35の出力
信号Elb(t)と第2の入力端子32の入力信号Yi
(t)の乗算を行なう乗算器4T、及びこれらの乗算器
46,4?の加算を行なう加算器48を用いることもで
きるのこれらのいずれの場合も△n>△mとなるように
各段の格子型遅延フイルタの係数修正回路39内におけ
る減衰器43の利得を設定すればよい。
Furthermore, as shown in FIG. 5, the output signal Xi(t) of the delay circuit 33 and the output signal Eif(t
), the output signal Elb(t) of the first adder 35 and the input signal Yi of the second input terminal 32
(t) multiplier 4T, and these multipliers 46, 4? It is also possible to use an adder 48 that performs the addition of Bye.

周、上記実施例はいずれも格子型遅延フイルタを複数段
縦続接続した場合の例であるが、本発明は上記フイルタ
における演算を時分割的に処理し、順次部分自己相関係
数を抽出する音声分析装置にも適用することができる。
Although the above embodiments are all examples in which multiple stages of lattice-type delay filters are connected in cascade, the present invention processes the calculations in the filters in a time-sharing manner and sequentially extracts partial autocorrelation coefficients. It can also be applied to analytical devices.

この場合にも同様に、高次の段における減衰手段の減衰
量を低次の段における減衰手段の減衰量より小さくなる
ように演算すればよい。
In this case as well, the attenuation amount of the attenuation means in the higher-order stage may be calculated to be smaller than the attenuation amount of the attenuation means in the lower-order stage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の音声分析装置の回路構成図、第2図は本
発明一実施例の回路構成図、第3図は本発明の他の実施
例の回路構成図、第4図は更に他の実施例の回路構成図
、第5図は更に他の実施例の回路構成図である。 30・・・・・・音声信号入力端子、31・・・・・・
第1の入力端子、32・・・・・・第2の入力端子、3
3・・・・・・遅延回路、34・・・・・・第1の乗算
器、35・・・・・・第1の加算器、36・・・・・・
第2の乗算器、37・・・・・・第2の加算器、38・
・・・・・係数発生回路、39・・・・・係数修正回路
、40・・・・・伽算器、41・・・・・・遅延回路、
42・・・・・・乗算器、43・・・・・・減衰器。
Fig. 1 is a circuit diagram of a conventional speech analysis device, Fig. 2 is a circuit diagram of an embodiment of the present invention, Fig. 3 is a circuit diagram of another embodiment of the invention, and Fig. 4 is a circuit diagram of another embodiment. FIG. 5 is a circuit diagram of still another embodiment. 30...Audio signal input terminal, 31...
First input terminal, 32...Second input terminal, 3
3... Delay circuit, 34... First multiplier, 35... First adder, 36...
Second multiplier, 37...Second adder, 38.
... Coefficient generation circuit, 39 ... Coefficient correction circuit, 40 ... Multiplier, 41 ... Delay circuit,
42... Multiplier, 43... Attenuator.

Claims (1)

【特許請求の範囲】[Claims] 1 第1の入力端子への入力信号を1サンプル時間間隔
だけ遅延させる遅延手段と、この遅延手段の出力信号及
び第2の入力端子への入力信号にそれぞれ係数を乗じる
第1及び第2の乗算手段と、前記遅延手段の出力信号と
第2の乗算手段の出力信号との和または差信号を第1の
出力端子に取出す第1の加算手段と、前記第2の入力端
子への入力信号と第1の乗算手段の出力信号との和また
は差信号を第2の出力端子に取出す第2の加算手段と、
前記第1及び第2の乗算手段に与える係数を得る係数発
生手段と、この手段により得られる係数を前記第1及び
第2の加算手段の少なくとも一方の出力信号値が小さく
なる方向に修正する係数修正手段とを有し、これらの手
段を複数段縦続接続しまたはこれらの手段を繰り返して
用いて各段の信号処理を行ない、初段の第1及び第2の
入力端子にサンプリングされた音声信号を入力し各段の
前記係数発生手段において得られる係数を部分自己相関
係数として抽出する音声分析装置において、前記係数修
正手段は、第1の加算手段の出力信号と第2の入力端子
への入力信号または前記遅延手段の出力信号と第2の加
乗手段の出力信号の少なくとも一方の相関をとる相関手
段と、この相関手段の出力を所定量減衰させる減衰手段
とから成り、高次の段における前記減衰手段の減衰量を
低次の段における減衰手段の減衰量より小さくなるよう
に構成したことを特徴とする音声分析装置。
1 Delay means for delaying the input signal to the first input terminal by one sample time interval, and first and second multiplication for multiplying the output signal of the delay means and the input signal to the second input terminal by coefficients, respectively. means, first addition means for outputting a sum or difference signal between the output signal of the delay means and the output signal of the second multiplication means to a first output terminal, and an input signal to the second input terminal; a second addition means for outputting the sum or difference signal with the output signal of the first multiplication means to a second output terminal;
Coefficient generation means for obtaining coefficients to be applied to the first and second multiplication means; and coefficients for modifying the coefficients obtained by this means in a direction that reduces the output signal value of at least one of the first and second addition means. By cascading multiple stages of these means or by repeatedly using these means to perform signal processing at each stage, the sampled audio signal is sent to the first and second input terminals of the first stage. In a speech analysis device that extracts the input coefficients obtained by the coefficient generation means of each stage as partial autocorrelation coefficients, the coefficient correction means inputs the output signal of the first addition means and the input to the second input terminal. It consists of a correlation means for correlating at least one of the signal or the output signal of the delay means and the output signal of the second multiplication means, and an attenuation means for attenuating the output of the correlation means by a predetermined amount. A speech analysis device characterized in that the amount of attenuation of the attenuation means is configured to be smaller than the amount of attenuation of the attenuation means in lower-order stages.
JP56044016A 1981-03-27 1981-03-27 speech analysis device Expired JPS597400B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56044016A JPS597400B2 (en) 1981-03-27 1981-03-27 speech analysis device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56044016A JPS597400B2 (en) 1981-03-27 1981-03-27 speech analysis device

Publications (2)

Publication Number Publication Date
JPS57158897A JPS57158897A (en) 1982-09-30
JPS597400B2 true JPS597400B2 (en) 1984-02-17

Family

ID=12679877

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56044016A Expired JPS597400B2 (en) 1981-03-27 1981-03-27 speech analysis device

Country Status (1)

Country Link
JP (1) JPS597400B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4746532B2 (en) * 2006-12-20 2011-08-10 日本電信電話株式会社 Linear prediction coefficient calculation method, apparatus thereof, program thereof, and storage medium thereof
JP4691050B2 (en) * 2007-01-29 2011-06-01 日本電信電話株式会社 PARCOR coefficient calculation method, apparatus thereof, program thereof, and storage medium thereof

Also Published As

Publication number Publication date
JPS57158897A (en) 1982-09-30

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