JPS5960259A - A/d conversion system for ultrasonic flaw detection signal - Google Patents

Abstract

PURPOSE:To improves S/N with respect to non-cyclic noises by adding a flaw detection signal at each repetition cycle of an ultrasonic pulse to enable an A/D conversion in the overall range of flaw detection. CONSTITUTION:An ultrasonic pulse is transmitted to a material 4 to be inspected via a probe 3 from a transmitting section 2 to perform formations of flaw detection signals from the reflected echo signals thereof through a receiver 5 and detecting amplifier 6. On the other hand, a sonic clock proportional to distance is gated 9 synchronizing the ultrasonic pulse to generate 10 various timing signals hich allows an A/D conversion 11 of the flaw detection signals as command signal. Outputs of the conversion are added 12 at each repetition cycle of the ultrasonic pulse and memorized into a memory 15. The resulting addition output is also added to the preceding value when memorized into the memory 15 through a multiplexer 14. At the same time, the signals to be memorized into the memory 15 are sent to a computer via an interface 16 each time addition is done.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an A/D (analog/digital) conversion method for ultrasonic flaw detection signals.

The ultrasonic flaw detection signal is a pulse signal with a repetition period τ as shown in Fig. 1 (a), and a typical one is shown in the figure. The one indicated by the symbol T is the transmission pulse waveform +
``1.'' 2 shows the reflected echo pulse from the internal defect of the test material, and B shows the echo pulse from the bottom surface.

A currently commonly used method that requires A/D conversion of a pulse signal when using an electronic computer system as a defect echo processing method will be described with reference to FIGS. 1 to 3.

In FIG. 1, T is the transmission pulse t Fl ij first
The second defect echo, F'2 is the second defect echo, F
1' is another first defective echo, F2' is another second defective echo +B1+B2 is the first. This is the second bottom echo, the τth pulse. After extracting only the defect echo shown in ■ from the flaw detection waveform ■ using the gate signal ■,
A sample board converts the signal proportional to the peak value of the pulse signal. Next, the A/D command signal
Perform the conversion. However, this method only outputs the peak value within the gate.

There is a drawback that low-level echoes, such as the one indicated by symbol F1' in FIG. 1, are not detected.

In Figure 2, the detection gate width is narrowed and moved little by little every cycle from transmission pulse repetition 1, and the gated echoes are sampled and held at each position and A/D converted. As shown in Figure 2 (■), by moving the echo pulse as shown in A22B, No, 2, and E, gate echoes as shown in A22B, H2, and E in Figure 2■ are obtained, which are sampled and held. The digital output (2) is obtained by using the A/D command signal (2). However, although this method allows A/D conversion of even the shape of the waveform, it is difficult to perform A/D conversion over the entire flaw detection range.
/△RX PRT (R: flaw detection range, △R: delay distance per IPRT, PRT: pulse repetition period), and has the disadvantage that it cannot be faithfully converted if the echo level fluctuates significantly.

FIG. 3 is a method of compensating for the shortcomings of FIGS. 1 and 2. That is, the gate shown in FIG. 1 is shown in FIG.

The echoes gated by each gate are time-divided as shown in (1), (2), and (7), and the echo gated by each gate is converted into a direct current that corresponds to the peak value of the echo as shown in (2) by the sample-hold circuit corresponding to each gate. are converted into digital signals (2) by A/D command signals (2). However, with this method, each echo in a group of echoes can be separated depending on the degree of subdivision of the gate, but a circuit corresponding to the number of divisions is required. In addition to being unable to convert echo waveforms, it also has the disadvantage of being susceptible to instantaneous noise.

This invention improves these conventional drawbacks,
An embodiment of the present invention will be described in detail below with reference to the drawings.

Figure 4 shows ten A/D variable feeders according to this invention.
This invention takes advantage of the characteristics of the gate division method shown in FIG. 3 and the unit gate method shown in FIG. 1, and enhances the noise resistance by boosting the output for each repetition period.

That is, in FIG. 4, the ultrasonic flaw detection waveform (a) gate (2) which determines the flaw detection range gates the sonic speed clock (2) corresponding to the unit distance. The echoes are divided as shown in (2) by the division gate created by this sonic speed clock 0, and are sequentially A/D converted and stored using the high speed A/D command signal (2). This A/D conversion is as shown by @<D every PRF cycle.
The digital outputs of 1 to Dn are (8), but these are added n cycles at each same dividing point, and the S/N is improved for noise that does not have periodicity.

FIG. 5 shows a circuit system in which the present invention is embodied. In FIG. 5, (1) is a PNP excavation circuit, (2) is a transmitter, (3) is a probe, and (4) is a material to be tested.

(5) is a receiving section, (6) Lli polar wave amplification circuit, (7)
is a gate signal generation circuit, (8) is a sonic clock generation circuit, (9) is a gate circuit, 0Q timing signal generation circuit, 11) is an A/-D conversion circuit, 02 is a digital addition circuit, 03 is an addition number setting The circuit, 0i) is a multiplexer, and u5) is a memory circuit.

E is the interface circuit, ■ is the flaw detection signal, ■ is the flaw detection range gate signal, ■ is the sonic clock signal, ■ is the A/D command signal, ■ is the digital signal of periodic block U, and ■ is the addition 3'
? - later digital signal.

Now, the P R'F oscillator circuit (1) supplies transmitting pulses to the transmitter (2) and corner probe (3) to inject ultrasonic waves into the material to be inspected (4), detecting defects and reflections from the bottom surface. The echo is amplified by the receiver (5), and the detection and amplification circuit (6) obtains a flaw detection waveform as shown in FIG. On the other hand, in synchronization with the PEP of the P RF oscillation circuit (1), the gate signal generating circuit (7) generates a signal 1, and the sonic clock generated by the sonic clock generating circuit (8) generates a sonic clock @ proportional to the distance. Each fifj is gated by the circuit (9) and synchronized with the sonic clock ■ by the timing signal generation circuit (10).
Generate timing signals. -A-/D conversion circuit (1
1) is a detection amplifier circuit (A/ff) according to the command signal.
A/D converting the received signal from 6) in a time-division manner. A above
The digital signal @ converted to V4I by the 7/D conversion circuit (11) is added by the digital adder circuit α2 every repetition period (PRF), and then stored in the memory circuit (15).

The digital adder circuit 0 output is used to add the value before being stored in the memory circuit (151) through the multiplexer (14), and the multiplexer 04 adds the digital signal to the adder circuit (12) and the memory circuit (+!11). It is something that can be switched.

加;l 1-1, 加3'? : Set by D setting circuit a■. This [7th note 1. The converted signal is usually sent to the computer through an interface circuit (interface) after each addition.

As described above, the A/D conversion method of the present invention is capable of A/D conversion of the entire flaw detection range in each reversal cycle, and has the flaw characteristics of a monarch system.

(1) The resolution can be increased to the extent that the ultrasonic pulse waveform can be reproduced, and it is possible to follow phenomena that involve rapid eye movements.

By adding the f21 A/D conversion results, the S/N for non-periodic noise can be improved.

(3) High-speed transfer is possible directly to the previous 1394 machines, and processing such as displaying cross-sectional images of defects is easy.

[Brief explanation of the drawing]

Figures 1 to 3 are diagrams showing A/D conversion methods of ultrasonic flaw detection signals that are generally implemented, and Figure 4 is an A/D conversion method according to the present invention.
FIG. 5, which is an explanatory diagram of the /D conversion method, is a system diagram of the device according to the present invention. Figure ``Private (1) is the PI' (F oscillation circuit, (2) is the transmitter,
(3) is the probe, (4) is the test month, (5) is the receiving part, (
6) is a detection/amplification circuit, (7) is a gate signal generation circuit,
(8) is a sonic clock generation circuit, (9) is a gate circuit, 00 is a timing signal generation circuit, (II) is an A/
D conversion circuit, θ rike digital addition circuit, α sushi is addition number setting circuit, 04 is multiplexer, (19 is memory circuit, Q61 is interface circuit. Agent Makoto Kuzuno - 11th unit (F) - ■ ■ (-11 rate votes ≧f-11

Claims (1)

[Scope of Claims] A sonic clock generation circuit that generates a sonic clock having a period corresponding to a unit distance; After injecting ultrasonic waves into the material to be tested, defects in the material to be tested,
A detection and amplification circuit that receives the reflected echo from the bottom via the probe, detects and amplifies it to obtain a flaw detection signal, and a detection and amplification circuit that receives the reflected echo from the bottom surface via the probe and detects and amplifies it to obtain a flaw detection signal. A gate signal generation circuit that generates a gate signal δ. A gate circuit that gates the sonic clock using the upper RL gate signal, a timing signal generation circuit that inputs the output of this gate circuit and generates a timing signal in synchronization with the sonic clock, and the detection and amplification circuit described above. By IU
and an A/D conversion circuit that converts the detected flaw detection signal into a digital signal according to the timing signal, and the flaw detection signal that has been converted into a digital signal by the A/I) conversion circuit is added to a preset addition number 1 according to the timing signal. After adding, it is memorized and a total of 3'p is added every addition period
, U! & An A/D conversion method for ultrasonic flaw detection signals that is transferred to the system.