JPS5956884U - Telephone exchange sender interdigit timing generator - Google Patents

Telephone exchange sender interdigit timing generator

Info

Publication number
JPS5956884U
JPS5956884U JP15060082U JP15060082U JPS5956884U JP S5956884 U JPS5956884 U JP S5956884U JP 15060082 U JP15060082 U JP 15060082U JP 15060082 U JP15060082 U JP 15060082U JP S5956884 U JPS5956884 U JP S5956884U
Authority
JP
Japan
Prior art keywords
telephone exchange
sender
timing generator
inter
interdigit timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15060082U
Other languages
Japanese (ja)
Inventor
大石　功
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP15060082U priority Critical patent/JPS5956884U/en
Publication of JPS5956884U publication Critical patent/JPS5956884U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のもののブロック図、第２図は本考案の一
実施例のブロック図である。 １、・・・・・・センダ、２・・・・・・共通制御部、
１１・二・・・・送出数字メモリ、１２・・・・・・制
御部、２１・・・・・・送出数字情報保持部、２２・・
・・・・方路番号展開部、２３・・・・・・桁間タイミ
ング記憶メモリ、ＰＳＷ・・・・・・桁間タイミング設
定電鍵、ＳＷ・・・・・・桁間タンミング情報、受信リ
レー、ＳＷＯ・・・・・・ＳＷリレーの接点。FIG. 1 is a block diagram of a conventional device, and FIG. 2 is a block diagram of an embodiment of the present invention. 1...Sender, 2...Common control section,
11.2... Sending numeric memory, 12... Control unit, 21... Sending numeric information holding unit, 22...
...Route number development section, 23... Inter-digit timing memory, PSW... Inter-digit timing setting key, SW... Inter-digit timing information, reception relay , SWO... SW relay contact.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電話交換機の共通制御部に方路番号に対応する桁間タイ
ミング記憶メモリを設け、該メモリの出力を桁間タイミ
ング情報としてセンダへ転送する手段を有することを特
徴とするセンダ桁間タイミング発生装置−A sender inter-digit timing generation device, characterized in that a common control unit of a telephone exchange is provided with an inter-digit timing storage memory corresponding to a route number, and has means for transmitting the output of the memory as inter-digit timing information to a sender.
JP15060082U 1982-10-04 1982-10-04 Telephone exchange sender interdigit timing generator Pending JPS5956884U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15060082U JPS5956884U (en) 1982-10-04 1982-10-04 Telephone exchange sender interdigit timing generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15060082U JPS5956884U (en) 1982-10-04 1982-10-04 Telephone exchange sender interdigit timing generator

Publications (1)

Publication Number Publication Date
JPS5956884U true JPS5956884U (en) 1984-04-13

Family

ID=30333970

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15060082U Pending JPS5956884U (en) 1982-10-04 1982-10-04 Telephone exchange sender interdigit timing generator

Country Status (1)

Country Link
JP (1) JPS5956884U (en)

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