JPS5956865A - High voltage power source circuit for electrostatic copying machine - Google Patents
High voltage power source circuit for electrostatic copying machineInfo
- Publication number
- JPS5956865A JPS5956865A JP16558482A JP16558482A JPS5956865A JP S5956865 A JPS5956865 A JP S5956865A JP 16558482 A JP16558482 A JP 16558482A JP 16558482 A JP16558482 A JP 16558482A JP S5956865 A JPS5956865 A JP S5956865A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- circuit
- amplifier
- high voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、静電複写装置高圧電源回路、特に静電複写装
置における静電荷印加部に対して定電流を供給するよう
に高圧電源回路を構成し上記静電荷印加部に対して非所
望に高い直流電圧が印加されることを未然に防止すると
共に、高電圧発生のだめの始動時に出力電圧の立上り点
でのオーバーシュートが生ずるのを抑制する静電複写装
置高圧電源回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a high-voltage power supply circuit for an electrostatic copying apparatus, in particular a high-voltage power supply circuit configured to supply a constant current to an electrostatic charge application section in an electrostatic copying apparatus. A high-voltage power supply circuit for an electrostatic copying device that prevents an undesirably high DC voltage from being applied to the device, and also suppresses overshoot from occurring at the rise point of the output voltage when starting the high-voltage generator. It is related to.
静電複写装置は、一般に第]1図図示の如き構成をそな
えている。図中1は回転ドラノ1,2は静電潜像形成面
であって例えばセレン層によって構成されているもの、
3は本発明にいう静電荷印加部に対応する直流高圧印加
装置、 4Iま入力元、5けレンズ、6は静電潜像、
7はトナー(jl−給部、8はコピー用紙、9はコピー
用紙用静%に圧印加部、8′はトナーが転写されたコピ
ー用紙、10はトナ一定着部、11は静電lfv像形像
形成性電荷消去部成する交流電圧印加部であって、5
F、10F−f程度の交流電圧を印加するもの、12は
静電m像形成面電荷消去部を構成する消去光印加部であ
って静「E竹像形成面疋光を照射せし2めて静電荷を消
去せしめるもの、13は残存トナー除去用ブラシを表わ
している。An electrostatic copying apparatus generally has a configuration as shown in FIG. In the figure, reference numeral 1 indicates a rotating drum plate 1 and 2 are electrostatic latent image forming surfaces, which are composed of, for example, a selenium layer.
3 is a direct current high voltage applying device corresponding to the electrostatic charge applying section according to the present invention; 4 is an input source; 5 is a lens; 6 is an electrostatic latent image;
7 is a toner (jl-supply part), 8 is a copy paper, 9 is a pressure application part for copy paper, 8' is a copy paper to which the toner is transferred, 10 is a toner fixed part, 11 is an electrostatic lfv image an AC voltage applying section comprising an image-forming charge erasing section;
12 is an erasing light applying section constituting an electrostatic image forming surface charge erasing section, which applies an alternating current voltage of about 10F-f; 13 represents a brush for removing residual toner.
静電複写装置は、上述の如き構成をもち、(1)直前の
複写によって生成された静電潜像が電荷消去部11.1
2やブラシ13によって清掃され、 (11)次いで静
電荷印加部3によって静電潜像形成面2上に−・様に静
電荷を供給され、 (iiDレンズ5を介して記録図形
に対応する光が静電潜像形成面2に照射され、 (Iv
)静電潜像形成面2上に静電潜像6が形成され、 (V
) l−ナーl(給部7によって〈潜像6上にトナーが
被着せしめられ、 (VD回転ドラム1とコピー用紙8
との移動の間にコピー用紙8′の如く記録図形に対応し
た形でトナーがコピー用紙8′上に転写され、 (vl
ilミコピー8′上のトナーはトナ一定着部10によっ
て用紙上に定着されるように動作する。The electrostatic copying apparatus has the above-mentioned configuration, and (1) the electrostatic latent image generated by the previous copy is transferred to the charge erasing section 11.1.
2 and the brush 13, (11) Then, the electrostatic latent image forming surface 2 is supplied with an electrostatic charge by the electrostatic charge applying section 3 in the manner shown in FIG. is irradiated onto the electrostatic latent image forming surface 2, (Iv
) An electrostatic latent image 6 is formed on the electrostatic latent image forming surface 2, and (V
) L-toner l (Toner is deposited on the latent image 6 by the supply unit 7, (VD rotating drum 1 and copy paper 8
During the movement of the copy paper 8', the toner is transferred onto the copy paper 8' in a form corresponding to the recorded figure, and (vl
The toner on the il-copy 8' is fixed onto the paper by the toner fixing section 10.
しかし、上記直流高圧印加装置3によって静電潜像形成
面2上に印加される静電荷が形成面2上に所定の深さ以
上に深く供給されると、上記静電l々像形成面電荷消去
部11や12.更にはブラ/13による消去機措のみで
は、残存静電連像を正しく除去し得なくなり、いわば2
重写しが非所望な形で生じることとなる。従来、上記2
重写しを防止するために、上記直流高圧印加装置3に供
給する直流高電圧の電圧レベルを所定レベルに保持する
よう配慮されていた。しかし最近、上記直流高圧印加装
置3から静電潜像形成面2に流入される直流電流の電流
レベルを一定に保つことが上記2暇写し防止に有効であ
ることが見出され、上記直流高圧印加装置3に対して供
給される電流レベルを例えば400〔μA〕±1%に保
つことが要請され、一方定電流を供給するよう制御しつ
つ例えば’lK’lを超える直流電圧を印加することを
禁止する必要が生じた。However, if the electrostatic charge applied to the electrostatic latent image forming surface 2 by the DC high voltage applying device 3 is supplied to the forming surface 2 deeper than a predetermined depth, the electrostatic latent image forming surface charges Erasing sections 11 and 12. Furthermore, the remaining electrostatic linked image cannot be removed correctly with only the erasing mechanism using BL/13, so to speak.
Duplicate copies will occur in an undesirable manner. Conventionally, the above 2
In order to prevent duplicate copying, care has been taken to maintain the voltage level of the DC high voltage supplied to the DC high voltage applying device 3 at a predetermined level. However, recently, it has been found that keeping the current level of the DC current flowing from the DC high voltage application device 3 to the electrostatic latent image forming surface 2 constant is effective in preventing the above two types of copying. It is required to maintain the current level supplied to the application device 3 at, for example, 400 [μA] ±1%, while applying a DC voltage exceeding, for example, 'lK'l while controlling to supply a constant current. It became necessary to ban it.
本発明は、上記の如き高電圧・微小電流を供給する直流
高圧印加装置3に対して、高精度の定電流制御を行いつ
つ非所望な高電圧の印加を未然に防止すると共に、高電
圧発生のための始動時に出力電圧の立上り点でのオーバ
ーシュートが生ずるのを抑制する静電複写装置高電圧電
源回路を提供することを目的としている。The present invention prevents the application of undesired high voltage while performing highly accurate constant current control on the DC high voltage application device 3 that supplies high voltage and minute current as described above, and also prevents the generation of high voltage. It is an object of the present invention to provide a high-voltage power supply circuit for an electrostatic copying apparatus that suppresses occurrence of overshoot at the rise point of the output voltage during startup.
第2図は本発明の高圧電源回路の一実施例全体構成を示
し、第3図(α)は第2図の主要部分を抽出した回路構
成、@3図(h)は高圧出力のオーバシュート状態を示
す説明図を示す。Figure 2 shows the overall configuration of an embodiment of the high voltage power supply circuit of the present invention, Figure 3 (α) shows the circuit configuration of the main parts of Figure 2, and Figure 3 (h) shows the overshoot of the high voltage output. An explanatory diagram showing the state is shown.
第2図にお込て、14は、低圧直流電圧源であって例え
ば22 [V:] + 30%なめし22 〔V] −
20%程度の電圧変動をもつ。15は、チョッパ型スイ
ッチ・レギュレータであって、後述する発振回路への直
流電圧を変化せしめて当核発捜回路によって生成される
交番電圧の電圧レベルを変化せしめる。16は2発振回
路であって2例えばロイヤ回路に相当する如きインバー
タ回路によって構成される。1’7id電圧変成器、1
Bは1次巻線。In FIG. 2, 14 is a low voltage DC voltage source, for example 22 [V:] + 30% tanned 22 [V] -
It has a voltage fluctuation of about 20%. Reference numeral 15 denotes a chopper type switch regulator, which changes the DC voltage to an oscillation circuit, which will be described later, to change the voltage level of the alternating voltage generated by the nuclear search circuit. Reference numeral 16 denotes a two-oscillation circuit, which is constituted by two inverter circuits, for example, equivalent to a Royer circuit. 1'7id voltage transformer, 1
B is the primary winding.
19は2次巻線、20は3次巻線を夫々表わしている。19 represents a secondary winding, and 20 represents a tertiary winding.
21は、高圧整流回路であって、2次巻線19に誘起さ
れた交流高電圧を整流して、第1図図示の直流高圧印加
装置3に電圧を印加する。21 is a high voltage rectifier circuit that rectifies the AC high voltage induced in the secondary winding 19 and applies the voltage to the DC high voltage applying device 3 shown in FIG.
22は、電流レベル抽出部であって、直流高圧印加装置
3に流入する電流レベルを抽出する。Reference numeral 22 denotes a current level extraction unit that extracts the current level flowing into the DC high voltage application device 3.
23は、補助電源回路であって、高圧整流回路21の出
力が短絡した場合にも後述するホトヵプラの発光部を制
御しかつ当該ホトカプラの発光部に対して所定レベル例
えば5mA程度の電流を供給し得るように働ら〈。24
は高圧回路直流電流レベル増幅回路、25は増幅器、2
6はリニャリテイ補正回路であって後述するホトカプラ
のリニャリテイを補正するためのものを表わしてめる。Reference numeral 23 denotes an auxiliary power supply circuit which controls the light emitting section of a photocoupler, which will be described later, even when the output of the high voltage rectifier circuit 21 is short-circuited, and supplies a current of a predetermined level, for example, about 5 mA, to the light emitting section of the photocoupler. Work to get it. 24
is a high voltage circuit DC current level amplification circuit, 25 is an amplifier, 2
Reference numeral 6 denotes a linearity correction circuit for correcting the linearity of a photocoupler, which will be described later.
27は2本発明にいうホトカプラの発光部を表わしてお
り、常時発光状態を保って−て、上述の電流レベル抽出
部22によって抽出された電流レベルが増大すると増幅
器25の出力が増大し、当該発光部27はより大きい光
を発する。281−t、、高電圧短絡検出部であって、
比較器29をそなえて(八る。そして比較器29は、ダ
イオード57と抵抗30とからなるいわば基準電圧に対
して、上記電流レベル抽出部22によって抽出された゛
電流レベルが非所望に増大すると、ダイオード31を介
してホトカプラの発光部27を十分に強く発光せしめる
。Reference numeral 27 represents a light emitting section of the photocoupler according to the present invention, which constantly maintains a light emitting state, and when the current level extracted by the above-mentioned current level extracting section 22 increases, the output of the amplifier 25 increases, and the output of the amplifier 25 increases. The light emitting section 27 emits larger light. 281-t, a high voltage short circuit detection unit,
A comparator 29 is provided (8), and the comparator 29 detects ``if the current level extracted by the current level extraction section 22 increases undesirably with respect to a so-called reference voltage made up of a diode 57 and a resistor 30,'' The light emitting section 27 of the photocoupler is caused to emit light with sufficient intensity via the diode 31.
32は、3端子レギユレータであって、低圧直流電圧源
14の電圧変動に拘らず、出力電圧(点Aの電圧)を一
定電圧に維持するよう動作する。32 is a three-terminal regulator that operates to maintain the output voltage (voltage at point A) at a constant voltage regardless of voltage fluctuations of the low-voltage DC voltage source 14.
33は1本発明にいうホトカプラの受光部であって、上
述の発光部27からの光端に対応した電流を抵抗34に
供給する。35は、誤差増幅器であって、抵抗58.3
6.37によって生成された基弗電圧と抵抗34に生じ
るrlj圧とを比較し、その誤差を増幅する。59.6
0は抵抗、38はゼナー・ダイオードを表わしており、
これらは本発明にいう電圧制限回路を419成していて
、誤差増Il@器35の出力電圧が所定1は圧レベル例
えば15[V]以上となることを禁止する。39は、ス
イッチ・レギュレータ・コントロール用比較器であって
。Reference numeral 33 denotes a light receiving section of a photocoupler according to the present invention, which supplies a current corresponding to the light end from the above-mentioned light emitting section 27 to the resistor 34. 35 is an error amplifier with a resistor 58.3
6.37 is compared with the rlj pressure generated in the resistor 34, and the error thereof is amplified. 59.6
0 represents a resistor, 38 represents a Zener diode,
These constitute a voltage limiting circuit 419 according to the present invention, which prohibits the output voltage of the error amplification unit 35 from exceeding a predetermined voltage level of, for example, 15 [V]. 39 is a switch regulator control comparator.
上述の図示抵抗60の出力側電圧レベルと上述のチョッ
パ型スイッチ・レギュレータ15の出力電圧とを比較し
9図示抵抗40.トランジスタ41゜チョッパ型スイッ
チ・レギュレータ15を介して。The output side voltage level of the above-mentioned illustrated resistor 60 is compared with the output voltage of the above-mentioned chopper type switch regulator 15, and the 9 illustrated resistor 40. Through the transistor 41° chopper type switch regulator 15.
点Bの電圧と点Cの「1を圧とが等しくなるような制御
を行わせる。即ち、つ゛し振回路16への直流電源電圧
を制御し、電流レベル抽出部22によって抽出される電
流レベルを一定に例えば4ooCtiA]に保つように
働らく。Control is performed so that the voltage at point B is equal to the voltage at point C. In other words, the DC power supply voltage to the oscillator circuit 16 is controlled, and the current level extracted by the current level extraction unit 22 is 4ooCtiA].
図示端子REMは第2図図示回路を使用状態に制御する
端子であって、当該端子RICMがグランド・レベルに
制御されると抵抗42を介して比較器43の出力がロー
・レベルとなり9発渠回路16を発振可状態に制御する
。そして、比較器43の出力がロー・レベルになるとき
、抵抗44を介してトランジスタ45がオフ状態となり
、抵抗47.48を介してコンデンサ46の充電が開始
され1点1)の電位を徐々に増大せしめ、トランジスタ
49を介して誤差増幅器35に対する電源電圧を徐々に
増大せしめる。これによって1発振回路16が発振状態
に移行する際に、高圧整流回路21の出力がいわゆるオ
ーバ・シュートしようとするのを防止する。換言すると
9図示点Bの電位を徐々に増大せしめるようにし、これ
にi1従する形で点Cの電位を増大せしめ、上述のオー
ツく・シュートを防止する。The illustrated terminal REM is a terminal that controls the illustrated circuit in FIG. The circuit 16 is controlled to enable oscillation. When the output of the comparator 43 becomes low level, the transistor 45 is turned off via the resistor 44, and charging of the capacitor 46 is started via the resistors 47 and 48, gradually reducing the potential at point 1). The power supply voltage to the error amplifier 35 is gradually increased through the transistor 49. This prevents the output of the high voltage rectifier circuit 21 from overshooting when the single oscillation circuit 16 shifts to the oscillation state. In other words, the potential at point B shown in FIG. 9 is gradually increased, and the potential at point C is increased in accordance with i1 to prevent the above-mentioned autoshoot.
第2図図示の構成、即ち本発明の一実施例構成において
は、高電圧回路上に存在する電流レベル抽出部22から
の抽出信号レベルを、低圧直流電圧源の電圧レベルをも
つ回路に導びくに当って。In the configuration shown in FIG. 2, that is, in the configuration of one embodiment of the present invention, the extracted signal level from the current level extractor 22 existing on the high voltage circuit is guided to the circuit having the voltage level of the low voltage DC voltage source. Hit me.
例えば100 CMΩ〕以上の絶縁レベルをとることの
できる ホ ト・カプラ(2’7 、33 )を用いて
いる。そして、当ε亥 ホ ]・・カフ′う(2“7.
33)を一般に用いられる所のオン・オフ制御としてで
なく、いわば比1り11制御の形で使用せしめるよう構
成している。即ち、メン・オフ制御を第2図図示の如き
動作を行わせるに当って採用する場合には一般にはPL
Lm路などを用いる形となるが、このような回vj栴成
にくらべて、比例制御の形でフォト・カプラを用いて安
価にかつ簡単化している。For example, a photocoupler (2'7, 33) capable of providing an insulation level of 100 CMΩ or more is used. And then, this ε亥 ho]...cuff'u (2"7.
33) is configured to be used not as an on/off control as is generally used, but as a so-called ratio 11 control. That is, when employing men-off control to perform the operation shown in FIG.
Although it uses an Lm path, etc., compared to such a circuit, it uses a photocoupler in the form of proportional control, making it cheaper and simpler.
更に、上述の如く、ホ ト・カプラ(27,33)を用
いるに当って必要、な電流答惜を抽出できるようにしか
つ高電圧回路が短絡した場合にも ホ トカグラ(27
,33)を作動状態に置くために。Furthermore, as mentioned above, when using a photocoupler (27, 33), it is possible to extract the necessary current response, and even if the high voltage circuit is short-circuited, the photocoupler (27, 33) can be used.
, 33) in order to put it into operation.
3次巻線20をもうけて補助電源回路23を用いるよう
にしている。更に上述の如く1図示44゜45.46.
47.48.49の構成を用いて。A tertiary winding 20 is provided and an auxiliary power supply circuit 23 is used. Furthermore, as mentioned above, 1 illustration 44°45.46.
Using the configuration of 47.48.49.
高圧整流回路21の出力が非所望にオーツく・シュ−ト
を生じないようにするなどの配慮が行われている。Considerations are taken to prevent the output of the high-voltage rectifier circuit 21 from undesirably overshooting or shooting.
上記の如き配慮が行われているが、第3図(a)(h)
を参照しつつ2本発明の]つの特徴的構成について更に
具体的に説明する。Although the above considerations have been taken, Fig. 3(a)(h)
The two characteristic configurations of the present invention will be explained in more detail with reference to the following.
第3図(a)は、第2図に示す回路構成のうち、出力可
、圧のオーバーシュートを抑制する回路部分を中心にし
、た構成を抽出し7たので、用いられた参照番号は第2
図のものと同一である。FIG. 3(a) is an extraction of the circuit configuration shown in FIG. 2, focusing on the circuit portion that enables output and suppresses pressure overshoot, so the reference numbers used are 2
It is the same as the one shown in the figure.
上述の定N1流高圧電源においては、ホトカプラを用い
″ることにより高圧側回路と低圧側回路とを電気的に絶
縁した状態で、高圧側からの検出信号を高速度で制御に
反映せしめている。しか17.この応答速度にも限度が
あり、特に電源投入時に電圧変成器の2次巻線に第z1
6(h)に示すようなオーバーシュートが生じ、該オー
バーシュートによって上述の静電潜像形成面2上の深い
位貿に帯電状態が生成され、消去部11によって当該帯
電状態を消去し得ない状態となる。本発明においては既
に概説したように、出力電圧の立上り時に誤差増幅器3
5の電源電圧(基準電圧)を制御して上記検出信号のフ
ィードバック作用の遅れを補正して上記オーバーシュー
トを抑制するようにしている。In the above-mentioned constant N1 flow high-voltage power supply, the detection signal from the high-voltage side is reflected in the control at high speed while the high-voltage side circuit and the low-voltage side circuit are electrically isolated by using a photocoupler. However, there is a limit to this response speed, especially when the voltage transformer's secondary winding is turned on when the power is turned on.
An overshoot as shown in 6(h) occurs, and due to the overshoot, a charged state is generated at a deep position on the electrostatic latent image forming surface 2, and the charged state cannot be erased by the erasing section 11. state. In the present invention, as outlined above, when the output voltage rises, the error amplifier 3
The power supply voltage (reference voltage) No. 5 is controlled to correct the delay in the feedback action of the detection signal, thereby suppressing the overshoot.
すなわち、第3図(a)において、REV端子をロー・
レベルにして発振回路16(・君2図)を動作状態に保
っている際には、比較器43(第21ス)の出力はロー
・レベルにあり、4氏抗44を介してトランジスタ45
がオフ状態にあり、コンデンサ46は光′覗された状態
にあり、トランジスタ49をオンせしめて増幅器35に
所へ7の「(り1圧を印加している。電源投入直前にお
いては、REM端子がハイ・レベルにあるために比蚊器
43の出力はハイ・レベルにあって、トランジスタ45
はオンしておりコンデンサ46は放電状襲にあλ。また
高圧系も非作動状態にあってホトカプラの受光部33の
エミッタ電位も0ボルトである。したがって、演算増幅
器を構成している誤差増幅器35はオーブン回路となり
、そのとき増幅器35に印加されて−る電源電圧V+
に近い電圧を出力する。That is, in FIG. 3(a), the REV terminal is set to low.
When the oscillation circuit 16 (see Figure 2) is maintained in the operating state, the output of the comparator 43 (21st step) is at low level, and the output of the comparator 43 (21st step) is at the low level,
is off, the capacitor 46 is exposed to light, and the transistor 49 is turned on to apply 1 voltage to the amplifier 35. Immediately before the power is turned on, the REM terminal is at a high level, the output of the resistor 43 is at a high level, and the output of the transistor 45 is at a high level.
is on and the capacitor 46 is in a discharge state. Further, the high voltage system is also in an inactive state, and the emitter potential of the light receiving section 33 of the photocoupler is also 0 volts. Therefore, the error amplifier 35 constituting the operational amplifier becomes an oven circuit, and at that time, the power supply voltage V+ applied to the amplifier 35 is
Outputs a voltage close to .
したがって、トランジスタ45のコレクターエミッタ電
圧をVca、)ランジスタTr1. T7−2のベース
−エミッタ電圧をそれぞれVBgl、 VB+!!z
、端子14c7)電圧f Vi 、抵抗4’7.48(
7)値を夫k R,。Therefore, the collector-emitter voltage of the transistor 45 is set to Vca, and the transistor Tr1. The base-emitter voltages of T7-2 are VBgl and VB+!, respectively. ! z
, terminal 14c7) voltage f Vi , resistance 4'7.48 (
7) Value kR,.
■<、2とすれば。■ If <, 2.
とiる。?c コテVcp << 1 、 Vsmlキ
\’RFt2幸06V とすれば、上記増幅器:35
の電源電圧V はとなる。したがって高圧出力オフ(0
状態)でi−t、。That's what I mean. ? c If Vcp << 1, Vsml key\'RFt2 06V, the above amplifier: 35
The power supply voltage V is as follows. Therefore, high voltage output is turned off (0
state) in i-t,.
誤差増1隅器35は上記V で待機(アイドリング)し
ている。The error intensifier 35 is on standby (idling) at the above-mentioned V.sub.2.
この状態において、FIM端子がロー・レベルにされる
とトランジスタ45がオフ状態とされ。In this state, when the FIM terminal is brought to a low level, the transistor 45 is turned off.
コンデンサ46の充電が開始されてゆく。一方高圧系も
作動状態に入ってゆくが、誤差増幅器35の電源電圧V
は民抗R,R2,コンデンサ46の容情Cの時定数(
R1十R2)’ Cで定まる速度で増大される形となる
。したがって、誤差増幅器35の出力も徐々に変化して
ゆく形となり1発振回路16(第2図)が発振1ノζ態
に移るとき鴎、高圧整流回路21の出力が第3図く々)
のようにオーバーシュート(図示実線)するのが抑制さ
れる。Charging of the capacitor 46 begins. On the other hand, the high voltage system also enters the operating state, but the power supply voltage V of the error amplifier 35
is the time constant of civil resistor R, R2, and capacitor 46 C
It increases at a rate determined by R10R2)'C. Therefore, the output of the error amplifier 35 also changes gradually, and when the first oscillation circuit 16 (FIG. 2) shifts to the first oscillation state, the output of the high voltage rectifier circuit 21 changes as shown in FIG.
Overshoot (solid line in the figure) as shown in the figure is suppressed.
以上述べたように2本発明においては、低圧側の誤差増
幅器に対する′電源電圧を除々に増大させるような回路
構成にすることによって高圧出力の立上り時のオーバー
シュートが防止されうる。As described above, in the second aspect of the present invention, overshoot at the rise of the high voltage output can be prevented by configuring the circuit to gradually increase the power supply voltage for the error amplifier on the low voltage side.
第1図は静電複写装置げの構成について説明する説明図
、第2図は本発明の高圧電源回路の一実施例全体構成を
示し、第3図(a)は第2図の主要部分を抽7Js L
だ回路構成を示し、第3図(h)は高圧出力のオーバー
シュート状態を示す図である。
図中、1は回転ドラム、2は静電潜像形成面。
3は静電荷印加部に対応する直流高圧印加装置。
6は静電潜像、7はトナー共給部、8はコピー用紙、1
4は低圧直流電圧源、15はチョッパ型スイツチ・レギ
ュレータ、16は発振回路、17は電圧変成器、18,
19.20は夫々巻線、21は高圧整流回路、22は電
流レベル抽出部、23は補助電源回路、24は高圧回路
直流電流レベル増幅回路、27はホトカプラの発光部、
32は3端子レギユレータ、33はホトカプラの受光部
。
35は誤差増幅器、59,60.38は電圧制限回路、
39はスイッチ・レギュレータ・コントロール用比較器
を表わしている。
特許出願人 澤#電機株式会社
代理人弁理士 森 1B 寛(外3名)才1
mFIG. 1 is an explanatory diagram for explaining the structure of an electrostatic copying apparatus, FIG. 2 shows the overall structure of an embodiment of the high-voltage power supply circuit of the present invention, and FIG. 3(a) shows the main parts of FIG. Lottery 7Js L
FIG. 3(h) is a diagram showing an overshoot state of the high voltage output. In the figure, 1 is a rotating drum, and 2 is an electrostatic latent image forming surface. 3 is a DC high voltage application device corresponding to the electrostatic charge application section. 6 is an electrostatic latent image, 7 is a toner co-feeding section, 8 is copy paper, 1
4 is a low voltage DC voltage source, 15 is a chopper type switch regulator, 16 is an oscillation circuit, 17 is a voltage transformer, 18,
19. 20 are windings, 21 is a high voltage rectifier circuit, 22 is a current level extraction section, 23 is an auxiliary power supply circuit, 24 is a high voltage circuit DC current level amplification circuit, 27 is a photocoupler light emitting section,
32 is a three-terminal regulator, and 33 is a photocoupler light receiving section. 35 is an error amplifier, 59, 60.38 is a voltage limiting circuit,
39 represents a switch regulator control comparator. Patent Applicant Sawa #Denki Co., Ltd. Representative Patent Attorney Mori 1B Hiroshi (3 others) 1 year old
m
Claims (1)
に静電荷を印加する静電荷印加部をそなえ、該静電荷印
加部によって与えられた静電荷を利用して上記静電潜像
形成面上に静電潜像を形成せしめて記録を行う静電複写
装置において、低圧直流電圧源に接続されるチョッパ型
スイッチ・レギュレータ、該スイッチ・レギュレータの
直流出力電圧に対応した交番電圧を生成する発振回路。 該発振回路の交番出力電圧が1次巻線に供給される電圧
変成器、該電圧変成器の2次巻線に接続されて上記静電
荷印加部に直流高電圧を印加する高圧整流回路、該高圧
整流回路から上記静電荷印加部に供給される直流電流の
電流レベルを抽出する電流レベル抽出部、上記電圧変成
器の3次巻線に接続される補助電源回路、該補助電源回
路からの出力電圧によって附勢されかつ上記電流レベル
抽出部によって抽出された電流レベルを増幅する電流レ
ベル増幅器、該電流レベル増幅器によって励磁されかつ
常時発光状態に置かれて上記電流レベルによって発光レ
ベルを変化するホトカプラの発光部、上記低圧直流電圧
源に接続されて低圧基準電圧を生成する電圧レギュレー
タ、該電圧レギュレータの出力に接続される上記ホトカ
プラの受光部、該ホトカプラの受光部に対応する出力が
入力される誤差増幅器、該誤差増幅器の帆#、電圧回路
に接続され該誤差増幅器の電源電圧を所定の値から漸増
させる制御手段を備え、前記発振回路の発振状態への移
行に際し、上記誤差増幅器の電源電圧を漸増的に制御し
て上Ri2 ’FIt圧変成dの2次巻線に生じる非所
望なオーバーシュートを防止したことを特徴とする静電
複写装置高圧電源回路。[Scope of Claims] An electrostatic latent image forming surface is provided, and an electrostatic charge applying section that applies an electrostatic charge to the electrostatic latent image forming surface is provided, and the electrostatic charge applied by the electrostatic charge applying section is utilized. In an electrostatic copying apparatus that records by forming an electrostatic latent image on the electrostatic latent image forming surface, a chopper-type switch regulator connected to a low-voltage DC voltage source, and a DC output voltage of the switch regulator are provided. An oscillator circuit that generates the corresponding alternating voltage. A voltage transformer to which the alternating output voltage of the oscillation circuit is supplied to the primary winding; a high voltage rectifier circuit connected to the secondary winding of the voltage transformer to apply a DC high voltage to the electrostatic charge applying section; A current level extraction unit that extracts the current level of the DC current supplied from the high voltage rectifier circuit to the electrostatic charge application unit, an auxiliary power supply circuit connected to the tertiary winding of the voltage transformer, and an output from the auxiliary power supply circuit. a current level amplifier that is energized by a voltage and amplifies the current level extracted by the current level extraction section; a photocoupler that is excited by the current level amplifier and is always placed in a light emitting state to change the light emission level depending on the current level. a light emitting section, a voltage regulator connected to the low voltage DC voltage source to generate a low voltage reference voltage, a light receiving section of the photocoupler connected to the output of the voltage regulator, and an error in which the output corresponding to the photocoupler is input. An amplifier, a control means connected to the voltage circuit and gradually increasing the power supply voltage of the error amplifier from a predetermined value, and controlling the power supply voltage of the error amplifier when the oscillation circuit shifts to the oscillation state. 1. A high-voltage power supply circuit for an electrostatic copying apparatus, characterized in that an undesired overshoot occurring in the secondary winding of the upper Ri2' FIt pressure transformer d is prevented by incremental control.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16558482A JPS5956865A (en) | 1982-09-22 | 1982-09-22 | High voltage power source circuit for electrostatic copying machine |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16558482A JPS5956865A (en) | 1982-09-22 | 1982-09-22 | High voltage power source circuit for electrostatic copying machine |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5956865A true JPS5956865A (en) | 1984-04-02 |
JPS644427B2 JPS644427B2 (en) | 1989-01-25 |
Family
ID=15815127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16558482A Granted JPS5956865A (en) | 1982-09-22 | 1982-09-22 | High voltage power source circuit for electrostatic copying machine |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5956865A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62227122A (en) * | 1986-03-28 | 1987-10-06 | Nec Corp | Method for orientating high polymer liquid crystal |
FR2755318A1 (en) * | 1996-10-28 | 1998-04-30 | Fujitsu Ltd | Voltage regulator circuit integrated into semiconductor integrated circuit |
US7474542B2 (en) | 2004-05-04 | 2009-01-06 | Samsung Electronics Co., Ltd. | High voltage power supply |
-
1982
- 1982-09-22 JP JP16558482A patent/JPS5956865A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62227122A (en) * | 1986-03-28 | 1987-10-06 | Nec Corp | Method for orientating high polymer liquid crystal |
FR2755318A1 (en) * | 1996-10-28 | 1998-04-30 | Fujitsu Ltd | Voltage regulator circuit integrated into semiconductor integrated circuit |
US7474542B2 (en) | 2004-05-04 | 2009-01-06 | Samsung Electronics Co., Ltd. | High voltage power supply |
Also Published As
Publication number | Publication date |
---|---|
JPS644427B2 (en) | 1989-01-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8213823B2 (en) | High-voltage power supply device and image forming apparatus including the same | |
US5684685A (en) | High voltage power supply for image transfer and image forming apparatus using the same | |
JPS5956865A (en) | High voltage power source circuit for electrostatic copying machine | |
US12099323B2 (en) | Power supply apparatus for supplying various voltages and image forming apparatus operating on voltage supplied from power supply apparatus | |
JPH0127422B2 (en) | ||
JPH0348509B2 (en) | ||
US6731892B2 (en) | Image forming apparatus having high-voltage power supply | |
JP2007072072A (en) | Image forming apparatus | |
JP2009128416A (en) | Image forming apparatus and its control method | |
JPH0318428B2 (en) | ||
JP3228298B2 (en) | AC bias power supply | |
JP2019033645A (en) | Power supply device and image forming apparatus | |
JPS6412183B2 (en) | ||
JPS644428B2 (en) | ||
JPS64914B2 (en) | ||
US11467511B2 (en) | Technique for adjusting development voltage in developing device provided in image forming apparatus | |
JP3825979B2 (en) | Image forming apparatus | |
JPH10201230A (en) | Dc high voltage power supply drive circuit | |
JP3299879B2 (en) | Image forming device | |
JP2608279B2 (en) | Charger | |
JP2951993B2 (en) | Image forming device | |
JPH01103447A (en) | Image forming device | |
JPH10246994A (en) | Image forming device | |
JPS63128368A (en) | High voltage generating device in electrostatic photographic-image forming device | |
JP2016090700A (en) | Power control device and image forming apparatus |