JPS5953820A - Flash device for additional multiple lighting - Google Patents

Abstract

PURPOSE:To obtain proper exposure regarldess of the kind of a main flash device, by performing photometry and integration for a specific time synchronously with the flashing of the main flash device, and determining whether a flash device for multiple lighting is turned on or not basing on the decision on an integral value. CONSTITUTION:When a synchro contact 23 is turned on, the main flash device starts lighting and a photometic circuit 43 and a delay time setting circuit 42 are put in operation. Consequently, the reflected light from a subject by the flashing of the main flash device is metered 32 and integrated 33, and when the quantity of light is sufficient and the integral value exceeds a specific value, a transistor (TR) 39 turns on to form a short circuit between the gate and cathode of a trigger thyristor 9, inhibiting multiple lighting after the delay time. When the quantity of light is insufficient, on the other hand, the TR39 is still off and the additional multiple lighting is carried out.

Description

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, the light KL of the flash device for a camera, especially the main flash device.
This invention relates to a flash device for multiple flashes that fires multiple flashes to compensate for the insufficient amount of light when the amount of light is insufficient for photographing.

Conventionally, when taking photographs using a flash device.

When the amount of light emitted by a single flash device was insufficient, a so-called multi-flash technique was used in which another flash device was added to make up for the insufficient amount of light.

However, it has been extremely difficult to automatically control the amount of light from a plurality of flash devices to obtain an appropriate amount of exposure.

In particular, the amount of light emitted by flash devices and the like built into compact cameras is small, and therefore few flash devices themselves have an automatic light amount control function.

Therefore, in the case of a flash device built into a compact camera, the conventional device cannot be used as is, even though there are many cases where the amount of light is insufficient and additional flashes are required.

The present invention has been made in view of the drawbacks of the conventional device, and its purpose is to eliminate the drawbacks of the conventional device as described above, and to provide a flash device regardless of the frequency of use of the flash device.
To provide a flash device for multiple flashes configured to ensure an appropriate amount of exposure for photography by emitting flash light only when the amount of light is insufficient.

The present invention will be explained in detail below based on illustrated embodiments. FIG. 1 is a circuit diagram showing an embodiment of a multiple flash device according to the present invention. In Figure 1, connect the power switch S to the power supply E.
An oscillating booster circuit 5 consisting of a transistor 1, a capacitor 2, an oscillating transformer 3, and a resistor 4 is connected via the voltage VV.

The output of this oscillating external pressure circuit 5 is supplied to a main capacitor 7 via a diode 6. The main capacitor 7 includes a series circuit of a resistor 8 and a trigger thyristor 9, a series circuit of a flash discharge tube 10 and a main thyristor 11, a resistor 12 and a commutating thyristor 13.
series circuits are connected in parallel. The trigger thyristor 9 includes a trigger capacitor 14 and a trigger transformer 15.
A series circuit of primary windings 15a is connected in parallel, and one end of the secondary winding 15b of the trigger transformer 15 is connected to the trigger electrode 10a of the flash discharge tube 10, and the other end is connected to the flash discharge tube 1.
0 and the connection point P1 of the main thyristor 11, respectively. A resistor 16 is connected in parallel to the main thyristor 11, and a series circuit of a commutating capacitor 17, a resistor 18, a capacitor 19, and a resistor 20 is further connected in parallel. A connection point P2 between the capacitor 19 and the resistor 20 is connected to the gate of the main thyristor 11. Also, capacitor 1
A connecting point P3 between the resistor 7 and the resistor 18 is connected to a connecting point P4 between the resistor 12 and the commutating thyristor 13.

The base of a transistor 21 whose emitter is connected to the positive end of the power source E is connected to the negative end of the power source E via a series circuit consisting of a resistor 22 and a synchro contact 23. A series circuit of a resistor 24 and a constant voltage diode 25 is connected to the collector load of this transistor 21. Constant voltage diode 25 Niha converter 26, converter f27, resistor 2
A series circuit of 8 and a capacitor 29, a series circuit of 30° and 310 resistors, a series circuit of a light receiving element 32 and an integrating capacitor 33,
A series circuit of a resistor 34 and a transistor 35 is connected in parallel. The non-inverting input terminal of the comparator 26 is connected to the connection point P5 between the resistor 28 and the capacitor 29, the inverting input terminal is connected to the connection point P6 between the resistor 30 and the resistor 31, and the output terminal of the comparator 26 is connected to the connection point P5 between the resistor 28 and the capacitor 29. It is connected to the gate of the trigger thyristor 9 through the resistor 37, and at the same time to the base of the transistor 35 through the resistor 37.

The non-inverting input terminal of the comparator 27 is connected to the connection point P7 between the light receiving element 32 and the integrating capacitor 33, and the inverting input terminal is connected to the connection point P6. transistor 39
0 base, resistor 40, capacitor 5
It is connected to the collector of the transistor 41 through 0.

The transistor 39 has its emitter connected to the cathode of the power source E, and its collector connected to the gate of the trigger thyristor 9. On the other hand, the emitter of the transistor 41 is connected to the power supply E, and the base thereof is connected to the connection point P8 between the resistor 34 and the transistor 35.

The reference numeral 42 surrounded by a broken line in FIG. 1 is a setting circuit that sets the delay time from the turn-on of the synchro contact 23 to the time when the flash device emits light. On the other hand, 43, which is also surrounded by a broken line, forms a photometry circuit for dimming.

One embodiment of the present invention has the above-mentioned configuration, and its operation will be explained below.

When the power switch SW is turned on, the oscillation booster circuit 5 is activated to charge the main capacitor 7, trigger capacitor 14, and commutating capacitor 17 through the diode 6 to the polarities shown in the figure.

When the charging voltage of the main capacitor 7 reaches a sufficiently high value to cause the flash discharge tube 10 to emit light, the synchro contact 23 is turned on. (referred to as "1 main flash device") starts emitting light.

Furthermore, when the synchro contact 23 is turned on, a base current flows through the transistor 21 via the resistor 22, and at the same time as the transistor 21 is turned on, a current is supplied to the constant voltage diode 25 via the resistor 24, and a current is generated across the transistor 21. The voltage serves as a power supply voltage for control circuits including the delay time setting circuit 42 and the photometry circuit 43.

Therefore, when the main flash device emits light and the reflected light from the subject enters the light receiving element 32, the integrating capacitor 33 is charged by a photoelectric current corresponding to the intensity of the incident light. Further, the delay time setting circuit 42 starts working when power is supplied to the constant voltage diode 25I. Simultaneously with the start of power supply, the capacitor 29 is charged through the resistor 28,
The potential at the connection point P5 between the resistor 28 and the capacitor 29 gradually rises, and when it becomes higher than the potential at the point P6, which is obtained by dividing the voltage across the constant voltage diode 25 by the resistor 30.31, the output from the comparator 26 reaches a hello level. Reverse the level. Time T from the turn-on of the synchro contact until the output of the comparator 26 is reversed. is set to the maximum value of the main flash emission time.

The operation from here on will be explained separately for cases in which the light intensity of the main flash device is sufficient (Fig. 2) and cases in which it is insufficient (Fig. 3), with reference to the waveforms in Figs. 2 and 3. do. Note that FIGS. 2(A) and 3(A) are waveform diagrams showing temporal changes in the flash intensity, and FIGS. 2(B) and 3(ft'31) show temporal changes in the voltage across the integrating capacitor 330. FIG. First, consider a case where the light intensity of the main flash device is sufficient.

This corresponds to FIG. 2(A). Since the light intensity of the main flash device is sufficient, the time T from when the synchronizer contact 23 closes until the delay time setting circuit 42 is reversed, is reached before the connection point where the charging voltage of the integral capacitor 33 corresponds to the appropriate exposure amount. The output of the υ comparator 27, which is higher than the voltage of P6, is inverted from low level to high level. Let this time be <T, as shown in FIG. 2(B). When the comparator 27 becomes high level, the resistor 38 is connected to the transistor 39.
A pace current flows through the transistor 39, turning on the transistor 39, and short-circuiting the gate and cathode of the trigger thyristor 9. This state is maintained, so even if the output of the comparator 26 becomes high level at time T0, the trigger is not triggered. No trigger signal is generated at the gate of the thyristor 9, thereby prohibiting additional light emission. Also, at time T1, a positive pulse is momentarily supplied to the gate of commutating thyristor 13 through the series circuit of resistor 40 and capacitor 50, but at time T1, the output of comparator 26 is still at a low level. Since the base current is not supplied to transistor 35 and it is in a cut-off state, transistor 4
1 through the resistor 34, the transistor 41 is turned on, and the pulse transmitted from the output of the comparator 27 through the resistor 40 and capacitor 50 is absorbed by the transistor 41. resistance 40
If the time constant of the capacitor 50 is made sufficiently small, the above-mentioned pulse will disappear at time T0, and the commutating thyristor 13 will not be turned on inadvertently. From the above, if the amount of light from the main flash device is sufficient, the multiple flash device will not emit light.

Next, consider a case where the light intensity of the main flash device is insufficient.

This corresponds to FIG. In this case, as shown in FIG. 3 fBl, the time T is after the main flash light emission period has completely ended. Also in the case of proper exposure fh5B, ') RALE f, the comparator 27 is at a low level. Therefore, in this case, the pace current is not supplied to the transistor 39 and the transistor 39 is not supplied with pace current.
9 is in the cutoff state. Therefore, if the comparator 26 goes from low level to high level after a predetermined time 171 in this state, the trigger thyristor 9 will be activated via the resistor 36.
A current is supplied to the gate of the trigger thyristor 9, and the trigger thyristor 9 is turned on. When the trigger thyristor 9 is turned on, the charge in the trigger capacitor 14 is discharged through the primary winding 15a of the trigger transformer 15, and the high voltage induced in the secondary winding ISB of the trigger transformer 15 is applied to the trigger electrode of the flash discharge tube 10. 10a to ionize the flash discharge tube 10, and this discharge current is applied to the gate of the main thyristor 11 via the commutating capacitor 17 etc., the main thyristor 11 is turned on, and the flash discharge tube io starts emitting light. .

The reflected light from the subject due to this emission is photoelectrically converted by the light receiving element 32, and the integration capacitor 33 continues to be charged in addition to the charging voltage for the main flash device. And the charge of the integral capacitor! When the voltage exceeds the potential at the connection point P6, the output of the comparator 27 changes from low level to high level, and a positive pulse is supplied to the commutating thyristor 13 through the resistor 40 and capacitor 5°. Since this time is after To, the comparator 26 is at a high level, and the base current is supplied to the transistor 35 through the resistor 37, and the transistor 35 is in the on state.Therefore, the pace emitter of the transistor 41 is short-circuited, and the transistor 41 is cut off. are doing. Therefore, by inverting the output of the comparator 27 from a low level to a high level, the pulse supplied to the gate of the commutating thyristor 13 via the resistor 40 and capacitor 50 is not absorbed by the transistor 41 and is transferred. flow thyristor 13
turns on. As a result, a commutation circuit consisting of the commutation capacitor 17, the commutation thyristor 13, and the main thyristor 11 is formed, and the commutation capacitor 17 flowing through this commutation circuit
The main thyristor 11 is turned off by the discharging current of the charges previously charged, causing the flash discharge tube 100 to stop emitting light, thereby obtaining an appropriate amount of exposure.

As explained above, the multiple flash device according to the present invention preferentially uses the flash of the main flash, so it does not emit light when the main flash has a sufficient scene, and the light intensity of the main flash is sufficient to take photos. It is configured to assist the main flash device by emitting light only when the flash is insufficient for photographing, so it can be used with various flash photography devices, and it can also be used in cases where the flash device used in combination does not emit light due to an accident, etc. Inconveniences such as failure in taking photographs are also solved.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing an embodiment of the multiple flash unit according to the present invention, and Figures 2 (A> and I3) are the flash waveforms when the main flash unit has a sufficient field of view, respectively. Waveform diagram showing the waveform of sight integration value, Figure 3 (A), +8)
2 is a waveform chart showing a flash waveform and a waveform of a light amount integrated value when the light amount of the main flash device is insufficient, respectively. 7... Main capacitor, 10... Flash discharge tube 11.
...Main thyristor, 13... Commutation thyristor 23...
- Synchro contact, 32... Light receiving element 33... Capacitor, 42... Delay time setting circuit 43... Photometric circuit. Patent applicant Canon Co., Ltd. 136 (△) 8 temples 10 (B) Time 5M (△) (B)

Claims (1)

[Claims] (1) In response to the camera's tuning signal, the photometry means becomes operational, and the photometry means! 0 i11+1 A multi-flash flash device characterized in that a detection means detects an integrated value of the leading claw within a predetermined period of time during which light is emitted, and that the light is emitted when the product of the amount of light minus the zero value is equal to or less than a predetermined value. (2. In the flash device for J9 lamps according to claim (1), when the sum of the light amounts of the main flash and the multiple flashes reaches a predetermined value for appropriate exposure. A flash device for multiple flashes that is characterized by stopping.