JPS595212A - Driving circuit for storage type image sensor - Google Patents

Abstract

PURPOSE:To enable the control of the storage time of a storage type image sensor CCD at a high respone without hunting by correcting adequately the image signal from the CCD accoding to the size of the integration level thereof. CONSTITUTION:The time serial image signal from a storage type image sensor CCD 7 is converted to electric current by a voltage-current conversion circuit 81, whereafter the current is integrated in an integration circuit 82. The integrated output voltage is compared with a reference voltage value 83 indicating the level of the correct quantity of light. The rate of correction corresponding to the difference thereof is inputted to a circuit 85 for varying storage time. The circuit 85 generates the shift pulse corresponding to the rate of correction inputted thereto and controls the period of the shift pulses of the CCD 7, that is, the storage time of the CCD 7. Then, if the integration level from the image signal is deviated large from the level of the correct quantity of light, the correction is thoroughly accomplished and if the difference is small, the rate of correction is decreased; therefore, the storage time of the CCD is controlled at a fast response without hunting.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit for an accumulation type image sensor, and in particular, to a drive circuit for an accumulation type image sensor, and in particular, when converting a subject image into a time-series image signal, the accumulation time of the image sensor is changed according to the output level of the image signal. The present invention relates to an improvement in a drive circuit for a storage type image sensor that increases the dynamic range of this image sensor.

Conventionally, storage type image sensors have been used as sensors for extracting subject images in pattern matching, image measurement control, autofocus devices, and the like. In particular, in the case of camera autofocus devices, it is used to detect the amount of image deviation using a baseline rangefinder method or the sharpness of an image using an extreme value method, but the dynamic range of current image sensors is This is very narrow compared to the possible brightness range of the subject, so by changing the storage time of the image sensor according to the brightness of the subject and changing the sensitivity of the image sensor to the same constraint, the dynamic range can be improved. Techniques for increasing this are known.

The above-mentioned known technology is broadly divided into a method in which a light receiving element for detecting the brightness level of the subject is newly arranged and the accumulation time of the image sensor is changed according to the intensity of the light receiving element, and a method in which the accumulation time of the image sensor is changed according to the intensity of the light receiving element, and the above-mentioned output level. It is classified as a method in which a time-series image signal of the subject image of the image sensor is used for detection, and the accumulation time of the image sensor is changed according to the level of this image signal.

However, the former method has the spatial and economical problems of arranging a new light-receiving element, as well as the problem of the lux between the light-receiving surface of the light-receiving element and the light-receiving surface of the image sensor, which is a problem that still needs to be solved in terms of design. There are many.

Although the latter method does not have any of the above-mentioned problems, generally, when detecting the level of the time-series image signal of the image sensor, the output level of the image sensor is set to an oat+-S quasi-level and an under-reference level. If the signal level is within these reference levels, the accumulation time is not changed, and if the image signal level exceeds the over reference level, the accumulation time is shortened, and the image signal level is under the reference level. Technological means are used to lengthen the storage time when it falls below .

However, in this method, even if the image signal level is low overall (a rail slightly above the under reference level), if there is a portion that exceeds the over reference level, the overall level will further increase. It has the disadvantages of slow response and a tendency to cause hunting.

As described above, the technology to expand the dynamic range of the image sensor by changing the storage time of the image sensor according to the brightness level of the subject is not practical for use as an autofocus camera because the technical means to solve this problem are still insufficient. It was necessary to develop technical means for new solutions.

In view of these circumstances, it is an object of the present invention to provide a technical means that eliminates all the drawbacks of the conventional solutions described above.

Based on the latter method described above, this technical means uses an integral function to detect the image signal level, integrates the image signal, calculates the difference between this integral level and a reference level, and calculates the calculated amount. The storage time of the image sensor is changed accordingly.

Hereinafter, the present invention will be described based on a preferred embodiment of the accompanying drawings.

FIG. 1 shows a schematic perspective view of the circuit of the present invention applied to an autofocus camera.

A subject light beam passing through an afocal lens system 1 consisting of a focus lens system and a zoom lens system is divided by a light splitter 2 into light beams for photographing and for focus detection.

The photographing light beam forms an optical image of the subject on a film surface or an imaging surface 4 by an imaging lens 3.

Luminous flux for focus detection, afocal lens system in %1
The light beam from the vicinity of A of the afocal lens system 1 forms an optical image of the subject on the left side of the image sensor (hereinafter referred to as "CCD") 7 by the imaging lens 5.
The light flux from the vicinity forms an optical image of the subject on the right side of C0D7 in the figure by the imaging lens 6.

The two subject images formed by the two light beams formed on the CCDr are left and right when the light beam from the afocal lens system 1 is a parallel light beam, that is, when the optical image on the film surface 4 is correctly focused. If the image formation position corresponds to a predetermined position and the optical image is not focused correctly, the left and right image formation positions correspond to the front and back of the focus shift, and are moved from the predetermined position to each other in the left and right direction. This causes misalignment.

Therefore, the shift focus position is detected by detecting the amount and direction of shift between these two images. This focus detection method is well known as a baseline distance meter method.

The two optical images on the CCDr are transferred to a CCD drive circuit 8 to be described later, converted into time-series image signals by shift pulses, etc., and inputted to the drive circuit 8 and a binarizer 9.

The binarizer 9 converts the input time-series image signal as an analog quantity into binarized signals of rHJ and rLJ, and inputs the signals to the correlator 10. This binarization process digitally performs arithmetic processing for focus detection to increase speed and accuracy, and is a very effective method, and is often used in these image processing methods.

The binarized time-series image signal is separated into an image signal from the light beam A and an image signal from the light beam B by two registers included in the correlator 10. These separated image signals are sent to an arithmetic circuit 1 as a correlation signal based on the degree of coincidence between them.
Enter 1.

The maximum value of this correlation signal is detected by a peak value hold circuit included in the arithmetic circuit 11, and the amount of deviation from the reference value up to this maximum value is calculated by the arithmetic circuit 11 and inputted to the drive circuit 12.

This drive circuit 12 drives and controls the focus lens system within the afocal lens system 1 in the optical axis direction via a drive motor (not shown) based on the amount of shift and direction of shift, and focuses the focus on the film surface 4. It is automatically adjusted.

The above configuration and explanation is an outline of a general autofocus mechanism using a baseline rangefinder, and for example,
Since the CCD drive circuit 8 is disclosed in Japanese Patent No. 1111, a detailed explanation thereof will be omitted, and the CCD drive circuit 8, which is a main feature of the present invention, will be described in detail below.

FIG. 2 is a block diagram showing the configuration of the COD drive circuit 8. As shown in FIG.

The time-series image signal from the CCD 7 is sent to a voltage-current conversion circuit 8.
1 and then integrated by an integrating circuit 82. This integrated output voltage is compared with a reference voltage value 83 representing an appropriate light amount level, and a correction amount proportional to the difference is input to the accumulation time variable circuit 85. Here, a shift pulse corresponding to the correction amount inputted to the accumulation time variable circuit 85H is generated, and the cycle of the shift pulse of C0D7, that is, CC
It controls the accumulation time of D7.

FIG. 3 shows a detailed circuit diagram of the blocks 81 to 84 described above.

A time-series image signal from the CCD 7 is input to the terminal T1. This signal is input to the negative input terminal of operational amplifier OPI via analog switch S1 and resistor R1 controlled by timing generation circuit 80.

A reference voltage Vr corresponding to the signal level when the brightness of the subject is clear black is connected to the positive input terminal of this operational amplifier OPI.
@fl is applied.

Therefore, the signal is connected to this operational amplifier OP1, the resistor R
1 and a reference voltage to convert it into a stain current value.

Further, an integrating capacitor C1 and an analog switch SS controlled by the timing generating circuit 80 are arranged in parallel in the negative feedback path of the operational amplifier OPI, and the current is integrated into this capacitor CI.

The output of this operational amplifier OPI is a comparator Each is input to the positive input terminal of OP4.

A reference voltage Vr@fl whose brightness of the subject corresponds to an appropriate light amount level is applied to the positive input terminal of the comparator OP.

Furthermore, the output of comparator OPl is analog switch S
s and an inverter INV.

Shitagatte, Konno parable - 10P*u operational amplifier OPI
It is determined whether the output is over or under the appropriate light level, and depending on the result, one of the switches Ss and S4 is turned on.

These switches S3 and S4 are connected in series and connected to the power supply K via a resistor R2 and to ground via a resistor R8, respectively.

The connection point of these switches S3 and S4 is connected to the negative input terminal of operational amplifier OP8. The reference voltage Vref2 is applied to the positive input terminal of this operational amplifier OP3, and the analog switch S controlled by the capacitor C2 and the timing generation circuit 80 is connected to the negative feedback path.
S are arranged in parallel.

Therefore, the signal level of the output of the operational amplifier OPs changes with a constant positive or negative slope from the appropriate light amount level, and this positive or negative slope is determined by the switches S3 and S4.

The output of the operational amplifier OP3 is input to the negative input terminal of the operational amplifier OP4, which has a positive input terminal to which the output of the operational amplifier OP1 is input.

The output of this operational amplifier OP4 is an AND circuit AND,
and one input terminal of the inverter INV! are respectively input to one input terminal of the AND circuit A N D *. The other input terminals of these AND circuits ANDI $- and ANDz are connected to the fourth Ang OP! The output of the output through the inverter INVI and the operational amplifier O
P! The output of each is input.

In addition, the outputs of these AND circuits A N D s and AND2 are connected to the switch S6 marked with # in the series circuit of resistor R4, analog switch S, analog switch Sγ, and resistor R6.
and 87.

A capacitor C3 is connected between the connection point of these switches S6 and S7 and ground, and the terminal voltage of this capacitor C3 is taken out as a terminal T and inputted to a storage time variable circuit 85, which will be described later.

The operation of these circuits will be explained below with reference to FIG.

FIG. 4 shows a time chart of each output terminal in the circuit connection diagram shown in FIG. 3, and shows cases (1) and (2) when the output of the operational amplifier OP1 is lower than the appropriate light level and (2), respectively.

- When the switch 81 and S2 are turned on, the image signal from the Tl terminal charges the trap capacitor CI, and the output of the operational amplifier OPi rises. Thereafter, eight pressure switches are turned off after being charged with the signal for a predetermined period of time.

If the output voltage of the operational amplifier OPs at this time is lower than the appropriate light intensity level Vref2, it means that the light intensity is too large. The switch S is turned on and the switch S6 is also turned off at the same time. Therefore, the output voltage of the operational amplifier OPs drops below the reference voltage Vrefl. Also, since the output voltage of the operational amplifier OP1 is input to the positive input terminal of the operational amplifier OP4, when the output voltage drops to this output value, the output voltage of the operational amplifier OP4 becomes "
H”.

Therefore, the output voltage of the AND circuit ANDI remains rLJ, and the output voltage of the AND circuit AND continues in the rHJ state until the operational amplifier OP4 is inverted, and then rL
It becomes J. While the AND circuit ANDI is in the rHJ state, the switch S7 is turned on and the output voltage of the capacitor y"'?-○s drops. In this way, the rH of the AND circuit AND,
The time in the J state is long when the output voltage of the operational amplifier 7'OPt is significantly lower than the appropriate light level Vrefl.
If the difference is small, do not shorten the length.The terminal T! The output voltage of is controlled to decrease.

Furthermore, if the output voltage of the operational amplifier OPs is higher than the appropriate sight level Vrsfl, this means that the amount of light is too small. When the output voltage of is at rLJ level, switch S4 is turned on and switch S is also turned off at the same time. Therefore, the output voltage of the operational amplifier OPm increases higher than the reference voltage Vrefl. Further, since the output voltage of the operational amplifier op is input to the positive input terminal of the operational amplifier oP4, the output voltage of the operational amplifier OP4 becomes rLJ when the output voltage rises to this output value.

Therefore, the output voltage of the AND circuit AND2 remains rLJ, and the output voltage of the AND circuit AND2 remains unchanged.

The output voltage continues in the rHJ state until the operational amplifier OP4 is inverted, and then becomes rLJ.

While the AND circuit ANDs is in the rHJ state, the switch S6 is turned on and the output voltage of the capacitor Cs increases.

In this manner, the output voltage of the terminal T mushroom is controlled to increase in accordance with the difference between the integrated value level of the image signal and the appropriate light amount level of both sets.

In the above description, the image signal output level has been explained as being higher as the brightness of the subject becomes darker, but it goes without saying that even if the image signal output level is the opposite, it can be controlled in the same way with a slight design change.

The terminal T! created by these circuits! Since the output voltage rises and falls depending on the magnitude of the integrated value level of the image signal, it is sufficient to form the shift pulse φX of C0D7 proportional to this output voltage.

FIG. 5 is a circuit connection diagram showing one embodiment of the accumulation time variable circuit 85 that forms this shift pulse φX.

The output voltage of the terminal T2 is inputted to the negative input terminal of the operational amplifier OPs via the terminal 'rs. This operational amplifier o
A time setting circuit consisting of a resistor R6 and a capacitor C4 is connected to the positive input terminal of the transistor p, and a transistor Tr to which a shift pulse φX is inputted via a pace resistor R7 is connected to the capacitor C4.

The output signal of the operational amplifier OPs is sent to an AND circuit AND4.
A signal from the monostable multivibrator MM is inputted to one terminal via the input terminal. This AND circuit ANDa has a counter COU that counts the number of transfer pulses φ1 as the other input.
The output signal of is input. This counter COU generates an output at a count corresponding to the number of pixels of the CCD 7, and is a so-called safety circuit that prevents a shift pulse from being generated before the time-series image signal has been sent out.

The vibrator MM has a resistor R8 for time setting.
A time constant circuit consisting of a capacitor C6 and a capacitor C6 is connected,
The output signal of this vibrator MM is a ViD type flip-flop.

is input to the D terminal of

On the other hand, the clock terminal C of this flip-flop fFF is the transfer pulse φ! supplied by the oscillator O8C. is entered.

With the above configuration, when a predetermined voltage is supplied to terminal TsK, capacitor C4 starts charging, and when this predetermined voltage is reached, the output voltage of operational amplifier OPs becomes rHJ.
becomes.

On the other hand, assuming that the transfer pulse φ凰 has finished sending out the image signal on the CCDr, the output voltage of the AND circuit AND4 becomes rHJ, which activates the vibrator MM, and the output voltage of this vibrator MM becomes rHJ for a predetermined time. . Therefore, due to the rHJ operation of the pulse φl immediately after the D terminal of the flip-flop FFI becomes "H", the output voltage of the vibrator MM becomes rLJ after the predetermined time period. Due to the "H" operation of the pulse φl immediately after this, the output terminal of the seven lip-flop FFI becomes rLJ.

-Also, the output signal (φX) of this flip 70-tube FF
resets the counter and capacitor C4 and repeats the above operation.

In this way, the shift/4 pulse φX is formed, but since the period of this shift pulse φX is the time for charging the capacitor C4 to the voltage input to the terminal T3,
Control is performed depending on the magnitude of the integral value level of the image signal described above.

As explained above, according to the drive circuit of the present invention, if the integral level of the image signal from the CCD is significantly different from the appropriate light level, sufficient correction will be made, and if the difference is small, the amount of correction will be small, so the response will be The storage time of the CCD is controlled so that hunting does not occur quickly.

Furthermore, since the difference in the above level is determined based on the integral level of the image signal, the control of the above accumulation time is not influenced by variations in brightness in one part, etc., and the detection element of an autofocus camera with particularly severe subject conditions can be used. It has great benefits when applied to CCDs used as

[Brief explanation of the drawing]

FIG. 1 is a schematic perspective view of an autofocus camera having a drive circuit of the present invention, FIG. 2 is a block diagram of the drive circuit of the present invention, FIG. 3 is a circuit connection diagram of blocks 81 to 84 in this block diagram, and FIG. 4 13 shows a time chart of output signals of the main circuits in FIG. 13, and FIG. 5 shows a circuit connection diagram of block 85 in the block diagram. 1... Afocal lens system 2... Light splitter 3.
...Imaging lens 4...Imaging surface or film surface 5.6
...Imaging lens 1...Image sensor (COD)
8... CCD drive circuit 9... Binarizer 10
...Correlator 11...Arithmetic circuit 12...Drive circuit 81...V-I conversion circuit 82...Integrator circuit 84
...Detection circuit 85...Storage time variable circuit 5IXS2, rs zsa, ss 1Ss, S?
m Analog switch OPl, OPl, OPs %
OF2, OPs...' operational amplifier R1, R1,
R1%R4, R111R@, R7, R8'''Resistance Cr
, cz , cs , c4, cll ++ capacitor C
OU...Counter MM...Monostable multivibrator FF,...DW flip-flop Applicant Fuji Photo Hikane Co., Ltd. Lightron Co., Ltd. δ Pjl 20th JP, 4th figure g 5th fertilizer

Claims (1)

[Claims] 1) An autofocus device that has an accumulation type image sensor that converts a subject image into a time-series image signal using drive pulses such as shift pulses and transfer pulses, and an arithmetic processing circuit that calculates a focus signal from this time-series image signal. The drive circuit for the image sensor includes an integration circuit that integrates the image signal from the image sensor, a detection circuit that detects the amount of displacement of the integrated value of the integration circuit from a reference value, and a detection circuit that responds to the output value of the detection circuit. A storage device comprising: a variable storage time circuit that changes the cycle of shift pulses of the image sensor, and configured to generate a storage time such that the output signal level of the image sensor is always at an appropriate value. type image sensor drive circuit.