JPS595082A - Generating circuit for printing timing pulse - Google Patents

Generating circuit for printing timing pulse

Info

Publication number
JPS595082A
JPS595082A JP11482882A JP11482882A JPS595082A JP S595082 A JPS595082 A JP S595082A JP 11482882 A JP11482882 A JP 11482882A JP 11482882 A JP11482882 A JP 11482882A JP S595082 A JPS595082 A JP S595082A
Authority
JP
Japan
Prior art keywords
amplifier
timing pulse
circuit
output
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11482882A
Other languages
Japanese (ja)
Inventor
Yuji Maruyama
祐二 丸山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11482882A priority Critical patent/JPS595082A/en
Publication of JPS595082A publication Critical patent/JPS595082A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J19/00Character- or line-spacing mechanisms
    • B41J19/18Character-spacing or back-spacing mechanisms; Carriage return or release devices therefor
    • B41J19/20Positive-feed character-spacing mechanisms
    • B41J19/202Drive control means for carriage movement

Abstract

PURPOSE:To prevent printing errors and quality degradation from occurring due to an irregularity in a linear scale, by providing a circuit means for correcting the DC level of a read signal to be constant when optically reading a linear scale. CONSTITUTION:Light emitted from a light-emitting diode 11 is received by a photo-transistor 31 through the linear scale 10 such as a steel scale provided with a slit pattern. The read signal (a) containing an increment or decrement is amplified by an amplifier 32 such as a differential amplifier. An output signal from the amplifier 32 is rectified and smoothed by a rectifying circuit 33, which sets a time constant for a C-R combination so as to leave only the increment or decrement (b) of the read signal (a). When the increment or decrement (b) is inputted to a page-side input terminal of the amplifier 32, an output (c) from the amplifier 32 is corrected so that the DC level becomes constant. The output (c) from the amplifier 32 is converted into a pulse by a comparator 34, which pulse is used as a printing timing pulse.

Description

【発明の詳細な説明】 本発明は、プリンタ等の印字タイミングパルス発生回路
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a print timing pulse generation circuit for a printer or the like.

往復移動によって印字するプリンタ等は、記録紙に対し
て同一間隔で正確に精度よく印字するために、印字密度
(例えば、3 dot /rrrmあるいは、6dot
 /rrrm )に対応した白黒パターン又はスリット
を施したリニアスケールを設け、これを光学的に読取り
印字のタイミング信号とする方法が良く用いられている
Printers that print by reciprocating movement have a printing density (for example, 3 dots/rrrm or 6 dots) in order to print accurately and precisely at the same intervals on recording paper.
A commonly used method is to provide a linear scale with a black-and-white pattern or slits corresponding to (/rrrm), and to optically read this and use it as a timing signal for printing.

リニアスケールには、種々の方法があり、一長一短があ
る。例え11゛、白黒パターンを施しだ樹脂性のフィル
ムスケールは、比較的精度良く出来る。
There are various methods of linear scales, each with their own advantages and disadvantages. For example, a resin film scale with a black and white pattern of 11 mm can be made with relatively high accuracy.

しかし、樹脂性のフィルムスケールは、記録紙からでる
ほこりやインクジェット記録方式でのインクミスト等が
付着することによりエラーの発生など長期間の信頼性に
欠ける。そこで、エツチングでスリットパターンを施し
だスチールスケールを3べ一:ゾ 用いることが多い。しかしスチールスケールの」場合、
エツチングムラによりスリット幅精度が悪くなり、これ
が光学的に読取った場合直流レベルや振幅の変動として
現われ、パルスに変換した時に波形歪となって印字エラ
ーや印字品質の劣化を1ねく。このためこれを補正する
必要がある。通常この補正は振幅変動を補正することに
より行なわれている。
However, resin film scales lack long-term reliability, such as the occurrence of errors due to adhesion of dust from recording paper and ink mist from inkjet recording methods. Therefore, a 3-beam steel scale with a slit pattern etched on it is often used. However, in the case of steel scale,
Etching unevenness deteriorates the slit width accuracy, which appears as fluctuations in DC level and amplitude when read optically, and when converted to pulses, becomes waveform distortion, leading to printing errors and deterioration of printing quality. Therefore, it is necessary to correct this. This correction is usually performed by correcting amplitude fluctuations.

振幅変動の補正として一般的には、AGC回路を使うこ
とが多い。その−例を第1図に示す。発光ダイオード1
1からの光をスチールスケール1゜を介してホトトラン
ジスタ12で受光しバンドパスフィルター13で単一周
波数とする。この信号を増幅器14で増幅する。増幅器
14の出力を整流回路17で整流平滑し、光電変換素子
15の発光側に入れる。光電変換素子15のCdS  
側は増幅器14のフィードバック抵抗として、平滑出力
の変動に応じて、増幅度を変え振動出力が一定になるに
している。16はコンパレータで、増幅器14の出力を
所定値と比較してそれに応じてパルスを発生させる。
Generally, an AGC circuit is often used to correct amplitude fluctuations. An example of this is shown in FIG. light emitting diode 1
1 is received by a phototransistor 12 through a steel scale of 1°, and converted into a single frequency by a bandpass filter 13. This signal is amplified by an amplifier 14. The output of the amplifier 14 is rectified and smoothed by a rectifier circuit 17 and input to the light emitting side of the photoelectric conversion element 15. CdS of photoelectric conversion element 15
The side serves as a feedback resistor of the amplifier 14, and changes the degree of amplification according to fluctuations in the smoothed output so that the vibration output remains constant. A comparator 16 compares the output of the amplifier 14 with a predetermined value and generates a pulse accordingly.

このような構成のAGC回路の場合、単一周波数でない
とその効果をう捷〈発揮できず、単一周波数にする目的
でバンドパスフィルタ3を挿入している。
In the case of an AGC circuit having such a configuration, the effect cannot be achieved unless the frequency is a single frequency, so a bandpass filter 3 is inserted for the purpose of achieving a single frequency.

ところで、プリンタの場合、印字ヘッドを第2図aに示
すような、速度図で往復移動させることが多いが、この
場合プリンタの効率を上げるためや印字位置あるいはモ
ータの制御を行なうために、減速、加速区間のタイミン
グパルスを必要とし、第2図すに示すような波形のタイ
ミングパルスを発生させる必要がある。ところが、第1
図に示すようにタイミングパルス発生回路中にバンドパ
ルスフィルタ13が入っているので、AGC回路を使用
する場合、第2図Cに示すように低周波数がバンドパス
フィルタ13によってカットされてしまい、第2図aに
示すような波形を得ることは出来ない。
Incidentally, in the case of a printer, the print head is often moved back and forth according to a speed diagram as shown in Figure 2a, but in this case, in order to increase the efficiency of the printer or to control the print position or motor, the print head must be decelerated. , a timing pulse for the acceleration section is required, and it is necessary to generate a timing pulse with a waveform as shown in FIG. However, the first
As shown in the figure, since a band pulse filter 13 is included in the timing pulse generation circuit, when using an AGC circuit, low frequencies are cut by the band pass filter 13 as shown in Figure 2C, It is not possible to obtain the waveform shown in Figure 2a.

本発明はこのような欠点を解消するものである。The present invention eliminates these drawbacks.

以下図面とともに詳細に説明する。A detailed explanation will be given below with reference to the drawings.

5べ馨? 第3図は本発明による印字タイミングパルス発生回路の
実施例を示す回路図、第4図a−cはその各部分の波形
図である。
5 bekaoru? FIG. 3 is a circuit diagram showing an embodiment of the print timing pulse generating circuit according to the present invention, and FIGS. 4 a to 4 c are waveform diagrams of each part thereof.

発光ダイオード11からの光をスリットパターンヲ族し
だスチールスケール等のリニアスケール10を介してホ
トトランジスタ31で受光する。
Light from a light emitting diode 11 is received by a phototransistor 31 via a linear scale 10 such as a steel scale with a slit pattern.

ホトトランジスタ31から得られた、変動分の含捷れだ
読取信号イ(第4図a参照)は、差動増幅器のような増
幅器32によって増幅される。増幅器32の出力信号は
、整流回路33によって整流平滑される。整流回路33
は読取信号イの変動分口(第4図す参照)だけ残るよう
にCRの時定数を設定する。この変動分口を増幅器32
の負側入力端子に入力すると、増幅器32の出カバは第
4図(C)に示すように直流レベルが一定となるように
補正される。増幅器32の出カバはコンパレータ34で
直流レベル付近の電圧と比較されてパルスに変換され、
印字タイミングパルスとして使用される。この場合、コ
ンパレータとして例えばゼロクロス検出器を使用すると
よい。
The read signal A (see FIG. 4a) obtained from the phototransistor 31 and containing fluctuations is amplified by an amplifier 32, such as a differential amplifier. The output signal of the amplifier 32 is rectified and smoothed by a rectifier circuit 33. Rectifier circuit 33
The time constant of the CR is set so that only the fluctuation portion of the read signal A (see FIG. 4) remains. The amplifier 32
When input to the negative side input terminal of the amplifier 32, the output cover of the amplifier 32 is corrected so that the DC level becomes constant as shown in FIG. 4(C). The output of the amplifier 32 is compared with a voltage near the DC level by a comparator 34 and converted into a pulse.
Used as print timing pulse. In this case, for example, a zero-cross detector may be used as the comparator.

6ページ 第3図の構成では、振幅の補正はされないが、直流レベ
ルが一定に補正されるので、コンパレータの比較基準電
圧をその付近に設定することにより安定した印字タイミ
ングパルスを得ることが出来る。寸だ、AGC回路の場
合のように単一周波数にする必要がないので、低域周波
数成分でもカットされることなく、それに応じた周波数
のタイミングパルスを発生させることが出来る。
In the configuration shown in FIG. 3 on page 6, the amplitude is not corrected, but the DC level is corrected to a constant value, so by setting the comparison reference voltage of the comparator near that value, a stable print timing pulse can be obtained. In fact, unlike the case of an AGC circuit, there is no need to use a single frequency, so even low-frequency components are not cut, and timing pulses can be generated at a corresponding frequency.

以上のように、本発明はスリットパターンを施したリニ
アスケールを光学的に読取り、読取った信号の直流レベ
ルを一定になるように補正し、この補正された信号をも
とに印字タイミングパルスを発生させるようにした印字
タイミングパルス発生回路で、リニアスケール製造時に
おけるエツチングムラに基因する印字エラーや印字品質
の劣化を確実に妨ぐことか出来る。
As described above, the present invention optically reads a linear scale with a slit pattern, corrects the DC level of the read signal to be constant, and generates a print timing pulse based on this corrected signal. The printing timing pulse generation circuit configured to do this can reliably prevent printing errors and deterioration of printing quality caused by uneven etching during linear scale manufacturing.

2図& −’−Cは印字ヘッドの走査速度および折り返
し付近の読取り信号の一例を示す波形図、第3図7Iニ
ー4 は本准用による印字タイミングパルス発生回路の実施枦
1を示す回路図、第4図a −cは第3図の回路の波形
図である。
Figures 2 &-'-C are waveform diagrams showing an example of the scanning speed of the print head and the read signal near foldback, and Figure 3 is a circuit diagram showing implementation example 1 of the print timing pulse generation circuit according to this standard. , FIGS. 4a-c are waveform diagrams of the circuit of FIG. 3.

10・・・・スチールスケール、11・・・・・発光ダ
イオード、31・・・・・・ホトトランジスタ、32・
・・・増幅器、33・・・・・・整流回路、34・・・
・・・コンパレータ。
10...Steel scale, 11...Light emitting diode, 31...Phototransistor, 32...
...Amplifier, 33... Rectifier circuit, 34...
···comparator.

代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 O 第2図 tθ1 第3図 /θ
Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure O Figure 2 tθ1 Figure 3/θ

Claims (1)

【特許請求の範囲】 0)印字密度に対応したスリットパターンを施したリニ
アスケールを光学的に読み取る回路手段と、読み取った
信号の直流レベルを一定に補正する回路手段と、補正さ
れた信号をパルスに変換する回路手段とを備えたことを
特徴とする印字タイミングパルス発生回路。 (2)補正回路手段が、増幅器と、前記増幅器の出力を
整流する整流回路と、前記整流回路の出力を前記増幅器
に減算するよう印加する手段とから成る特許請求の範囲
第1項記載の印字タイミングパルス発生回路。 (3)パルスに変換する回路手段が直流レベル付近の電
圧を比較基準電圧とする電圧比較器である特許請求の範
囲第1項記載の印字タイミングパルス発生回路。 (4)電圧比較器がゼロクロス検出器である特許請2ベ
ー、7・ 求の範囲第1項記載の印字タイミングパルス発生回路。
[Scope of Claims] 0) A circuit means for optically reading a linear scale provided with a slit pattern corresponding to the printing density, a circuit means for correcting the DC level of the read signal to a constant level, and a circuit means for correcting the DC level of the read signal to a constant level, 1. A print timing pulse generation circuit characterized by comprising circuit means for converting into. (2) The printing according to claim 1, wherein the correction circuit means comprises an amplifier, a rectifier circuit for rectifying the output of the amplifier, and means for applying the output of the rectifier circuit to the amplifier so as to subtract it. Timing pulse generation circuit. (3) The print timing pulse generation circuit according to claim 1, wherein the circuit means for converting into pulses is a voltage comparator that uses a voltage near a DC level as a reference voltage for comparison. (4) The print timing pulse generation circuit according to claim 1, wherein the voltage comparator is a zero-cross detector.
JP11482882A 1982-07-01 1982-07-01 Generating circuit for printing timing pulse Pending JPS595082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11482882A JPS595082A (en) 1982-07-01 1982-07-01 Generating circuit for printing timing pulse

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11482882A JPS595082A (en) 1982-07-01 1982-07-01 Generating circuit for printing timing pulse

Publications (1)

Publication Number Publication Date
JPS595082A true JPS595082A (en) 1984-01-11

Family

ID=14647700

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11482882A Pending JPS595082A (en) 1982-07-01 1982-07-01 Generating circuit for printing timing pulse

Country Status (1)

Country Link
JP (1) JPS595082A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6265459U (en) * 1985-10-14 1987-04-23
US5184011A (en) * 1991-01-03 1993-02-02 Xerox Corporation Linear encoder for digital printing applications

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6265459U (en) * 1985-10-14 1987-04-23
US5184011A (en) * 1991-01-03 1993-02-02 Xerox Corporation Linear encoder for digital printing applications

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