JPS5950114B2 - Hiragata hand taiiso - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in flat semiconductor devices, and particularly to the prevention of explosion accidents in containers in which flat semiconductor devices are housed.

A flat semiconductor device is generally constructed as follows.

That is, after forming regions of the second conductivity type on both sides of a semiconductor substrate of the first conductivity type by diffusion, one of the regions is chemically or mechanically removed using a well-known technique, and then a gold-antimony foil is alloyed. A semiconductor substrate on which metal electrodes are formed and a temperature compensating plate having a thermal expansion coefficient similar to that of the substrate using aluminum as a brazing material is fixed to the other side, a hollow cylindrical insulator, upper and lower cooling bodies, and a lid plate that closes them. It is constructed by being stored in a container consisting of. ; FIGS. 1 and 2 show an example of this type of semiconductor device.

First, as shown in FIG. 2, P is applied to both sides of the N-type semiconductor substrate 13.
A type impurity such as gallium, boron, aluminum, etc. is diffused to form a diffusion layer. The upper surface is removed chemically or mechanically, leaving only the diffusion layer 14 on the lower surface. A temperature compensation support plate 16 having a coefficient of thermal expansion similar to that of the substrate, such as a tungsten or molybdenum plate, is fixed to the bottom surface of the substrate using aluminum as a brazing material 15, and a gold-antimony foil is alloyed to the top surface of the support plate 16 to form a cathode electrode 11.・is formed to constitute the semiconductor substrate Li. Next, as shown in FIG. 1, numeral 4 is a cylindrical body made of an insulating material such as ceramics, which together with the lid plates 2, 3, 5 and the cooling body 1.6 forms a container l for enclosing the semiconductor substrate □. .

When the semiconductor substrate is encapsulated, a temperature compensation plate 7 made of molybdenum is interposed between the upper cooling body 1 and the cathode electrode 11. When using the semiconductor device constructed as described above, cooling fins are pressed against the cooling bodies 1 and 6, thereby providing electrical continuity and thermal dissipation at the same time. However, when the reverse withstand voltage of the rectifier using semiconductor elements deteriorates, an arc is generated inside the element, which pierces through the thin cover plates 2, 3, and 5, and metal vapor is ejected from inside the container, causing an arm short circuit. An accident occurred in which the rectifier was burned out.

A detailed study of this accident revealed that metal vapor spews out from inside the container only when the deterioration occurs outside of the upper temperature compensating plate 7, and does not spew out when the deterioration occurs inside. found.

It has also been found that when the effective sorting electrode 11 is formed by an alloy method as shown in FIG. 2, breakdown voltage deterioration tends to occur around the cathode electrode. The present invention has been made in view of the above circumstances, and is designed to cause pressure resistance deterioration inside the upper temperature compensating plate.
This is intended to prevent metal vapor from ejecting from the container due to arcing.

The details of the present invention will be explained below with reference to the embodiment shown in FIG.

In the drawings, the same parts as in FIGS. 1, 2, and 2 are designated by the same reference numerals. First, a P-type impurity is diffused on both sides of the N-type semiconductor substrate 13 to form a diffusion layer.

The upper diffusion layer is removed chemically or mechanically, leaving only the lower diffusion layer 14. Next, a central portion of the top surface of the N-type conductive layer 13 is chemically or mechanically removed to form a recess 17. Further, an oxide film is formed on both sides of the substrate, a photosensitive film is applied, and an opening is formed by exposing this film to light.
After the oxide film is partially removed by etching using the photosensitive film as a mask, N-type impurities are selectively diffused using a well-known technique to form a diffusion layer 12.

After forming an anode electrode by fixing a tungsten plate 16 to the bottom of the substrate using aluminum 15 as a brazing material, a cathode electrode 11 is formed by vapor-depositing aluminum, gold, or the like on top of the diffusion layer 12.

On the other hand, the temperature compensation plate 7 made of molybdenum interposed between the upper cooling body 1 and the cathode electrode 11 has an area of 1
It is set much larger than 7.

In the flat semiconductor device of the present invention configured in this manner, the width of the N-type base layer 13 is narrower at the center due to the recess 17. Therefore, if an overvoltage is applied to the device and the withstand voltage deteriorates, the width of the N-type base layer 13 is narrower at the center. It will happen in the department. Therefore, even if the element deteriorates and current flows, the deteriorated part is pressure-welded by the upper temperature compensating plate 7, so even if the semiconductor melts, no arc will occur in the container. Its practical value is extremely great because it can prevent explosions such as metal vapor spewing out from the metal.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a conventional flat semiconductor device, FIG. 2 is a sectional view of a semiconductor substrate used in the same semiconductor device, and FIG. 3 is a partially cutaway sectional view of a flat semiconductor device according to the present invention. 1, 6... Cooling body, 2, 3, 5... Lid plate, 4... Insulating cylindrical body, 7... Upper temperature compensation plate, l...Enclosed container, 1''. ...
... Semiconductor substrate, 11 ... Cathode electrode, 1
2...N-type diffusion layer, 13...N-type substrate, 14...P-type diffusion layer, 15...brazing material, 16...・Lower temperature compensation plate.

Claims (1)

[Claims] 1. A semiconductor substrate having a bonding portion formed exposed on the top surface and a metal electrode provided in the bonding portion region, and a top and bottom cooling body that press and support this substrate from above and below, the top surface of the substrate being 1. A flat semiconductor device having a recess in the center thereof, and a temperature compensating plate having a larger area than the recess interposed between the upper cooling body and the metal electrode.