JPS5946027U - Receiving sensitivity switching circuit for automatic tuning receiver - Google Patents
Receiving sensitivity switching circuit for automatic tuning receiverInfo
- Publication number
- JPS5946027U JPS5946027U JP14037082U JP14037082U JPS5946027U JP S5946027 U JPS5946027 U JP S5946027U JP 14037082 U JP14037082 U JP 14037082U JP 14037082 U JP14037082 U JP 14037082U JP S5946027 U JPS5946027 U JP S5946027U
- Authority
- JP
- Japan
- Prior art keywords
- switching circuit
- gain
- receiving sensitivity
- automatic tuning
- sensitivity switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の１実施例である自動同調受信機のブロ
ック図、第２図は第１図の要部の詳細な回路図、第３図
はある場所における放送周波数と電界強度を示す説明図
、第４図は第２図の動作を説明するためのタイミングチ
ャートである。
１・・・・・・フロントエンド、２・・・・・・利得制
御回路、３・・・・・・ＩＦ段、９・・・・・・スキャ
ン制御回路、１０・・・・・・スイッチ、２５・・・・
・・利得切換回路。Figure 1 is a block diagram of an automatic tuning receiver that is an embodiment of the present invention, Figure 2 is a detailed circuit diagram of the main parts of Figure 1, and Figure 3 shows the broadcasting frequency and electric field strength at a certain location. The explanatory diagram, FIG. 4, is a timing chart for explaining the operation of FIG. 2. 1...Front end, 2...Gain control circuit, 3...IF stage, 9...Scan control circuit, 10...Switch , 25...
...Gain switching circuit.
Claims (1)
から成る利得切換回路と、フロントエンドの受信周波数
を制御するスキャン制御回路と、スキャン制御回路に接
続されスキャン動作を開始させるスイッチと、スイッチ
の操作に応答しスキャン動作中は前記トランジスタの利
得を低下させ又、受信局を受信してスキャン動作が停止
すると前記トランジスタの利得を元の高い状態に復帰さ
せる様にした利得制御回路とをそなえたことを特徴とす
る自動同調受信機の受信感度切換回路。A gain switching circuit consisting of a transistor connected between the front end and the IF stage, a scan control circuit that controls the reception frequency of the front end, a switch connected to the scan control circuit to start the scan operation, and a switch that controls the operation of the switch. In response, the gain control circuit lowers the gain of the transistor during a scanning operation, and returns the gain of the transistor to its original high state when a reception station is received and the scanning operation stops. Features a receiving sensitivity switching circuit for automatic tuning receivers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14037082U JPS5946027U (en) | 1982-09-16 | 1982-09-16 | Receiving sensitivity switching circuit for automatic tuning receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14037082U JPS5946027U (en) | 1982-09-16 | 1982-09-16 | Receiving sensitivity switching circuit for automatic tuning receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5946027U true JPS5946027U (en) | 1984-03-27 |
Family
ID=30314306
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14037082U Pending JPS5946027U (en) | 1982-09-16 | 1982-09-16 | Receiving sensitivity switching circuit for automatic tuning receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5946027U (en) |
-
1982
- 1982-09-16 JP JP14037082U patent/JPS5946027U/en active Pending
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