JPS594134A - Probe card - Google Patents
Probe cardInfo
- Publication number
- JPS594134A JPS594134A JP11315182A JP11315182A JPS594134A JP S594134 A JPS594134 A JP S594134A JP 11315182 A JP11315182 A JP 11315182A JP 11315182 A JP11315182 A JP 11315182A JP S594134 A JPS594134 A JP S594134A
- Authority
- JP
- Japan
- Prior art keywords
- probe
- bonding pad
- terminal resistor
- needle
- card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
（１）発明の技術分野
本発明はプローブカードの改良に関する。詳しくは、高
周波入力信号に対し多重反射現象の発生が防止されてお
り、高速動作特性を有する半導体装置特に集積回路の試
験に使用しつるようになしたプローブカードの改良に関
する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to improvements in probe cards. More specifically, the present invention relates to an improvement in a probe card that prevents the occurrence of multiple reflection phenomena with respect to high-frequency input signals and is suitable for use in testing semiconductor devices, particularly integrated circuits, having high-speed operating characteristics.
（２）技術の背景
プローブカードとは、半導体装置特に集積回路の特性試
験に使用される器具であり、第１図にその１例を示す如
き構造を有する。図において、１はプローブカードであ
り、破線４をもって示す被試験半導体チップの各ポンデ
ィングパッドに接触するプローブ２を有し、このプロー
ブ２はカード板３によって支持され、又、プローブ２は
カード板３に沿って設けられた導電路２１を介して端子
２２と接続されている。３１は接地面であり導電体層に
より形成されている。(2) Background of the Technology A probe card is an instrument used for testing the characteristics of semiconductor devices, especially integrated circuits, and has a structure as shown in FIG. 1 as an example. In the figure, reference numeral 1 designates a probe card, which has a probe 2 that contacts each bonding pad of a semiconductor chip under test, indicated by a broken line 4, and this probe 2 is supported by a card board 3. It is connected to a terminal 22 via a conductive path 21 provided along 3. 31 is a ground plane and is formed of a conductive layer.
かかるプローブカードにおいても交流回路特に高周波回
路においてはインピーダンス整合は必要であり、インピ
ーダンス整合が不完全であると、特に高周波入力信号に
対し多電反射現象が発生して誤動作の原因となる。In such a probe card, impedance matching is necessary in an AC circuit, particularly a high frequency circuit, and if the impedance matching is incomplete, a multi-electroreflection phenomenon occurs, especially for a high frequency input signal, which causes malfunction.
（３）従来技術と問題点
従来技術にかかるプローブカードのインピーダンス整合
は下記のとおりなされている。第１の例は、第２図に示
すように、同軸ケーブル２４と接続される、例えば５０
Ω系の導電パターン２３をカード板３上に延在させ、こ
れを、カード板上に配設され接地された例えば５０Ωの
終端抵抗５と接続し、入出力側とも例えば５０Ωのイン
ピーダンスをもって整合するものである。この場合は、
終端抵抗５と５０Ω系ケーブル２３との接続点より入力
側ではインピーダンスが整合されるが、その接地点より
出力側では、特に高周波入力信号の多重反射現象を防止
することはできない。又、第２の例では、第３図に示す
ように、プローブ２の近傍まで例えば５０Ω系の同軸タ
イプのもの２５となすものである。(3) Prior art and problems The impedance matching of the probe card according to the prior art is performed as follows. In the first example, as shown in FIG.
A Ω-based conductive pattern 23 is extended on the card board 3, and connected to a terminating resistor 5 of, for example, 50 Ω, which is arranged on the card board and grounded, and matched with the input and output sides with an impedance of, for example, 50 Ω. It is something. in this case,
Impedances are matched on the input side from the connection point between the terminating resistor 5 and the 50Ω cable 23, but on the output side from the ground point, it is impossible to prevent multiple reflections, especially of high-frequency input signals. In the second example, as shown in FIG. 3, a 50Ω coaxial type probe 25 is used up to the vicinity of the probe 2.
この場合は、シールド外被の有するインダクタンス成分
のため、プローブ２の先端においては、外部導体が共通
アース電位になりにくく、５０Ω系からずれることにな
り、伝送ケーブル内で入力信号が多重反射し、入力信号
と干渉して誤動作の原因となる。In this case, due to the inductance component of the shield jacket, the external conductor at the tip of the probe 2 is difficult to reach the common ground potential and deviates from the 50Ω system, causing multiple reflections of the input signal within the transmission cable. It may interfere with the input signal and cause malfunction.
上記のとおり、従来技術にかかる、いずれのプローブカ
ードも、高周波入力信号の多重反射現象に関するかぎり
、改良の余地を残すものであり、高速動作特性を有する
半導体装置特に集積回路の試験に使用するためには必ず
しも満足すべきものではないという欠点がある。As mentioned above, all of the probe cards according to the prior art leave room for improvement as far as the multiple reflection phenomenon of high-frequency input signals is concerned, and are suitable for use in testing semiconductor devices, especially integrated circuits, that have high-speed operation characteristics. has the disadvantage that it is not necessarily satisfactory.
（４）発明の目的
本発明の目的はこの欠点を解消することにあり、高周波
入力信号の多重反射現象の発生が防止されているプロー
ブカードを提供することにある。(4) Purpose of the Invention The purpose of the present invention is to eliminate this drawback, and to provide a probe card in which the occurrence of multiple reflections of high-frequency input signals is prevented.
（５）発明の構成
本発明の構成は、被試験半導体チップの各ポンディング
パッドに接触するプローブをそれぞれ対応するポンディ
ングパッドに接触させるように支持するカード板上に、
前記プローブのうち人力信号を伝送するプローブの近傍
に、一端が該プローブが接触するポンディングパッドに
接触し、他端がインピーダンス整合用抵抗を介して接地
される針状導電体が配設されてなることを特徴とするプ
ローブカードにある。(5) Structure of the Invention The structure of the present invention is that the probes that contact each bonding pad of the semiconductor chip under test are mounted on a card board that supports the probes so that they are in contact with the corresponding bonding pads.
Among the probes, a needle-shaped conductor is disposed near the probe that transmits the human power signal, one end of which contacts the bonding pad that the probe comes into contact with, and the other end of which is grounded via an impedance matching resistor. It is in a probe card that is characterized by:
すなわち、上記の欠点がインピーダンス整合用終端抵抗
の挿入位置が好ましくないことに原因する点に着目し、
被試験半導体チップの被接続ポンディングパッドからバ
イパス接地回路をもうけこ（３）
の回路の中にインピーダンス整合用終端抵抗を接続した
。さらに具体的には人力信号を伝送するプローブに近接
して針状導電体を設けておき、この釧状尋電体を上記の
入力信号伝送用プローブが接触しているポンディングパ
ッドに接触させておき、この針状導電体の他端に終端抵
抗を接続し、更に、この終端抵抗の他端を接地すること
としたものである。In other words, focusing on the fact that the above drawbacks are caused by the unfavorable insertion position of the terminating resistor for impedance matching,
A bypass grounding circuit was created from the connected bonding pad of the semiconductor chip under test, and a termination resistor for impedance matching was connected in the circuit (3). More specifically, a needle-shaped conductor is provided close to the probe that transmits the human signal, and this hook-shaped conductor is brought into contact with the bonding pad that the input signal transmission probe is in contact with. A terminating resistor is connected to the other end of this acicular conductor, and the other end of this terminating resistor is grounded.
（６）発明の実施例
以下、図面を参照しつつ、本発明の実施例に係るプロー
ブカードについて説明する。(6) Embodiments of the invention Hereinafter, probe cards according to embodiments of the invention will be described with reference to the drawings.
第４図は本発明の第１の実施例に係るプローブカード１
３の平面図である。図において、２．２３．２４．３．
３１．４．５は、第１図に示すものと同様、それぞれ、
プローブ、４電パターン、同軸ケーブル、カード板、接
地面、被試験半導体チップ、終端抵抗である。６が本発
明の要旨である針状導電体であり、プローブ２に近接し
てこれと同一のボンディングパットに接触されている。FIG. 4 shows a probe card 1 according to a first embodiment of the present invention.
3 is a plan view of FIG. In the figure, 2.23.24.3.
31.4.5 are similar to those shown in Figure 1, respectively,
These are a probe, a 4-wire pattern, a coaxial cable, a card board, a ground plane, a semiconductor chip under test, and a terminating resistor. Reference numeral 6 denotes a needle-shaped conductor, which is the gist of the present invention, and is placed close to the probe 2 and in contact with the same bonding pad.
針状導電体６の他端は終端抵抗５と接続されており、終
端抵（４）
抗５の他端はワイヤ７を介して接地面３１と接続されて
いる。The other end of the acicular conductor 6 is connected to a terminating resistor 5, and the other end of the terminating resistor (4) is connected to a ground plane 31 via a wire 7.
以上の構成により、その等価回路は第５図に示す如くな
る。図において、Ｚｌは入力インピーダンスであり、４
１はプローブ２と針状導電体６との双方が接触している
ポンディングパッドである。図示せるように、終端抵抗
Ｒが被接続ポンディングパッド４１と接地３１間のバイ
パス接地回路中に挿入されているので、高速入力信号は
終端抵抗Ｒ中に吸収され多重反射現象は発生しない。With the above configuration, the equivalent circuit becomes as shown in FIG. In the figure, Zl is the input impedance and 4
Reference numeral 1 denotes a bonding pad with which both the probe 2 and the needle-like conductor 6 are in contact. As shown in the figure, since the terminating resistor R is inserted in the bypass grounding circuit between the connected bonding pad 41 and the ground 31, the high-speed input signal is absorbed in the terminating resistor R, and no multiple reflection phenomenon occurs.
第６図は本発明の第２の実施例に係るプローブカード１
４の平面図である。図において、２．２５．３．３１．
４．５は第２図に示すものと同様、それぞれ、プローブ
、５０Ω系同軸ケーブル、カード板、接地面、被試験半
導体チップ、終端抵抗である。FIG. 6 shows a probe card 1 according to a second embodiment of the present invention.
4 is a plan view of FIG. In the figure, 2.25.3.31.
4.5 are a probe, a 50Ω coaxial cable, a card board, a ground plane, a semiconductor chip under test, and a terminating resistor, respectively, as shown in FIG.
６．７が、第４図に示すものと同様、本発明の要旨であ
る針状導電体とワイヤとであり、接続、機能とも第４図
に示す場合と全く同様である。Similarly to the case shown in FIG. 4, 6.7 is the needle-like conductor and wire, which are the gist of the present invention, and the connections and functions are completely the same as in the case shown in FIG.
（７）発明の詳細
な説明せるとおり、本発明によれば、高周波入力信号の
多重反射現象の発生が防止されているプローブカードを
提供することができる。(7) As described in detail, according to the present invention, it is possible to provide a probe card in which multiple reflections of high-frequency input signals are prevented from occurring.
第１図はプローブカードの基本的構成を示す模式図であ
る。第２図、第３図は、従来技術におけるプローブカー
ドのインピーダンス整合方式を示す模式図である。第４
図、第６図は本発明の実施例に係るカードプローブの模
式図である。第５図は本発明の実施例に係るプローブカ
ードの等価回路を示すブロック図である。
１．１１．１２．１３．１４・・・・・・プローブカー
ド、２・・・・・・プローブ、２１・・・・・・導電路
、２２・・・・・・端子、２３・・・・・・導電パター
ン、２４．２８・・・・・・同軸ケーブル、３・・・・
・・カード板、３１・・・・・・接地面、４・・・・・
・被試験半導体チップ、５・・・・・・インピーダンス
整合用抵抗、６・・・・・・針状導電体、７・・・・・
・ワイヤ。
（７）
１６FIG. 1 is a schematic diagram showing the basic configuration of a probe card. FIGS. 2 and 3 are schematic diagrams showing impedance matching methods for probe cards in the prior art. Fourth
FIG. 6 is a schematic diagram of a card probe according to an embodiment of the present invention. FIG. 5 is a block diagram showing an equivalent circuit of a probe card according to an embodiment of the present invention. 1.11.12.13.14... Probe card, 2... Probe, 21... Conductive path, 22... Terminal, 23... ...Conductive pattern, 24.28...Coaxial cable, 3...
... Card board, 31 ... Ground plane, 4 ...
- Semiconductor chip under test, 5... impedance matching resistor, 6... needle-shaped conductor, 7...
・Wire. (7) 16
Claims (1)
プローブをそれぞれ対応するポンディングパッドに接触
させるように支持するカード板上に、前記プローブのう
ち入力信号を伝送するプローブの近傍に、一端が該プロ
ーブが接触するポンディングパッドに接触し、他端がイ
ンピーダンス整合用抵抗を介して接地される針状導電体
が配設されてなることを特徴とするプローブカード。On a card board that supports probes that contact each of the bonding pads of the semiconductor chip under test so as to be in contact with the corresponding bonding pads, one end of the probe is placed near the probe that transmits the input signal among the probes. 1. A probe card comprising a needle-like conductor that contacts a bonding pad that is in contact with the probe card and has the other end grounded via an impedance matching resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11315182A JPS594134A (en) | 1982-06-30 | 1982-06-30 | Probe card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11315182A JPS594134A (en) | 1982-06-30 | 1982-06-30 | Probe card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS594134A true JPS594134A (en) | 1984-01-10 |
Family
ID=14604855
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11315182A Pending JPS594134A (en) | 1982-06-30 | 1982-06-30 | Probe card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS594134A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6221064A (en) * | 1985-07-19 | 1987-01-29 | Koichi Yoshida | Spring-contact type probe |
| JPS6236715U (en) * | 1985-08-23 | 1987-03-04 | ||
| US4724053A (en) * | 1985-12-20 | 1988-02-09 | Polaroid Corporation, Patent Dept. | Method for the electropolymerization of conductive polymers |
-
1982
- 1982-06-30 JP JP11315182A patent/JPS594134A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6221064A (en) * | 1985-07-19 | 1987-01-29 | Koichi Yoshida | Spring-contact type probe |
| JPS6236715U (en) * | 1985-08-23 | 1987-03-04 | ||
| US4724053A (en) * | 1985-12-20 | 1988-02-09 | Polaroid Corporation, Patent Dept. | Method for the electropolymerization of conductive polymers |
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