JPS5937877B2 - Laser protection circuit - Google Patents

Laser protection circuit

Info

Publication number
JPS5937877B2
JPS5937877B2 JP15303376A JP15303376A JPS5937877B2 JP S5937877 B2 JPS5937877 B2 JP S5937877B2 JP 15303376 A JP15303376 A JP 15303376A JP 15303376 A JP15303376 A JP 15303376A JP S5937877 B2 JPS5937877 B2 JP S5937877B2
Authority
JP
Japan
Prior art keywords
laser
signal
output
circuit
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15303376A
Other languages
Japanese (ja)
Other versions
JPS5376780A (en
Inventor
正徳 国田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15303376A priority Critical patent/JPS5937877B2/en
Publication of JPS5376780A publication Critical patent/JPS5376780A/en
Publication of JPS5937877B2 publication Critical patent/JPS5937877B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/068Stabilisation of laser output parameters
    • H01S5/06825Protecting the laser, e.g. during switch-on/off, detection of malfunctioning or degradation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 本発明は光通信システム中のディジタル部門の中継器ま
たは端局において、光信号が断の時にレーザ(レーザダ
イオード又は半導体レーザ)に過大電流が流れるのを防
止するレーザ保護回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides laser protection for preventing excessive current from flowing in a laser (laser diode or semiconductor laser) when an optical signal is cut off in a repeater or terminal station in a digital section of an optical communication system. It is related to circuits.

光通信システムの送信部にはレーザ(レーザダイオード
又は半導体レーザ)が一般に使われていて、電気信号を
光信号に換える働らきをしている。
Lasers (laser diodes or semiconductor lasers) are generally used in the transmitting section of optical communication systems, and function to convert electrical signals into optical signals.

しかし、現段階においてはまだレーザ素子自身が安定し
ておらず、周囲温度や経年変化によつて、 、。該レー
ザの出力レベルが変わるために、一般的に常に出力を一
定レベルに保つような負帰還のループを使つて該レーザ
の出力レベルを制御している。このループを一般にハ動
出力レベル制御回路(AutomaticPowerC
ontrol)(以下APCループと記す)と呼んでい
る。第1図はピーク検出によるAPCループのブロック
図である。
However, at this stage, the laser element itself is not yet stable, and it is subject to changes in ambient temperature and aging. Since the output level of the laser changes, the output level of the laser is generally controlled using a negative feedback loop that always maintains the output at a constant level. This loop is generally used as a dynamic output level control circuit (Automatic PowerC).
(hereinafter referred to as APC loop). FIG. 1 is a block diagram of an APC loop with peak detection.

同図において、1はレーザ、2は変調信号入力端子、3
は受光素子(PINダイオード、アパランシエフオトダ
イオードなど)、4は増幅器、5はピーク検出器、6は
基準電圧入力端子、7は差動増幅器、8はバイヤス電流
駆動回路を示す。このAPCループを働らかせた時、基
準電圧を該APCループの一部に設けておき、レーザの
出力がこの基準電圧より大きいか、小さいかを差動増幅
器Tにて判定して、それに応じてレーザヘの励起電流を
増減させ、レーザ発振出力を調整している。一方光通信
における光の変調を行なう場合は、バイアス電流駆動回
路8において、ある直流のバイアス電流を流しておいて
、さらにその上に入力端子2からの信号を加えた電流を
レーザ1に加えることによつてレーザ1の光出力は光変
調される。
In the figure, 1 is a laser, 2 is a modulation signal input terminal, and 3 is a laser.
4 is an amplifier, 5 is a peak detector, 6 is a reference voltage input terminal, 7 is a differential amplifier, and 8 is a bias current drive circuit. When this APC loop is activated, a reference voltage is provided in a part of the APC loop, and the differential amplifier T determines whether the laser output is greater or less than this reference voltage, and the output is determined accordingly. The laser oscillation output is adjusted by increasing or decreasing the excitation current to the laser. On the other hand, when modulating light in optical communication, a certain DC bias current is passed through the bias current drive circuit 8, and a current with the signal from the input terminal 2 added thereto is applied to the laser 1. The optical output of the laser 1 is optically modulated by.

以上のような機能をもつたAPCループでは、もしレー
ザの入力信号が断となつた時、光検出回路出力は非常に
小さくなる。すなわち光のしきい値より小さい値のバイ
アス電流のみしかレーザに加えられない。したがつてA
PCループはあたかもレーザ出力レベルが低下したよう
に動作し、差動増幅器Tの働らきによつてレーザのバイ
ヤス電流が増加する。この状態が進行すると、レーザの
バイアス電流は飽和し、レーザに過大電流が流れ、レー
ザが劣化する。したがつてこの現象を防止して、入力信
号の断にもかかわらず、レーザの劣化を防ぐレーザ保護
回路が必要となる。従来この種の回路としては、APC
ル=プの基準電圧を得るのにレーザを駆動する信号から
平均値整流またはピーク値整流することにより、該基準
電圧を得る方法がある。
In the APC loop having the above function, if the laser input signal is cut off, the output of the photodetector circuit becomes extremely small. That is, only bias currents with values smaller than the optical threshold can be applied to the laser. Therefore A
The PC loop operates as if the laser output level were decreased, and the bias current of the laser increases due to the action of the differential amplifier T. As this condition progresses, the bias current of the laser becomes saturated, excessive current flows through the laser, and the laser deteriorates. Therefore, there is a need for a laser protection circuit that prevents this phenomenon and prevents the laser from deteriorating even if the input signal is interrupted. Conventionally, this type of circuit is called APC.
There is a method of obtaining a loop reference voltage by performing average value rectification or peak value rectification from a signal that drives a laser.

しかし、この方法によると、基準回路側にも整流回路が
必要となり回路が複雑となる欠点があつた。本発明の目
的は、光中継器に}いて、一般的に用いられる自動出力
レベル制御回路(APCループ)に}いて、レーザの入
力信号が断となつた時バイアス電流が増加し、レーザに
過大電流が流れるのを阻止するため上述の欠点を除いた
新規なレーザ保護回路を提供することにある。
However, this method has the disadvantage that a rectifier circuit is also required on the reference circuit side, making the circuit complicated. An object of the present invention is to provide a commonly used automatic output level control circuit (APC loop) in an optical repeater, in which the bias current increases when the input signal to the laser is cut off, and the laser is overloaded. The object of the present invention is to provide a new laser protection circuit for preventing the flow of current, which eliminates the above-mentioned drawbacks.

この目的を達成するため、本発明にかかるレーザ保護回
路は、光中継器に$?いてかならず用いられる変調信号
のタイミング信号(クロツク)から、その抽出回路を経
由して信号の有無判別回路に導き、該タイミング信号が
断の時のみ、APCルーブの基準電圧を制御し、レーザ
に過大電流が流れるのを阻止することを特徴とするもの
である。
To achieve this objective, the laser protection circuit according to the present invention provides $? The timing signal (clock) of the modulation signal, which is always used in the process, is led to the signal presence/absence determination circuit via the extraction circuit, and only when the timing signal is cut off, the reference voltage of the APC loop is controlled, and the laser It is characterized by blocking the flow of current.

以下本発明にかかるレーザ保護回路の実施例について詳
細に説明を行なう。第2図は本発明によるレーザ保護回
路のプロツク図である。
Embodiments of the laser protection circuit according to the present invention will be described in detail below. FIG. 2 is a block diagram of a laser protection circuit according to the present invention.

同図に訃いて、1〜8は第j図に示したものと同様であ
る。9は加算器、10は信号の有無判別回路、11はタ
イミング抽出回路を示す。
In the same figure, 1 to 8 are the same as those shown in FIG. 9 is an adder, 10 is a signal presence/absence determination circuit, and 11 is a timing extraction circuit.

光の3R(Reshaping9Regenerati
ng,Retiming)中継器においては、信号のビ
ツトレートに等しいクロツクが入力信号のタイミングを
とるためにかならず存在する。このタイミング信号(ク
ロック)の抽出回路の出力に}いては、S/Nが良く、
雑音が少々存在してもタイミング信号(クロツク)の有
無を容易に判定できる。従つて信号の有無をタイミング
信号(クロツク)の有無に置き換えることができる。す
なわち、入力信号の有無の検出をタイミング信号の有無
により行なう。タイミング抽出回路11から抽出された
タイミング信号は、以下の信号の有無判別回路10に訃
いて常にタイミング信号の有無を監視して、その判定を
行なう。たとえば、タイミング信号の有る場合は、ある
一定電位を保つ出力″11を得、タイミング信号の無い
場合は0電位で出力を出さなハ。すなわち10”となる
。該信号有無判別回路10の出力は加算器9に接続され
、前記APCループの基準電圧と、上記2種類の出力1
1P0r601)に対応した電圧との加算を行なうこと
によつて基準電圧を制御し、この制御された基準電圧を
既知のAPCループに加えることにより、該APCルー
プが暴走してレーザに過大電流が流れるのを阻止してレ
ーザを保護する。第3図はタイミング信号(クロツク)
の有無判別回路の一実施例である。
3Rs of light (Reshaping9Regeneration)
ng, Retiming) In a repeater, a clock equal to the bit rate of the signal is always present to time the input signal. The output of this timing signal (clock) extraction circuit has a good S/N ratio,
Even if there is some noise, the presence or absence of a timing signal (clock) can be easily determined. Therefore, the presence or absence of a signal can be replaced with the presence or absence of a timing signal (clock). That is, the presence or absence of an input signal is detected based on the presence or absence of a timing signal. The timing signal extracted from the timing extraction circuit 11 is connected to the following signal presence/absence determining circuit 10, which constantly monitors the presence or absence of the timing signal and makes a determination. For example, when there is a timing signal, an output ``11'' is obtained that maintains a certain constant potential, and when there is no timing signal, the output is 0 potential and the output is not output.In other words, the output is 10''. The output of the signal presence/absence determination circuit 10 is connected to an adder 9, which outputs the reference voltage of the APC loop and the two types of output 1.
The reference voltage is controlled by adding the voltage corresponding to 1P0r601), and by adding this controlled reference voltage to a known APC loop, the APC loop goes out of control and an excessive current flows to the laser. protect the laser by preventing Figure 3 shows the timing signal (clock)
This is an example of a circuit for determining the presence or absence of.

同図に}いて、12と17は位相検波器、13と18は
低域通過▲波器、14は電圧制御発振器、15はハイブ
リツドトランス、16はπ/2移相器、19は電圧比較
器、20は一定電圧入力端子を示す。本プロック図では
、位相検波器12から抵域通過P波器13と、電圧制御
発振器(VCO)14と、ハイブリツドトランス15を
経由して再び位相検波器12へもどる回路は一般にフエ
ーズ・ロツクド・ループ(PLL)と呼ばれ、このPL
Lを中心としてタイミング波抽出回路が構成されている
In the figure, 12 and 17 are phase detectors, 13 and 18 are low-pass ▲ wavers, 14 is a voltage controlled oscillator, 15 is a hybrid transformer, 16 is a π/2 phase shifter, and 19 is a voltage comparator. , 20 indicate constant voltage input terminals. In this block diagram, the circuit that returns to the phase detector 12 from the phase detector 12 via the resistance-pass P-wave generator 13, the voltage controlled oscillator (VCO) 14, and the hybrid transformer 15 is generally a phase locked loop. (PLL), and this PL
A timing wave extraction circuit is constructed around L.

このPLLが同期した状態では、前記電圧制御発振器(
CO)14の出力は入力信号と比較して、900位相が
ずれる。すなわち、入力信号が有ればCOl4の出力は
正確に入力信号より900位相がずれたものが得られる
。したがつて入力波形と、COl4の出力波形との位相
差が90力であることを何らかの方法で検出してやれば
良い。そのために本実施例では同期検出器17を用いる
。すなわち、入力信号を900(π/2)移相器16に
通した信号と、COl4の出力波形の一部を・・イブリ
ツドトランス15により分離した信号とを同期検波する
。この場合完全に入力信号がπ/2シフトしていれば同
期検波器17の出力に直流成分があられべ無い場合はビ
ードがあられれる。(このビードは交流成分のみである
)これを低減通過r波器18を通し、電圧比較器19で
一定電圧と比較すれば電圧比較器19の出力は信号の有
無によつてスイツチングする。この信号を判定に利用す
る。第4図は第2図で示した加算器9の一実施例である
When this PLL is in synchronization, the voltage controlled oscillator (
The output of CO) 14 is 900 out of phase compared to the input signal. That is, if there is an input signal, the output of CO14 will be accurately shifted in phase by 900 degrees from the input signal. Therefore, it is sufficient to use some method to detect that the phase difference between the input waveform and the output waveform of CO14 is 90 degrees. For this purpose, a synchronization detector 17 is used in this embodiment. That is, the signal obtained by passing the input signal through the 900 (π/2) phase shifter 16 and the signal obtained by separating a part of the output waveform of CO14 by the hybrid transformer 15 are synchronously detected. In this case, if the input signal is completely shifted by π/2, there will be no DC component in the output of the synchronous detector 17, but if there is no DC component, there will be a bead. (This bead is only an alternating current component.) If this is passed through a reduced pass r wave generator 18 and compared with a constant voltage by a voltage comparator 19, the output of the voltage comparator 19 will switch depending on the presence or absence of a signal. This signal is used for determination. FIG. 4 shows an embodiment of the adder 9 shown in FIG.

同図に}いて、21は前記タイミング信号(クロツク)
有無判別回路の2種類の出力に対応した一定電圧が与え
られる入力端子である。22は本加算器の出力端子、2
3は演算増幅器、24は基準電圧設定部、6は基準電圧
入力端子を示す。
In the same figure, 21 is the timing signal (clock).
This is an input terminal to which constant voltages corresponding to two types of outputs of the presence/absence determining circuit are applied. 22 is the output terminal of this adder, 2
3 is an operational amplifier, 24 is a reference voltage setting section, and 6 is a reference voltage input terminal.

ここで入力端子21に加わる電圧を1・、端子6に加わ
る基準電圧を2、出力端子22の出力電圧をV3とする
と以下の関係式が成り立つ。R3R3二1X−+2X−
(1) R1 R2 上式に}いて、仮にR1 =R2 とすると、 さらに(支)式に}いて、仮にR,=R3とすると、以
上に示した電圧値及び抵抗値の関係を考慮して所望の基
準電圧vを設定でき、入力信号の有無によつてAPCル
ーブの基準電圧を移動させることができる。
Here, if the voltage applied to the input terminal 21 is 1., the reference voltage applied to the terminal 6 is 2, and the output voltage of the output terminal 22 is V3, the following relational expression holds true. R3R321X-+2X-
(1) R1 R2 In the above equation, if R1 = R2, then in the (supporting) equation, if R, = R3, then considering the relationship between the voltage value and resistance value shown above, A desired reference voltage v can be set, and the reference voltage of the APC loop can be moved depending on the presence or absence of an input signal.

以上説明したように、本発明によれば、従来例にくらべ
て回路が簡単になるとともに、入力信号の有無の検出を
タイミング信号の有無により}こなうので、データ信号
に比較して、S/Nが良い状態で抽出できる。
As explained above, according to the present invention, the circuit is simpler than the conventional example, and since the presence or absence of an input signal is detected based on the presence or absence of a timing signal, the S /N can be extracted in good condition.

また検出信号によつて基準電圧を大幅に移動させ、AP
Cルーブの安定点を無信号時に切換えることが可能であ
る。
In addition, the reference voltage is moved significantly depending on the detection signal, and the AP
It is possible to switch the stable point of the C-Lube when there is no signal.

【図面の簡単な説明】 第1図は自動出力レベル制御回路を示し、第2図は本発
明によるレーザ保護回路の一実施例を示すプロツク図、
第3図及び第4図は、第2図で使用する入力信号の有無
判別回路の一実施例と、加算器の一実施例を示す。 1・・・・・・レーザ(レーザタイオート、半導体レー
ザなど、2・・・・・俊調信号入力端子、3・・・・・
・受光素子(PINダイオード、APDなど)、4・・
・・・・増幅器、5・・・・・・ピーク検出器、6・・
・・・・基準電圧入力端子、7・・・・・・差動増幅器
、8・・・・・・バイアス電流駆動回路、9・・・・・
・加算器、10・・・・・・入力信号有無判別回路、1
1・・・・・・タイミング信号抽出回路、12,17・
・・・・・位相検波器、13,18・・・・・・抵域通
過沢波器、14・・・・・・電圧制衝発振器、15・・
・・・・ハイブリツドトランス、16・・・・・・移相
器、19・・・・・・電圧比較器、20・・・・・・〒
定電圧入力端子、21・・・・・・加算器入力端子、2
2・・・・・・加算器出力端子、23・・・・・・演算
増幅器、24・・・・・・基準電圧設定部。
[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 shows an automatic output level control circuit, and FIG. 2 is a block diagram showing an embodiment of a laser protection circuit according to the present invention.
3 and 4 show an embodiment of the input signal presence/absence determining circuit used in FIG. 2 and an embodiment of the adder. 1... Laser (laser tie auto, semiconductor laser, etc.), 2... Fast signal input terminal, 3...
・Photodetector (PIN diode, APD, etc.), 4...
...Amplifier, 5...Peak detector, 6...
...Reference voltage input terminal, 7...Differential amplifier, 8...Bias current drive circuit, 9...
・Adder, 10... Input signal presence/absence determination circuit, 1
1...timing signal extraction circuit, 12, 17.
...Phase detector, 13,18...Resistance pass wave generator, 14...Voltage damping oscillator, 15...
...Hybrid transformer, 16 ... Phase shifter, 19 ... Voltage comparator, 20 ......〒
Constant voltage input terminal, 21... Adder input terminal, 2
2... Adder output terminal, 23... Operational amplifier, 24... Reference voltage setting section.

Claims (1)

【特許請求の範囲】[Claims] 1 光中継器の自動出力レベル制御回路において、タイ
ミング信号を抽出し、該タイミング信号の有無を判別す
る信号有無判別回路と、該信号有無判別回路の出力情報
を基準電圧と加算する加算器とを備え、前記加算器の出
力を前記自動出力レベル制御回路における基準電圧とし
、該基準電圧を変化させることにより、レーザに過大電
流が流れるのを阻止することを特徴とするレーザ保護回
路。
1. The automatic output level control circuit of an optical repeater includes a signal presence/absence discrimination circuit that extracts a timing signal and determines the presence or absence of the timing signal, and an adder that adds the output information of the signal presence/absence discrimination circuit to a reference voltage. A laser protection circuit comprising: using the output of the adder as a reference voltage in the automatic output level control circuit, and changing the reference voltage to prevent excessive current from flowing through the laser.
JP15303376A 1976-12-20 1976-12-20 Laser protection circuit Expired JPS5937877B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15303376A JPS5937877B2 (en) 1976-12-20 1976-12-20 Laser protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15303376A JPS5937877B2 (en) 1976-12-20 1976-12-20 Laser protection circuit

Publications (2)

Publication Number Publication Date
JPS5376780A JPS5376780A (en) 1978-07-07
JPS5937877B2 true JPS5937877B2 (en) 1984-09-12

Family

ID=15553490

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15303376A Expired JPS5937877B2 (en) 1976-12-20 1976-12-20 Laser protection circuit

Country Status (1)

Country Link
JP (1) JPS5937877B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0529102Y2 (en) * 1989-04-17 1993-07-26

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102370374B1 (en) 2015-08-04 2022-03-04 삼성전자주식회사 Photographing apparatus module, user terminal having the photographing apparatus and control method for the user terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0529102Y2 (en) * 1989-04-17 1993-07-26

Also Published As

Publication number Publication date
JPS5376780A (en) 1978-07-07

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