JPS5937730A - Method of processing output signal of analog-to-digital converter - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal processing method for smoothing a digital output signal of an analog-to-digital converter.

An analog-to-digital converter (ADC) converts an analog signal into a digital signal.

In electronic equipment that uses an ADC, such as a digital storage oscilloscope, the output of the ADC, that is, the digital signal, is stored in a digital memory and then processed by a computer, etc., and the processed digital signal is sent to a digital-to-analog converter (D A C). ) to convert it back into an analog signal and display it on a display device. In digital-storage oscilloscopes.

To improve the similarity (i.e., the fidelity of signal processing) between the input analog signal and the analog signal displayed on the display device (
In other words, in order to smooth the displayed waveform, high-precision AD is required.
C is required. However, high-precision ADCs have the problem of being expensive and having a complicated configuration. Therefore, low-cost digital storage - oscilloscopes require low-precision A
Since DC is used, the quality of the display signal (there is a problem with signal processing).The reason why the quality of the display signal deteriorates when a low-precision ADC is used is that the output signal of the ADC is the least significant bit of the ADC. (LSB), low precision ADC
The value q corresponding to the LSH of the high-precision ADC is larger than the value q corresponding to the LSH of the high-precision ADC.

Therefore, in order to improve the accuracy of ADC (that is, to smooth the display signal waveform), several techniques have been proposed to increase the "signal-to-quantization noise ratio" of a digital signal. One of these methods is to integrate the values of corresponding points in each cycle of a repeated signal and take the average.The other method is a dither technique that offsets the corresponding points of each cycle of a repeated signal to an ADC according to an algorithm. This is an application of In the second method, the first averaging technique may also be used. These prior art techniques have problems in capturing and displaying single-shot waveforms, especially since there is no information prior to the signal being digitized. A further problem is that dithering techniques require a dither generator.

According to the present invention, it is possible to improve the quality of waveform display of single-shot data using a simple smoothing algorithm! be. An uninvented algorithm is shown below.

(1) W n = (Xn-1+ Xn-1) /
Do calculation 2.

(2) If IWn-Xn I≦q/2, then Y n =
If W n and l W n −X n I > q / 2, then Y
n = X n + q / 2, or
Let Y n = X n + q / 2.

Here, Xn represents the digitized data (digital signal from the ADC), Yn represents the transformed sequence signal for display (modified data), and q represents the quantization step amount (corresponds to the LSB of the ADC). value).

It is an object of the present invention to provide an ADC output digital signal processing method that apparently improves the precision (resolution) of single-shot waveform display. An object of the present invention is to provide a signal processing method that can apparently improve accuracy (resolution) even when a signal includes high-speed transitions.

Still another object of the present invention is to provide a signal processing method that displays smooth waveforms on a display device.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a digital storage oscilloscope to which the present invention is applied. The input analog signal applied to the input terminal 10 is applied to a known ADCl 4 via an input circuit 12, and the digital signal that is the output of the ADC 14 is stored in an acquisition memory 16. The operation mode (read/write mode) of the acquisition memory 16 is
0 (including data, address, and control bus working lines)
is controlled by a control line 18 connected to. Data stored in acquisition memory 16 is transferred to a first storage area of random Φ access memory (RAM) 22 .

The digital data in the first area of RAM 22 is
A known central processing unit (
(CPU) 24. The present invention relates to this processing method, and the details will be described later. After the processed data is stored in a second area of RAM 22, it is transferred via bus 20 to a digital-to-analog converter (DAC) 28 where it is converted into an analog signal. A display device 30 such as a cathode ray tube receives the outputs of the DAC 28 and the sweep circuit 32 and reproduces and displays the analog waveform. A clock generator 34 outputs clock signals to each block in FIG. 1, and a keyboard 36 is an input device for controlling the settings and operation of the circuit in FIG. In addition to processing digital data, CPU 24 controls all operations of the circuit of FIG. 1 according to a program stored in ROM 26.

The basic theory of the present invention is shown below. First, the digitized data is converted to XO, 11@11, Xn-1, X n,
1. ... represented as φ, Xm (n and m are each positive integers, m is larger than n). In addition, input analog
The data is digitized (ie, converted to a digital signal) by a constant frequency clock signal. Wn is obtained by calculating the average value of Xn-1 and Xn+1. Assuming that the operation of ADCI4 is accurate, the actual data is X n -q / 2 and X n
+q/2, and if the average value is used as change data Yn for waveform display, the reproduced analog waveform will be displayed smoothly. However, in reality, the change data Yn has a difference Vn between the average value and the actual data of q/2.
may be larger than q/2 from the actual data.
The problem is that it does not fall within the range of .

To solve this problem, the present invention determines whether the difference between the average value and the actual data is greater than q/2. That is, if the difference Vn is smaller than q/2,
As shown in Figure 2, Yn is the average value, and the difference Vn is q/2.
and if Xn is smaller than the average value, the third
As shown in the figure, Yn is set to X n + q / 2, and if the difference Vn is larger than q / 2 and Xn is larger than the average value, then Yn is set to X n as shown in Fig. 4.
−q/2.

In this way, by keeping Yn within q/2 of the actual data, the displayed waveform is made smooth.

An embodiment of the above-described signal processing method according to the present invention will be described with reference to FIGS. 5 and 6. Furthermore, Figure 5 shows RAM2.
2 is a diagram schematically representing the contents of 2, and FIG. 6 is a flow chart diagram.

Step 100: Set n to 1 (n=1).

Step 102: Digital data Xn-1, Xn, Xn+ stored in the first area of the RAM 22
1 is transferred to the register of the CPU 24.

Step 104: The CPU 24 calculates the average value Wn of Xn-1 and Xn+1 (i.e., W n = (Xn-1+Xn
+1)/2) and store Wn.

Step 10'6: The CPU 24 calculates the difference Vn between the average value Wn and the digital data Xn and stores Vn (
Vn = Wn - Xn).

Step 108: The CPU 24 determines that the difference IVnl is q/
Determine whether it is equal to or less than 2 (lV
nl≦q/2? ), if the difference 1Vnl is equal to or smaller than q/2, go to step 110, and q
If it exceeds /2, go to step 112. As mentioned above, q is the quantization step amount of ADCI4, that is, AD
Since the value corresponds to the LSB value of C14, q is ADC1
4, and is stored in storage means such as the ROM 26, for example.

Step 110: The CPU 24 converts the average value Wn into Yn
(Yn=Wn).

Step 112: The CPU 24 determines whether the difference Vn is positive or not? Is Vn>O? ), if positive, step 114
If the value is not positive, the process goes to step 116.

Step 114: CPU 24 calculates X n + q /
2 as Yn (Y n = X n +
q/2).

Step 116: The CPU 24 executes X n -q /
2 is output as Yn (Yn=Xn-q/2).

Step 118: Store Yn in the second area of RAM 2217).

Step l20: CPtr24 determines whether n=m-1? ), if they are equal, the process ends; if they are not equal, the process goes to step 122.

Step 122: The CPU 24 sets n to n+1 (n=n+1) and returns to step 102.

Note that the steps shown in FIG. 6 are executed based on a program stored in the ROM 2B.

7 and 8 schematically show display examples (displayed on the display device 30) when the present invention is used and when the present invention is not used, and the circled Xm indicates digital data. X
The black circle indicates the display point corresponding to change data Yn, and as is clear from FIGS. 7 and 8, the black circle shows a smoother waveform display than the circled Xm. It turns out that it will happen.

As is clear from the above description, according to the present invention, it is possible to apparently improve the precision of a single shot waveform captured using a low precision ADC. The present invention utilizes the fact that the data obtained by digitizing a continuous waveform is within the range of q/2 of the actual sample value.
The quality of the reproduced displayed waveform is not degraded. As described above, the present invention is suitable for performing display with higher accuracy than that of the ADC.

Although the present invention has been described in detail above, modifications to the present embodiment will be easily made by those skilled in the art.

For example, the processing method according to the present invention can be repeated to further improve the smoothness of the displayed waveform. Furthermore, by using the present invention and one or both of conventional averaging techniques and dither techniques, it is possible to further improve the smoothness of the displayed waveform.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a digital storage oscilloscope using the present invention, FIGS. 2-3, 7 and 8 are waveform diagrams for explaining the present invention, and FIG. 5 is a block diagram of a digital storage oscilloscope using the present invention. FIG. 1 is a diagram schematically showing the contents of the RAM 22, and FIG. 6 is a flowchart for explaining the present invention. 14: Analog-to-digital converter (ADO) 22 Random access memory (RAM) 24: Central processing unit (CPU) 26: Read-only e-memory (ROM) 28: Digital-to-analog converter (DAC) 30: Display Device Patent Applicant Tektronix Incorporated Agent Patent Attorney Toshiaki Morisaki Procedural Amendment December 2, 1980 Commissioner of the Japan Patent Office Kazuo Wakasugi 1 Indication of this case 1983 Patent Application No. 142237 2 Name of the invention Analog・Processing method of digital converter output signal 3, person performing correction Relationship to this case Patent applicant address: PΦO Box 500 Southwest, Beaverton, Oregon, USA 97077;
Griffith War Drive 4900 Name Chiktorokusha Incorporated Representative Robert Nis Hals Nationality United States 4, Agent Address: 104 (Telephone) 03-543-46
075, Date of amendment order: November 30, 1980, stamp 8, Column 7 of "Brief explanation of drawings J" of the specification subject to amendment, content of amendment "Figures 2 to 3" are divided by "$"!III and "Figures 2 to 4" are inserted. Ihihi

Claims (1)

[Claims] The analog signal is converted into a digital signal Xn (n: a positive integer) by an analog-to-digital converter, the average value Wn of the digital signals Xn+1 and Xn-1 before and after the digital signal Xn is calculated, and the average value Wn and The above digital signal Xn
If the difference between the values of A method for processing an output signal of an analog-to-digital converter, characterized in that if the difference in value of the signal Xn exceeds the above q/2, the sum or difference of the digital signal Xn and the above q/2 is output. .