JPS5935155A - Apparatus for measuring high speed phenomenon - Google Patents

Abstract

PURPOSE:To enable measurement good in time axis preciseness and to make it possible to suppress an error to the utmost even in longtime measurement, by stabilize time axis sweeping by using the time interval of a reset signal and a coincidence signal. CONSTITUTION:A coincidence signal outputted from a threshold circuit 24 is supplied to a TA converter 25 along with a reset signal. This converter 25 outputs the time interval of the reset signal and the coincidence signal as a voltage value. A voltage memory circuit 27 stores the time interval of the reset signal and the coincidence signal at a certain time and return is applied to a sampling signal generating circuit 16 so as to bring the difference this time interval and a later time interval to zero to lock the delay time of sampling. Therefore, time axis sweeping can be stabilized. In addition, because the lock of the aforementioned delay time is held as far as a clock switch 26 is held under an OFF state, an error is extremely reduced even in longtime measurement and good measurement can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for measuring high-speed phenomena in repetitive signals, and more particularly to a high-speed phenomenon measuring device with stabilized time axis sweep.

As is well known, methods for measuring high-speed phenomena of repetitive signals include methods using a sampling oscilloscope or a boxcar integrator.

FIG. 1 shows a conventional high-speed phenomenon measuring device, which uses a sampling oscilloscope.

Here, 1 is a trigger signal generating circuit, and the +-IJ gir signal shown in FIG. 3(a) is repeatedly output from this generating circuit 1. One signal of this bird is signal generation circuit 1
The signal generating circuit 12 generates a predetermined signal in synchronization with the trigger signal. This signal is supplied to the system under test 13. The trigger signal is also supplied to a scanning signal generating circuit 14, which outputs a stepped scanning signal as shown in FIG. 3(b). This scanning signal is supplied to the reset signal generating circuit 5, and the generating circuit 15 outputs a signal G in synchronization with the scanning signal as shown in FIG. 3(C). This reset signal is supplied to the scanning signal generation circuit 14. Furthermore, the scanning signal is supplied to a sampling signal generation circuit 16 together with a trigger signal. The generating circuit 16 generates a ramp signal for each trigger signal, compares the ramp signal with the scanning signal, and generates a sampling signal that is delayed by a predetermined time from the single signal. This sampling signal is supplied to the switching circuit 17,
In this switching circuit 17, the response signal outputted from the system under test 13 is sampled. This sampling output signal is supplied to a vertical input terminal 22 of an oscilloscope (not shown) via an integrating circuit 20 consisting of a resistor 18 and a capacitor 19, and an amplifier 21. ′! 1. Ta,
The scanning signal is supplied to the horizontal input 23 of this oscilloscope, so that the sampled repetitive signal is displayed on this oscilloscope.

With such a device, it is possible to measure repetitive waveforms. However, in this device, the signal generation circuit 1
2 and the sun-silling signal generating circuit 16 cause temperature drift and the like, so there is a limit to their temporal stability. Therefore, it has the disadvantage that the time axis sweep becomes unstable.
In particular, there is a problem in that the error increases in long-term measurements.

This invention was made based on the above circumstances, and its purpose is to be able to stabilize the time axis sweep,
It is an object of the present invention to provide a high-speed phenomenon measuring device that is capable of measuring with high time axis precision and that can suppress errors as much as possible even in long-term measurements.

Hereinafter, one embodiment of the present invention will be described with reference to FIG. 1m. Incidentally, the same parts as in FIG. 1 are given the same reference numerals, and the description thereof will be omitted.

In FIG. 2, 24 is a threshold circuit, and this threshold circuit 24TIC is supplied with the integrated sampling output signal output from the amplifier 2.

This threshold circuit 24 has a threshold value v8 as shown in FIG. 3(d).
is set 9, this threshold V8 and sampling output 4
For example, when the sampling output signal exceeds the threshold value Vs, a match signal shown in FIG. 3(e) is output. Here, the waveform V8o shown in FIG. 3(d) VC hypothetically shows the waveform when the response signal g output from the system under test 13 is sampled continuously. The coincidence signal output from the threshold circuit 24 is TA (Time to Amplitude) together with the reset signal 5-.
e) supplied to converter 25; This TA converter 25 outputs the time interval between the reset signal and the coincidence signal as a voltage value. For example, the reset signal causes a counter (not shown) to start counting, and the coincidence signal stops this counting. is being done.

This count value is then converted into a voltage value and output.

The output voltage of this TA converter 25 is controlled by a lock switch 26,
It is supplied to the inverting input terminal of the differential amplifier 28 via the voltage storage circuit 27, and also directly to the non-inverting input terminal of the differential amplifier 28. The output voltage of the differential amplifier 28 is controlled by a switching circuit 29 and a resistor 30, which is controlled on and off by the reset signal. The signal is supplied to an adding circuit 33 via an integrating circuit 32 made up of a capacitor 31. This addition circuit 33 is supplied with a scanning signal, and this scanning signal and the output voltage of the sample hold circuit 32 are added together. This addition output signal is supplied to the sampling signal generation circuit 16.

6- Here, the operation when the lock switch 26 is turned on will be explained. When the lock switch 26 is in the on state, the storage voltage of the voltage storage circuit 27 (Fig. 3 (gl
) is the output voltage of the TA converter 25 (shown in Fig. 3(f)).
), the TA converter 25 is updated at all times.
The output voltage is the same as that of the Therefore, the output voltage of the differential amplifier 28 (shown in FIG. 3 (hl)) and the output voltage of the integrating circuit 32 (shown in FIG. 3 (1)) are 0.
It is. Therefore, the output signal of the adder circuit 33 is as shown in FIG.
As shown in j), the scanning signal is output as is. This means the same operation as before, as shown in Figure 3(d).
As shown in , if the sampling period of the first period T and the sampling period of the second period T2 are shifted by one sampling period, and there is no time lag in the response signal between the second period T2 and the third period T3, even in the third period T3. The error occurs with a difference of one sampling period.

On the other hand, when the lock switch 26 is turned off, '
The voltage storage circuit 27 stores the immediately preceding output voltage of the TA converter 25. For example, if the lock switch 26 is turned off immediately after the coincidence signal is detected within the first period Tl shown in FIG. 4, the voltage shown in FIG. 4(g) is stored in the voltage storage circuit 27. . Also, the sampling in the second period T2 is the same as the sampling in the first period Tl.
If the sampling time is shifted by one sampling period, the TA converter 25 outputs the voltage shown in FIG. 4(r), for example. The differential amplifier 28 outputs a differential voltage between the two voltages (shown in Figure 4 (h)), and this differential voltage is held in the integrating circuit 32 as shown in Figure 4 (i). This integrated differential voltage is added to the scanning signal in an adder circuit 33. Therefore, from the adder circuit 33, as shown in FIG.
), a scanning signal offset by the voltage difference is output as shown in the third period T3. Therefore, in the sampling signal generation circuit 16, a sampling signal is generated from the scanning signal offset corresponding to the time lag, and the response signal is sampled by this, so that between the third period T3 and the first period T28- If there is no time lag in the response signal, the first period Tl
The time difference that occurs between the first period Tl and the first period Tl is corrected in the third period T3. Therefore, the sampling output signal (shown in FIG. 4(d)) measured in the first period and the third period is lost for a short period of time. After the first period T3, the same operation is performed to store it in the voltage storage circuit 27. voltage and the nth period (
The difference voltage between the voltage difference and the output voltage of the TA converter 25 when n≧2) is determined, and feedback is applied to the sampling signal generation circuit 16 so that this difference voltage becomes 0# in the (n+1)th period. Therefore, the time deviation of the sampling output signal measured in the nth period is corrected in the (n+1)th period.In this way, according to the above embodiment, the time interval between the reset signal and the coincidence signal at the time is stored. Then, feedback is applied to the sampling signal generation circuit 16 so that the difference between this time interval and subsequent time intervals becomes 0", and the sampling delay time is locked. Therefore, it is possible to stabilize the time axis sweep. It is possible.

-〇- Also, since the locking of the delay time is maintained as long as the lock switch 26 is in the OFF state, the error is extremely small even in long-time measurements, and it is possible to perform good measurements.

FIG. 5 shows actual measurement data using the above device. In this case, the signal source 12 outputs, for example, a step pulse signal with a rise time of 501:ls, and this is supplied to the system under test 13. As the system to be measured, for example, the system was used. In addition, a citransient memory was used instead of an oscilloscope for measurements, and the contents of this memory were processed by computer. Each point shown in the figure is the peak position of the impulse waveform that appears in the sampling output signal, determined by computer processing. Figure (a) shows the non-lock state, and figure (b) shows the locked state. . As is clear from both figures, when the sampling delay time is locked, the υ time axis sweep is stabilized over a long period of time.

Next, other embodiments of the invention will be described. Note that the same parts as in FIGS. 2 to 4 are given the same reference numerals 10-, and only the different parts will be explained.

In FIG. 6, the difference from FIG. 2 is the input signal to the threshold circuit 24. That is, the output signal of the signal generation circuit 12 is branched, and this signal is sampled by the sampling signal output from the sampling signal generation circuit 16 in the switching circuit 34. This sampling output signal is supplied to the threshold circuit 24 via an integrating circuit 37 constituted by a resistor 35 and a capacitor 36, and an amplifier 38. In this threshold circuit 24, FIG.
As shown in i), the sampling output signal and the threshold value v8 are compared, and for example, when the sampling output signal exceeds the threshold value v8, a coincidence signal shown in FIG. 7(e) is output. This coincidence signal is supplied to the TA converter 25, and the time interval with the reset signal is determined. The following is similar to the above example,
When the lock switch 26 is turned off, the sampling delay time is locked in accordance with the time interval between the immediately preceding coincidence signal and the reset signal, and when the lock switch 26 is turned on, it is turned off. FIG. 7 is a diagram showing waveforms of various parts in a locked state similar to the fourth closing 1.

Even with the above configuration, the same effects as in the above embodiment can be obtained. Furthermore, since the output signal of the signal generation circuit 12 is directly sampled and then supplied to the threshold circuit 24, there is an advantage that the sampling delay time can always be locked under the same conditions. That is, if the response signal outputted from the system under test 13 is weak and buried in noise, it is difficult to reliably obtain a matching signal in the embodiment described above, and it is difficult to perform long-term measurements. However, in this configuration, a coincidence signal can always be obtained under the same conditions and the sampling delay time can be reliably locked, so that reliable operation can be performed over a long period of time.

In both of the above embodiments, the voltage storage circuit 27 and the differential amplifier 2
8. The integration circuit 32, etc. was explained as an analog circuit, but
It is also possible to use these as digital circuits. In other words, the TA converter 25 outputs a signal corresponding to the time interval between the coincidence signal and the reset signal, and writes this as desired.
It is supplied to a stoppable digital storage circuit and also to a subtraction circuit. This subtraction circuit performs subtraction between the signal stored in the digital storage circuit and the signal output from the TA converter, and supplies this subtracted output signal to the digital integration circuit. The output signal of this integration circuit is passed through a latch circuit controlled by a reset signal? -La D
/A (digital/analog) converter and converts it into a voltage corresponding to the time interval difference signal, and then an adder circuit 3
Supply to 3. Even with such a configuration, it is possible to perform the same operation, and moreover, it is possible to perform the operation more reliably than in the case of an analog circuit.

It goes without saying that various other modifications can be made without departing from the gist of the invention.

As described in detail above, according to the present invention, it is possible to stabilize the time axis sweep, to perform measurements with high time axis accuracy, and to perform high-speed measurements that can minimize errors even during long-term constant measurements. A phenomenon measuring device can be provided.

[Brief explanation of the drawing]

Fig. 1 shows an example of a conventional high-speed phenomenon measuring device; a diagram showing an example of measurement results using the device; , 13... System under test, 14... Set meal signal generation circuit, 15... Reset signal generation circuit, 16... Sampling signal generation circuit, 17... Switching circuit,
24... Threshold circuit, 25... TA converter, 26...
・Lock switch, 27...Voltage memory circuit, 28...
- Differential amplifier, 32... Integrating circuit, 33... Adding circuit. =14- -11ji Tosan-〇 + -toki-I-2

Claims (1)

[Claims] υ A circuit that repeatedly outputs a trigger signal, a circuit that generates a predetermined signal in response to the trigger signal and supplies this signal to the system under test, and a circuit that generates a scanning signal in response to the trigger signal. a circuit that generates a reset signal in response to the scanning signal; a circuit that generates a sampling signal that is synchronized with the scanning signal and the trigger signal and delayed by a predetermined time; a threshold circuit that compares this sampling output signal with a predetermined threshold value and outputs a matching signal; and a threshold circuit that is supplied with the matching signal and the reset signal and generates a signal corresponding to the time interval between the two signals. a circuit for obtaining the signal; a circuit for selectively storing the obtained signal;
a circuit for obtaining a difference signal between the stored signal and the signal corresponding to the submerged time interval; a circuit for integrating the obtained difference signal; and a circuit for integrating the obtained difference signal into the scanning signal. 1. A high-speed phenomenon measuring device, comprising: a circuit that adds the sum and supplies the sampling signal to a circuit that generates the sampling signal. (1) The threshold circuit is configured to be supplied with a signal obtained by sampling the output signal of the signal generation circuit using the sampling signal.
The high-speed phenomenon measuring device described in Section 1.