JPS5935067B2 - Noise signal removal method in pattern recognition - Google Patents

Description

[Detailed Description of the Invention] Pattern recognition for recognizing characters and graphics by converting characters and graphics into electrical signals using an optical scanning input device and performing subsequent processing as a binary image signal; An important issue is how to efficiently remove noise caused by printing holes, spots, etc.

For this reason, various methods have been used in the past, but all have advantages and disadvantages, and no definitive solution has been found yet.

The purpose of the present invention is to provide a new method for removing this noise. To summarize, the reference width determined from the signal is added to or subtracted from the rising and falling edges of the binarized image signal. This removed noise caused by printing holes, stains, etc.

Hereinafter, the present invention will be specifically explained with reference to the drawings. FIG. 1 is an example of a graphic according to the present invention in which a guard bar 2 is provided in front of a character portion 1. 3 passes through the spot 4 and the print hole 5 during scanning, so the binarized image signal becomes as shown in the figure.

That is, a blemish 4 other than the characters causes a whisker pulse A'', and a slit 5 in the printed character portion causes a slit B''. The present invention removes this whisker pulse A1 and slit B. To explain this with reference to FIG.
At the falling part of b), the character thickness, in this case guard bar 2,
Add the reference width signal R calculated from slit B to embed the slit B, and then subtract this reference width signal R from the rising part.In addition, the whisker pulse A has the reference width from the rising part of the image signal First, remove signal R.2.
After that, the reference width signal R is added at the falling edge and E is erased. Looking at the output waveform of E, it is delayed from the original signal A by twice the time width t of the reference width signal R, but it is normal. It can be seen that a waveform in which the slit B and whisker pulse A are removed can be obtained. FIGS. 3 and 4 show specific circuit examples for implementing the above.

FIG. 3 is a basic block diagram, and FIG. 4 is an overall configuration diagram of four blocks connected in cascade. That is, this basic block is a circuit that adds a reference width at the falling edge of the input signal, and the first flip-flop F-F is set at the rising edge of the input signal.
6 and the second flip-flop F set at the falling edge.
-F7, the gate opens by the output of the second flip-flop 7 and starts counting; the counter 9 via the AND gate 8; the comparator that compares the output of the counter 9 with the reference width value calculated from the guard bar 2 and outputs a matching output; 10, an OR gate 11 whose coincidence output causes either of the set signals of the first flip-flop 6 to reset the second flip-flop 7 and the counter 9;
, set signal generators 12 and 13 for extracting respective set signals from the second flip-flops 6 and 7.

Next, the operation will be explained.

The waveforms of each part of the signal are shown at the beginning of the figure. When the input signal C enters the set terminals of the flip-flops 6 and 7, its rising edge t
1 sets the first F-F6, and the output signal D switches from L to H. Then, at time T2 of the falling part, the second F.F.
7 is set, AND gate 8 opens, counter 9 starts counting, and inputs it to comparator 10. A reference width value G is set in the comparator 10. The standard width is calculated from the guard bar placed in front of the number string.
Anything wider than this is treated as a regular signal, and anything narrower than the above width is removed as a stain 2 or, conversely, as a printing hole, which serves as a guideline for noise removal in that number/letter format. It is. Furthermore, since the guard bar is on the same plane as the object of text or figure, a predetermined reference width can always be obtained even if the distance to the figure to be optically scanned changes. By the way, the comparator 10 uses the count value F from the falling part T2 of the input signal and the reference width value G.
If they match and reach F-G, a match output is output at that point and the counter 9 and second F-F7 are reset via T3 and 0R gate 11. At the same time, it is used as a reset input to the first F-F6, and the first F-F6
F6 is reset at time T3, which is delayed by the reference width value t from T2 when the input signal C falls, and the output is switched from H to L. Therefore, the first F-F6 is set at T4 at the rising edge of the input signal C, and the same operation as at tl is performed, but a printing hole 5 occurs in the middle of the character section, for example at T5 in the figure.
, t6, when there is a slit B that switches from H to L and from L to H with a small gap, the reference width is larger than the gap width, and the count value F of the counter 9 from T5 at the falling edge. However, before it matches the reference width value G, the next rising part T
6, the rising signal T6 triggers the second F-F7 and the counter 9 before the coincidence output of the comparator 10 is generated.
is set via the 0B gate 11. As a result, the counting of the counter 9 is stopped by the closing of the AND gate 8 and returned to zero, and continues in that state until the next falling edge occurs and counting starts again. Therefore, this T5,t
At time point 6, no coincidence output is generated and the first F-F6 remains at the H level. In other words, the slit B caused by the printing hole 5 has been corrected. At the falling edge at time T7, as at T2, a set signal is input to the second F/F7, and the y-mount gate 8 opens and the counter 9 starts counting. This lower count value is compared with the input reference width value G to the comparator 10 to which the reference width value G is set, and if the count value F of the counter 9 matches the reference width value G before the next rising edge comes. For example, a matching output is output from the comparator 10, and the first and second flip-flops 6, 7 and the counter 9 are uniformly reset.
That is, the first F-F6 output is inverted at time T8, which is delayed by the reference convergence interval t from the falling edge T7 of the input signal. Note that this operation is the same in the case of the whisker pulse A'' due to the stain at the next time T9 to Tll, and the first F- The output of F6 is inverted and switched from H to L. As a result, the output of this basic block has a waveform that is the falling part of the input signal plus the reference width, and the gap between the falling part and the next rising part is equal to the above reference width. If it is smaller than the width, the gap is removed and the hole is filled, and the slit is corrected due to the printing hole.The same thing can be said when input signal C is inverted and inverted signal C is input. In this case, the circuit becomes a circuit that removes the whisker pulse A'' caused by stains. In any case, by combining this basic process, slit filling and whisker pulse removal 2 can be realized and noise can be easily removed, an example of which is shown in FIG. In FIG. 4, reference numerals 14 to 17 are the aforementioned basic blocks, in which the inverted output E1 of the first basic block 14 is input to the input of the second basic block 15, and the normal output D2 of the second basic block 15 is input to the input of the second basic block 15. The inverted output E3 of the third basic block 16 is connected to the input of the third basic block 16, and the inverted output E3 of the third basic block 16 is connected to the input of the fourth basic block 17. Figure 5 shows the input and output waveforms for each basic block.
The waveform is the same input signal as explained in FIG. 1 and FIG.
When converted to a waveform with the addition of , it becomes the D1 waveform shown in the figure. This D
When the inverted output E1 (C2) waveform of one waveform passes through the second basic block 15, the falling part is delayed by time t and becomes D2 in the diagram.
It becomes a waveform. That is, this D2 waveform is an inverted waveform of the original input waveform C with slit B removed, and when this is inverted, it becomes a waveform that fills the slit B of the input signal C and is delayed by time t. This waveform D2 is further passed through the second basic block 16 to obtain a waveform D3 whose falling edge is delayed by t, the whisker pulse A'' is removed, and the inverted output E3 from the inverted output terminal is passed through the fourth basic block 17. A final output D (D4) is obtained by extending the falling part of the input waveform signal by t.
This final output waveform D (D4) is converted into the input signal waveform C (C1).
It is clear that 2 from the above C (C1) signal
Although it is delayed by double the standard width of 2t, 1 slit B! This means that the waveform has been corrected to a normal signal waveform from which whisker pulse A'' has been removed.In this way, the present invention calculates the reference width from the binarized image signal, and uses this reference width as the rising edge of the image signal, Addition and subtraction are performed at the falling edge, that is, the reference width is added at the falling edge, and then subtracted at the rising edge to embed a slit B smaller than the reference width, conversely, subtracted at the rising edge, and then added at the falling edge to create a whisker pulse A smaller than the reference width. It has the excellent feature that noise removal can be achieved with an extremely simple step of adding and subtracting it at the rising and falling edges of the binarized image signal by finding the reference vergence of the scan signal. An example of the basic program that adds the reference width from the falling part is shown in FIG. 3, but other programs such as those shown in FIGS. 6 and 7 are also conceivable. That is, FIGS. All of the circuits shown in the figure detect the falling edge of the scan signal, count the reference clock from that falling point, and continue counting until a preset reference width value is reached.When it reaches the preset reference width value, it outputs a match output and activates the flip-flop. Although they are the same in terms of the function of adding a reference width of a predetermined width to the original scan signal from the falling edge, they are different in terms of their detailed configurations. Instead, in Fig. 6, an 0R gate 20, an inverter 21 to obtain an inverted output, a capacitor 23 to remove noise 22 at the connection part of the output waveform, and a seventh In the figure, an inverter 24 is connected, and an inverted signal of the input scan signal is taken, and an AND operation is performed between it and the Q output of the flip-flop 6, which is an output signal, to detect the start point of counting, that is, the falling edge of the scan signal.
To explain the figure, the input scan signal C is directly used as the output signal D via the 0R gate 20, and the 0R
The Q output of the flip-flop 7, which is set at the falling edge of the scan signal, is applied to one side of the gate 20, and the coincidence output F&G of the comparator 10 and the rising signal of the input C are applied to the set terminal R. The flip-flop 7 is inverted at any rising edge of the signal C. Therefore, as shown in FIG. 6, D'. Alternatively, a normal output D with noise removed from the joint portion can be obtained. In addition, in Fig. 7, an inverter 24 is inserted, an inverted signal C from the input C is taken, and an AND operation is performed between this and the Q output of the flip-flop 6, which becomes H level at the rising edge, to open the gate 8 and use the counter 9 to count the reference clock and output a coincidence. This is continued until F&G occurs, and the flip-flop 6 is reset by the coincidence output, the output waveform is made into a form with the reference width added from the falling edge, and at the same time, the counter 9 is reset to prepare for the start of the next count.

[Brief explanation of the drawing]

Fig. 1 shows an example of a figure provided with a guard bar according to the present invention, Fig. 2 is a time chart showing a method of processing a scan signal of the figure shown in Fig. 1, and Fig. 3 shows a method for realizing the method of the present invention. One basic block diagram and a time chart to explain its operation, Figures 4 and 5 are an example of a circuit that combines the above basic blocks, and a time chart to explain its operation, Figures 6 and 7. 3 is a time chart for explaining the embodiment of the basic program shown in FIG. 3 and its operation. 8...And gate, 9...Counter, 10...Comparator, 11...0
R gate.

Claims (1)

[Claims] 1. For example, a guard bar is provided on the label to be scanned, a reference width signal corresponding to characters, figures, etc. on the label is obtained from the guard bar, and a digital signal of this reference width signal is set in advance. Then, compare this set value with the count value that starts counting at the fall of the scan signal, and when they match, output a match output, and switch the output that is at H level at the rise of the scan signal to L level. A basic block which adds the above-mentioned reference width signal from the falling edge of the scan signal as described above is characterized in that four of these basic blocks are connected in cascade so that their normal rotation and inversion outputs are alternately input to the next basic block. Noise signal removal method for pattern recognition. 2 The basic block is a counter that starts counting at the output of the first and second flip-flops, which are set at the rising and falling edges of the scan signal, and the output of this counter is set at a preset reference width. The main component is a comparator that outputs a matching output when the value matches the value, and the output of this comparator is used as a reset input for the first and second flip-flops and the counter, and the output of the first flip-flop is normal/inverted. 2. A noise signal removal method in pattern recognition according to claim 1, wherein: is the output of the basic block. 3. The basic blocks include a flip-flop that is set at the falling edge of the scan signal, a counter that starts counting at the output of this flip-flop, and a match output when the output of this counter is compared with a preset reference width value and when they match. It is mainly composed of a comparator, and the output of this comparator is used as the reset input for the above flip-flop and counter.
and OR of the above scan signal and the flip-flop output
Claim 1 characterized in that the calculation output is a normal output and the output via the inverter is an inversion output.
Noise signal removal method in pattern recognition described in Section 2. 4. The basic blocks include a flip-flop that is set at the rising edge of a scan signal, an inverter that inverts the scan signal, a counter that starts counting based on the AND operation result of these flip-flop outputs and the inverter output, and a counter whose output is set in advance. The main component is a comparator that compares with the set standard width value and outputs a matching output when they match.The output of this comparator is used as the reset input for the flip-flop and counter, and the normal/inverted output of the flip-flop is used as the output of this basic block. A noise signal removal method in pattern recognition according to claim 1, characterized in that: