JPS5934496U - Inverter protection circuit - Google Patents

Inverter protection circuit

Info

Publication number
JPS5934496U
JPS5934496U JP12914982U JP12914982U JPS5934496U JP S5934496 U JPS5934496 U JP S5934496U JP 12914982 U JP12914982 U JP 12914982U JP 12914982 U JP12914982 U JP 12914982U JP S5934496 U JPS5934496 U JP S5934496U
Authority
JP
Japan
Prior art keywords
switch element
main switch
protection circuit
antiparallel
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12914982U
Other languages
Japanese (ja)
Inventor
寺嶋 正之
誠 五十嵐
Original Assignee
株式会社明電舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社明電舎 filed Critical 株式会社明電舎
Priority to JP12914982U priority Critical patent/JPS5934496U/en
Publication of JPS5934496U publication Critical patent/JPS5934496U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2図は判定
回路7.8の入出力特性図である。 1v、 、 1.−GTOサイリスタ、2 Us 2 
X””還流用ダイオード、3・・・オンゲート電源、4
・・・オフゲート電源、7・・・電圧判定回路、8・・
・零電流判定回路、10・・・オフゲート電流検出回路
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is an input/output characteristic diagram of the determination circuit 7.8. 1v, , 1. -GTO thyristor, 2 Us 2
X"" Freewheeling diode, 3... On-gate power supply, 4
... Off-gate power supply, 7... Voltage judgment circuit, 8...
- Zero current determination circuit, 10... off-gate current detection circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ブリッジ接続の主スィッチ素子に夫々逆並列に還流用ダ
イオードを具備する主回路構成のインバータにおいて、
第1の主スィッチ素子に直列の第2の主スィッチ素子に
逆並列接続する還流用ダイオードがOFF状態でかつ負
荷電流が所定レベルにある状態で第1の主スィッチ素子
のオン10御を抑止する手段と、第1の主スィッチ素子
のオフ制御に第2の主スィッチ素子に逆並列接続する還
流用ダイオードに電流が流れないときに主回路保護信号
を得る手段とを備えたことを特徴とするインバータの保
護回路。
In an inverter with a main circuit configuration in which freewheeling diodes are provided antiparallel to each bridge-connected main switch element,
The ON/10 control of the first main switch element is inhibited when a freewheeling diode connected in antiparallel to a second main switch element in series with the first main switch element is in an OFF state and the load current is at a predetermined level. and means for obtaining a main circuit protection signal when no current flows through a freewheeling diode connected in antiparallel to a second main switch element for off-control of the first main switch element. Inverter protection circuit.
JP12914982U 1982-08-26 1982-08-26 Inverter protection circuit Pending JPS5934496U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12914982U JPS5934496U (en) 1982-08-26 1982-08-26 Inverter protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12914982U JPS5934496U (en) 1982-08-26 1982-08-26 Inverter protection circuit

Publications (1)

Publication Number Publication Date
JPS5934496U true JPS5934496U (en) 1984-03-03

Family

ID=30292725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12914982U Pending JPS5934496U (en) 1982-08-26 1982-08-26 Inverter protection circuit

Country Status (1)

Country Link
JP (1) JPS5934496U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5512736B2 (en) * 1974-08-08 1980-04-03

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5512736B2 (en) * 1974-08-08 1980-04-03

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