JPS5934173A - Semiconductor testing device - Google Patents
Semiconductor testing deviceInfo
- Publication number
- JPS5934173A JPS5934173A JP57144932A JP14493282A JPS5934173A JP S5934173 A JPS5934173 A JP S5934173A JP 57144932 A JP57144932 A JP 57144932A JP 14493282 A JP14493282 A JP 14493282A JP S5934173 A JPS5934173 A JP S5934173A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- comparator
- output
- resistor
- coaxial cable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
Abstract
Description
【発明の詳細な説明】
この発明は高周波伝送系のインピーダンス整合のための
抵抗終端方法を改良した半導体試験装置に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor testing device that improves a resistor termination method for impedance matching in a high frequency transmission system.
(2)は該被測定半導体素子fl)の1つの出力信号線
、(3)は該出力信号線(2)に対するバック・マツチ
抵抗、即ち後述する同軸ケーブル(5)とのインピーダ
ンス整合をとるための第1の抵抗体、(4)は該第1の
抵抗体(3)をバスするための第1のリレー、(5)は
上記被測定半導体素子(1)からの出力信号を伝送する
ための同軸ケーブル、(7)は該同軸ケーブル(5)の
出力信号■習を比較検出するコンパレータ、+81は上
Je出力信号線(2)の終端抵抗(負・荷抵抗)である
とともに同軸ケーブル(5)の終端でインピーダンス整
合をとるための第2の抵抗体、(9)は被測定半導体素
子(1)からの出力信号に応じて機械式に開閉する第2
のリレー、GO)は出力信号線(2)の終端電位を与え
るための終端電源、 aIJは試験装置の駆動部で本発
明には不要なので詳述しない。(6)は試験装置の駆動
部及び検出部のターミナル、(OHはコンパレータ(7
)の”Hゝ1出力判定のためのH”閾値電圧、νQhは
LlL”出力判定のための し 閾値電圧、(23)は
被測定半導体素子(1)からの出力信号を判定すべきタ
イミングを与えるためのクロック信号5TBCLにの入
力端、(241はコンパレータ(7)によって判断され
たPa5s/Fail信号の出力端である。(2) is one output signal line of the semiconductor device under test (fl), and (3) is a back match resistance for the output signal line (2), that is, for impedance matching with the coaxial cable (5) described later. (4) is a first relay for bussing the first resistor (3); (5) is for transmitting the output signal from the semiconductor device under test (1); coaxial cable, (7) is a comparator that compares and detects the output signal of the coaxial cable (5), +81 is the terminating resistance (load/load resistance) of the upper Je output signal line (2), and the coaxial cable ( (9) is a second resistor for impedance matching at the terminal end of (5), and (9) is a second resistor that mechanically opens and closes according to the output signal from the semiconductor device under test (1).
The relay (GO) is a termination power source for providing the termination potential of the output signal line (2), and aIJ is a drive unit of the test equipment, which is not necessary for the present invention and will not be described in detail. (6) is the terminal of the driving part and detection part of the test equipment, (OH is the comparator (7)
) is the H threshold voltage for determining the H1 output, νQh is the H threshold voltage for determining the LlL output, and (23) is the timing at which the output signal from the semiconductor device under test (1) should be determined. (241 is the output terminal of the Pa5s/Fail signal determined by the comparator (7).
次に動作について説明する。一般に高周波を伝送する場
合、伝送線のインピーダンスと整合していないと伝送波
に反射波等が重畳し、波形歪が生じ、精度の良い測定が
出来ない。第1の抵抗体(3)は上記伝送線である同軸
ケーブル(5)の始端部Gりで発生する反射波を無(す
ためのもので、同軸ケーブル(5)と同じインピーダン
スの抵抗である。同様に第2の抵抗体(8)は、同軸ケ
ーブル(5)の終端部(131での反射波を無くすため
のものである。このよう化波形歪を無くした後、被測定
半導体素子(1)からの出力信号をコンパレータ(7)
で比較判定する。Next, the operation will be explained. Generally, when transmitting a high frequency wave, if the impedance of the transmission line is not matched, reflected waves etc. will be superimposed on the transmitted wave, causing waveform distortion and making accurate measurements impossible. The first resistor (3) is used to eliminate reflected waves generated at the starting end G of the coaxial cable (5), which is the transmission line, and has the same impedance as the coaxial cable (5). Similarly, the second resistor (8) is for eliminating reflected waves at the terminal end (131) of the coaxial cable (5).After eliminating such waveform distortion, the semiconductor device under test ( The output signal from 1) is sent to the comparator (7)
Compare and judge.
被測定半導体素子(1)の動作ファンクション試験にお
いて、該被測定素子(1)からの出力信号が確定する時
間になると、入力端のよくりクロック信号5nChiを
入力してコンパレータ(7)を能動状態にし、上記被測
定素子(1)からの出力信号VOUT;/l(Qopよ
り太きければH,Vobより小さけれは”L+1とコン
パレータ(7)が判定し、期待値と一致すれは、即ち一
〇H以下でVor、以上であれはPa5s、一致しなり
ればl・ailというP a s s/Fa i l信
号を出力端t241に出力する。このようにして、被測
定半導体素子(1)の高速動作試験が実行される。なお
第1のリレー14)は、他の試験項目(例えばDCテス
ト)の場合において、第1の抵抗体(3)が不要な場合
に短絡するためのものであり、第2のリレー(9)は他
の試験項目の場合及び出力信号線(2)が被測定半導体
素子(1)の入力端子に接続されている場合に、開放す
るための機械式リレーである。In the operational function test of the semiconductor device under test (1), when the time comes for the output signal from the device under test (1) to be determined, the comparator (7) is activated by inputting the clock signal 5nChi at the input terminal. The comparator (7) determines that the output signal VOUT from the device under test (1) is /l (if thicker than Qop, it is H; if it is smaller than Vob, it is ``L+1'', and if it matches the expected value, that is, 10 A P as s/Fa i l signal is outputted to the output terminal t241: Vor if it is less than or equal to H, Pa5s if it is more than H, and l·ail if they do not match.In this way, the A high-speed operation test is performed.The first relay 14) is used to short-circuit the first resistor (3) when it is not needed in case of other test items (for example, DC test). , the second relay (9) is a mechanical relay for opening in case of other test items and when the output signal line (2) is connected to the input terminal of the semiconductor device under test (1). .
ところで最近、被測定半導体素子が高速、高密度化して
いるが、動作時の該半導体素子の発熱の問題が大きくな
り、半導体素子1テツプで2ワット以上のものが出現し
ている。このために半導体素子を構成する半導体のジャ
ンクション温度が限界値(通常1oo0c以下)に到達
しつつある。半導体素子の発熱は、内部回路の動作にも
起因するが、高密度で多ビンデバイスにおいては出力電
流に起因する部分が大きくなる。例えば2■の論理振幅
の出力信号を50Ωで終端すると、1ビンの出力当り4
QmAの電流が流れ、出力ピンが100ビンの素子では
4Aの電流が流れることになり、発熱により半導体素子
(1)を破壊してしまうこととなる。Nowadays, semiconductor devices to be measured have become faster and more dense, but the problem of heat generated by the semiconductor devices during operation has become more serious, and semiconductor devices with one step of 2 watts or more have appeared. For this reason, the junction temperature of the semiconductor constituting the semiconductor element is reaching a limit value (usually 100c or less). Heat generation in semiconductor elements is also caused by the operation of internal circuits, but in high-density, multi-bin devices, a large portion is caused by output current. For example, if an output signal with a logic amplitude of 2■ is terminated with 50Ω, 4
A current of QmA flows, and in an element with 100 output pins, a current of 4A flows, which causes heat generation and destroys the semiconductor element (1).
従って、従来の試験装置ではスイッチングに数mS以上
を要する機械式リレーを第2のリレー(9)に使用して
いるため、該第2のリレー(9)が被測定半導体素子(
1)の高速動作< 1Qns以下のスイッチング動作)
に追随出来ず、被測定半導体素子filが過負荷により
破壊するという欠点があった。ここで被測定半導体素子
(1)の動作速度を1機械式リレー(9)の動作速度ま
で遅らせる方法もあるが、この方法では被測定半導体素
子(1)の高速動作を試験出来ないという欠点もある。Therefore, in conventional test equipment, a mechanical relay that requires several milliseconds or more for switching is used as the second relay (9).
1) High-speed operation < switching operation of 1Qns or less)
There was a drawback that the semiconductor element fil to be measured was destroyed due to overload. There is also a method of slowing down the operating speed of the semiconductor device under test (1) to the operating speed of one mechanical relay (9), but this method has the disadvantage that it is not possible to test the high-speed operation of the semiconductor device under test (1). be.
本発明は上記のような従来のものの欠点を除去するため
になされたもので、高精度測定のために必要な終端抵抗
体と直列に高速スイッチング動作をおこなう高速スイッ
チング素子を挿入することにより、実効的な抵抗終端に
よる出力電流の増加を軽減し、被測定半導体素子のジャ
ンクション温度の上昇を激減できるようにした半導体試
験装置を提供することを目的としている。The present invention was made to eliminate the drawbacks of the conventional devices as described above, and by inserting a high-speed switching element that performs high-speed switching operation in series with the termination resistor necessary for high-precision measurement, it is possible to achieve effective It is an object of the present invention to provide a semiconductor testing device that can reduce the increase in output current due to resistive termination and drastically reduce the rise in junction temperature of a semiconductor device under test.
以下この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.
第2図において、(31)はスイッチング時間5nS以
下のJ−FET(接合型電界効果トランジスタ)等で構
成される高速スイッチング素子、 (32)は該高速ス
イッチング素子(31)の開閉を制御するクロック信号
゛l″RMCL、K の入力端である。In Figure 2, (31) is a high-speed switching element composed of a J-FET (junction field effect transistor) or the like with a switching time of 5 nS or less, and (32) is a clock that controls the opening and closing of the high-speed switching element (31). This is the input terminal for the signal ``l''RMCL,K.
第3図は本実施例装置の各部の動作を示すタイミングチ
ャートであり、同図(a)は被測定半導体素子(1)か
らの出力信号VOI77の経時変化を示し、VoL。FIG. 3 is a timing chart showing the operation of each part of the apparatus of this embodiment, and FIG. 3(a) shows the change over time of the output signal VOI77 from the semiconductor device under test (1), VoL.
Vohはそれぞれの低電位時、高7L位時の電圧である
。また同図(b)はコンパレータ(7)を能動状態にす
るための入力端のへ入力されるクロック信号5TBCt
、xの経時変化を示す。また同図(C)は高速スイッチ
ング素子(31)の開閉制御をおこなう上記入力端(3
2)に入力されるクロック信号−1’+u+CLxの経
時変化を、同図(d)は高速スイッチング素子(31)
を閉じたことにより、被測定半導体素子(1)より第2
の抵抗体(8)を通って終端電源(]G0に流出入する
出力電流10υTの経時変化を示す。Voh is the voltage at each low potential and high potential of about 7L. In addition, the same figure (b) shows a clock signal 5TBCt inputted to the input terminal for activating the comparator (7).
, shows the change over time of x. In addition, (C) in the same figure shows the input terminal (3) that controls the opening and closing of the high-speed switching element (31).
2) shows the change over time of the clock signal -1'+u+CLx input to the high-speed switching element (31).
By closing, the second
This shows the change over time of the output current 10υT that flows into and out of the terminal power supply (]G0 through the resistor (8).
次に本実施例の動作について説明する。高速動作におい
て波形歪を無くす為の終端抵抗である第2の抵抗体(8
)は試験装置のコンパレータ(7)によって被測定半導
体素子(1)からの出力信号VasTを判定する場合に
のみ必要である1、ところで、コンパレータ(7)の能
動期間T。は入力端(231に入力されるクロック倍電
5TRCLKによって規定され、この能動期間旧は被i
+++定半導体素子(1)の動作層ルjTOの懐く一部
の区間のみである。従って高速スイッチング集子(31
〕はコンパレータ(7)の能動NJ l’d」]、”a
とその前後を含めた期IHJ Tbだけ閉じるだけでよ
い。また、第3図に示すように、終端電#(10)に流
出入する出力電流10UTは高速スイッチング素子(3
1)がON(閉)である期間Tbのみ、被測定半導体素
子(117J)らの出力信号VOUTに応じI(H’+
出力電流101(またはL出力電流[OLが流れ、高速
スイッチング素子(31)が0FF(開)であろ期「1
1」では流れない。Next, the operation of this embodiment will be explained. The second resistor (8
) is necessary only when the output signal VasT from the semiconductor device under test (1) is determined by the comparator (7) of the test equipment.By the way, the active period T of the comparator (7). is defined by the clock doubler 5TRCLK input to the input terminal (231), and this active period old is
+++ This is only a part of the section where the active layer of the constant semiconductor element (1) is present. Therefore, the fast switching concentrator (31
] is the active NJ l'd of comparator (7)"],"a
It is only necessary to close only the period IHJ Tb including the period before and after. In addition, as shown in Fig. 3, the output current 10UT flowing in and out of the terminal voltage #(10) is connected to the high-speed switching element (3).
1) is ON (closed), I(H'+
Output current 101 (or L output current [OL flows, high-speed switching element (31) is OFF (open)
1" does not flow.
このように本実姉例の試験装置ては該試験装置の各部が
第3図のタイミングチャートに従って動作し、特に、被
測定半導体素子(1)の動作周期丁0の一部分の期間で
ある高速スイッチング素子(31)がONである期間1
゛[)にのみ、出力信号線(2)に11C流が流れると
共に該期17.j Tb内で被測定半導体素子(1)か
らの出力信号をコンパレーク(7)で比較測定すること
により、被試験半導体素子のジャンクション温度をあま
り上昇させずに、精度良く高速動作試験が可能となる。In this way, each part of the test apparatus of this sister example operates according to the timing chart shown in FIG. Period 1 when (31) is ON
11C current flows to the output signal line (2) only in the period 17. By comparing and measuring the output signal from the semiconductor device under test (1) within j Tb with the comparator (7), it is possible to perform high-speed operation tests with high accuracy without significantly increasing the junction temperature of the semiconductor device under test. .
なお」二記実施例では高速スイツーy−ング素子として
J−F’ETを使用したfedを示したが、これはMす
5FET(八−10s型トランジスタ)又はう゛0スイ
ッチを使用してもよい。また終端′屯蝕の代わり(ヒ接
地′dL位又は試験装置dのドシイバを用いてもよい、
。In addition, in the second embodiment, a fed using a J-F'ET was shown as a high-speed switching element, but it is also possible to use an M5FET (8-10S type transistor) or a zero switch. . In addition, instead of the terminal end erosion (earth grounding) or the dosing bar of the test device d may be used.
.
以上のように、本発明によれζj−1W”、′Jiスイ
ッチング1子を0FF(開)にすることによりイノに測
定半導体素子からの出力電流を零にすることができ、か
つ被測定半導体素子からの出力信し−苓コンパレータで
判定する期間は、被測定半導体素子の動作周期に比較し
1/10程度とすることが可能となるので、被測定半導
体素子のジャンクション温度をあまり上昇させずに、し
かも精度良く高速動作試験が可能となる。更に、従来の
装置では機械式リレーを使用しており、該リレーは浮遊
容量が10〜20 pFもあるために波形の立上り時間
/立下り時間の値が大きくなる等の問題があったが、本
装置はJ=”ET(電界効果型トランジスタ〕を使用し
ているため浮遊容量も2〜5 pF と小さく、高速
動作試験を実現することができる。As described above, according to the present invention, by setting one switching element ζj-1W'', 'Ji to 0FF (open), the output current from the semiconductor device to be measured can be made zero, and the output current from the semiconductor device to be measured can be reduced to zero. Since the period of the output signal determined by the comparator can be set to about 1/10 of the operating cycle of the semiconductor device under test, it is possible to reduce the junction temperature of the semiconductor device under test without increasing the junction temperature too much. Moreover, it is possible to perform high-speed operation tests with high accuracy.Furthermore, conventional equipment uses mechanical relays, which have stray capacitance of 10 to 20 pF, so the rise time/fall time of the waveform is There were problems such as the value becoming large, but since this device uses a J = "ET (field effect transistor), the stray capacitance is small at 2 to 5 pF, making it possible to perform high-speed operation tests. .
第1図は従来の出力信号終端方式による半導体試験装置
を示す回路図、第2図は本発明の一実施例を示す回路図
、第3図は上記実施例の動作を示すタイミングチャート
図である。
(1)・・・被試験素子、(3)・・・第1の抵抗体、
(5)・・・同軸ケーブル、(7)・・・出力検出回路
、(8)・・・第2の抵抗体、G31)・・・高速開閉
スイッチング素子。
代理人 葛 野 信 −一手続補正書(自
発)
29発明の名称
半導体試験装置
3、補正をする者
代表者片山仁へ部
4、代理人
5、補正の対象
明細書の発明の詳細な説明の欄及び図面(第3図)
6、補正の内容
(11明細書第4頁第19行の「100℃」を1125
℃」に訂正する。
(2)同第5頁第7行の1従って」を「ところが」に訂
正する。
(3)同第6頁第13〜14行のrV oil、 V
oh」をrVol−、VoHJに訂正する。
(4) 第3図を別紙のとおり訂正する。
以」−FIG. 1 is a circuit diagram showing a semiconductor test device using a conventional output signal termination method, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a timing chart showing the operation of the above embodiment. . (1)...Element under test, (3)...First resistor,
(5) Coaxial cable, (7) Output detection circuit, (8) Second resistor, G31) High speed switching element. Agent Makoto Kuzuno - Written amendment (voluntary) 29 Name of the invention Semiconductor testing device 3 Representative Hitoshi Katayama of the person making the amendment Department 4 Agent 5 Detailed description of the invention in the specification subject to amendment Columns and drawings (Figure 3) 6. Contents of the amendment (11 Changed "100°C" on page 4, line 19 of the specification to 1125
℃”. (2) On page 5, line 7, 1, therefore, should be corrected to ``however.'' (3) rV oil, V on page 6, lines 13-14
Correct "oh" to rVol-, VoHJ. (4) Figure 3 is corrected as shown in the attached sheet. ”−
Claims (1)
軸ケーブルと、該同軸ケーブルの上記被試験素子側の始
端部でインピーダンス整合をとるための第1の抵抗体と
、上記同軸ケーブルの終端部でインピーダンス整合をと
るための第2の抵抗体と、該第2の抵抗体と直列に挿入
された高速開閉スイッチと、上記同軸ケーブルの終端部
に接続され上記被試験素子の出力信号レベルを検出する
出力検出回路とを備えたことを特徴とする半導体試の負
荷抵抗を兼ねるものであることを特徴とする特許88求
の範囲第1項記載の半導体試験装置。(1) #Conductor A coaxial cable for transmitting the high frequency output signal of the device under test, a first resistor for impedance matching at the starting end of the coaxial cable on the side of the device under test, and a terminal end of the coaxial cable. a second resistor for impedance matching at the end of the coaxial cable; a high-speed switch inserted in series with the second resistor; 1. A semiconductor testing device as set forth in item 1 of the scope of Patent No. 88, characterized in that it is equipped with an output detection circuit for detecting and also serves as a load resistor for a semiconductor test.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57144932A JPS5934173A (en) | 1982-08-20 | 1982-08-20 | Semiconductor testing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57144932A JPS5934173A (en) | 1982-08-20 | 1982-08-20 | Semiconductor testing device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5934173A true JPS5934173A (en) | 1984-02-24 |
JPH0326353B2 JPH0326353B2 (en) | 1991-04-10 |
Family
ID=15373545
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57144932A Granted JPS5934173A (en) | 1982-08-20 | 1982-08-20 | Semiconductor testing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5934173A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6334941A (en) * | 1986-07-29 | 1988-02-15 | Mitsubishi Electric Corp | Test equipment for semiconductor wafer |
JPH08213437A (en) * | 1995-02-02 | 1996-08-20 | Nec Corp | Semiconductor integrated circuit device |
-
1982
- 1982-08-20 JP JP57144932A patent/JPS5934173A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6334941A (en) * | 1986-07-29 | 1988-02-15 | Mitsubishi Electric Corp | Test equipment for semiconductor wafer |
JPH08213437A (en) * | 1995-02-02 | 1996-08-20 | Nec Corp | Semiconductor integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPH0326353B2 (en) | 1991-04-10 |
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