JPS5931980B2 - Contact inspection and polarity determination device - Google Patents
Contact inspection and polarity determination deviceInfo
- Publication number
- JPS5931980B2 JPS5931980B2 JP5895777A JP5895777A JPS5931980B2 JP S5931980 B2 JPS5931980 B2 JP S5931980B2 JP 5895777 A JP5895777 A JP 5895777A JP 5895777 A JP5895777 A JP 5895777A JP S5931980 B2 JPS5931980 B2 JP S5931980B2
- Authority
- JP
- Japan
- Prior art keywords
- contact
- switching elements
- case
- polarity
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】
この発明はダイオードに極性のマークをつけるマーキン
グ機などに用いる接触検査および極性判別装置に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a contact inspection and polarity discrimination device used in a marking machine that makes a polarity mark on a diode.
製造されたダイオードはマーキング機で極性のマークを
つけられるが、その際ダイオードの極性および整流性の
良不良がテストされ、それによつて正当な極性にマーク
がつけられる。Manufactured diodes are marked with polarity using a marking machine, during which the diode is tested for polarity and rectification, thereby marking the correct polarity.
ところでそのテストの前提として装置のダイオードそう
入端子とダイオードのリード線との接触の検査も行なう
ようになつている。第1図は従来装置の一例を示す回路
図で、E3、E2、E3は直流電源、に1−a、に2−
a、に3−a、・・・に6−aはそれぞれリレーに1、
に2、に3・・・に6の常開接点(但しリレーに1、に
3、に5は図示してない)、KT−bはリレーに1(図
示せず)の常閉接点、1は被試験ダイオードである。By the way, as a prerequisite for this test, it has become necessary to inspect the contact between the diode input terminal of the device and the diode lead wire. Fig. 1 is a circuit diagram showing an example of a conventional device, where E3, E2, and E3 are DC power supplies, 1-a, 2-
3-a to a, 6-a to 6-a are 1 to the relay, respectively.
2, 3... and 6 normally open contacts (however, relays 1, 3, and 5 are not shown), KT-b has 1 normally closed contact (not shown) in relay, 1 is the diode under test.
接点KT−bが閉じている状態で、接点に1一a、に3
−a、に5−aを順次閉じると接触点p、q(7)接触
が良好ならばリレーに2が動作、接触点に、sの接触が
良好ならばリレーに6が動作、被試験ダイオード1が図
示実線のように正しい極性にあればリレーに4が動作し
て正常であると判断される。With contact KT-b closed, connect contacts 11a and 3.
-a, when 5-a is closed sequentially, contact point p, q (7) If the contact is good, relay 2 operates; if contact point s is good, relay 6 operates; diode under test If 1 is in the correct polarity as shown by the solid line in the figure, 4 is activated in the relay and it is determined that it is normal.
このときリレーに2、に6が動作してに4が不動作の場
合は各接触点の接触は良好であるが、ダイオード1の極
性が逆であるか断線かのいずれかである。At this time, if relays 2 and 6 are activated and relays 4 and 4 are not activated, the contact at each contact point is good, but either the polarity of diode 1 is reversed or it is disconnected.
リレーに4が動作しなくても、リレーに2もしくはに6
のいずれか一方が動作しなければ、それぞれ動作しない
側の接触点の接触の点検をし、この接触不良を排除して
から土述のテストを行うものである。しかし、この装置
ではリレー接点の開閉を用いて卦り、この接点の接触不
良が問題になれば試験の信頼度はくずれてしまうし、試
験速度も向上を期待し難い。Even if 4 does not work on relay, 2 or 6 on relay
If one of the contact points does not work, check the contact at the contact point on the non-working side, eliminate this contact failure, and then perform the test described above. However, this device uses relay contacts to open and close, and if poor contact of these contacts becomes a problem, the reliability of the test will deteriorate, and it is difficult to expect the test speed to improve.
第2図は従来の装置の他の例を示す回路図で、eは交流
電源、T1は絶縁トランス、Rl,R2は抵抗、E4,
E5は基準電圧源、2,3は比較器、4,5はフリツプ
・フロツプ回路である0被試1験ダイオード1には抵抗
R,,R2を通して交流電圧が印加され、ダイオード1
の極性に応じていずれか一方向の電流が抵抗R2に流れ
る。Fig. 2 is a circuit diagram showing another example of the conventional device, where e is an AC power supply, T1 is an isolation transformer, Rl and R2 are resistors, E4,
E5 is a reference voltage source, 2 and 3 are comparators, and 4 and 5 are flip-flop circuits.An AC voltage is applied to diode 1 under test through resistors R, R2,
A current flows through the resistor R2 in one direction depending on the polarity of the resistor R2.
この電流による抵抗R2両端の電圧を比較器2,3によ
つてそれぞれ基準電圧E4,E,と比較し、フリツプ・
フロツプ回路4,5のいずれか一方をセツトするように
なつている。図示の構成では、ダイオード1が実線で示
した極性の場合には比較器2に出力イを生じ、フリツブ
・フロツプ回路4をセツトし判定出力信号二を出す。一
方、ダイオード1が破線で示した極性の場合には比較器
3の出力口がフリツプ・フロツプ回路5をセツトし判定
出力信号ホを出す。もし、ダイオード1が断線のときに
はいずれにも出力信号が出ない。この装置は無接点化が
されて}り、測定が高速にできるという利点は有してい
るが、この測定装置のダイオードそう入端子とダイオー
ドのリード線との接触の検査は行われていず、従つて上
記接触不良とダイオードの断線とは区別ができない。The voltage across resistor R2 due to this current is compared with reference voltages E4 and E by comparators 2 and 3, respectively, and the flip
Either one of flop circuits 4 and 5 is set. In the illustrated configuration, when the diode 1 has the polarity indicated by the solid line, the comparator 2 produces an output "I", which sets the flip-flop circuit 4 and outputs the judgment output signal "2". On the other hand, when the diode 1 has the polarity indicated by the broken line, the output port of the comparator 3 sets the flip-flop circuit 5 and outputs the judgment output signal H. If diode 1 is disconnected, no output signal will be output to either of them. This device is non-contact and has the advantage of being able to perform measurements at high speed, but the contact between the diode input terminal of this measurement device and the diode lead wire has not been inspected. Therefore, it is impossible to distinguish between the aforementioned contact failure and diode disconnection.
更に、商用交流電源を試1験用電源として用いるので、
電源回路からの雑音によつて誤動作する訃それがあり、
安定性に欠けるという欠点があつた〇この発明は以上の
ような点に鑑みてなづれたもので、無接点化され、しか
も高速かつ安定にりード線接触検査および被測定体の極
性を判別する回路を提供せんとするものである。第3図
aはこの発明の原理的一実施例を示す回路図でQ,,Q
2はPNP形トランジスタ、Q3,Q4はNPNトラン
ジスタ、R3,R4は電流制限抵抗、R5は電流検出抵
抗、E6は安定化された直流電源である0被試験体であ
るダイオード1はそのリード線をそれぞれ抵抗R3とト
ランジスタQ3のコレクタとの間ふ・よび抵抗R4とト
ランジスタQ4のコレクタとの間に設けられたそう入端
子にそう入されている。Furthermore, since a commercial AC power supply is used as the power supply for the first test,
Malfunctions may occur due to noise from the power supply circuit.
This invention was developed in view of the above points, and is a contactless, high-speed and stable method for conducting lead wire contact inspection and determining the polarity of the object to be measured. The purpose of this paper is to provide a circuit that does this. Figure 3a is a circuit diagram showing an embodiment of the principle of this invention.
2 is a PNP transistor, Q3 and Q4 are NPN transistors, R3 and R4 are current limiting resistors, R5 is a current detecting resistor, and E6 is a stabilized DC power supply. They are respectively connected to input terminals provided between the resistor R3 and the collector of the transistor Q3 and between the resistor R4 and the collector of the transistor Q4.
第3図bは第3図aの回路の動作を説明するための各部
波形図で、波形へ,卜,チ}よびリはそれぞれトランジ
スタQ,,Q2,Q3}よびQ4へのベース1駆動電圧
、波形ヌは抵抗R5の両端の検出出力電圧である。FIG. 3b is a waveform diagram of each part for explaining the operation of the circuit of FIG. , waveform N is the detected output voltage across the resistor R5.
期間T1にはトランジスタQ1とQ3とが導通し(トラ
ンジスタQ2,Q4は非導通)、実線で示すダイオード
1のカソード側のリード線とそう入端子との接触が良好
なときには、E6→Q1→R3→Q3→R5→E6閉回
路に電流が流れ、抵抗R5の両端に電圧ヌが現われる。
もし、りード線とそう入端子との接触が悪い場合は抵抗
R5の両端には電圧は現われない。このようにして期間
T1にはダイオード1のカソード側のそう入端子への接
触検査が行われる。期間T2にはトランジスタQ2とQ
4とが導通し(トランジスタQl,Q3は非導通)、ダ
イオード1のアノード側のリード線とそう入端子との接
触検査が行なわれる。During period T1, transistors Q1 and Q3 are conductive (transistors Q2 and Q4 are non-conductive), and when there is good contact between the lead wire on the cathode side of diode 1 and the input terminal shown by the solid line, E6→Q1→R3 →Q3→R5→E6 A current flows through the closed circuit, and a voltage appears across the resistor R5.
If there is poor contact between the lead wire and the input terminal, no voltage will appear across the resistor R5. In this manner, a contact test to the input terminal on the cathode side of the diode 1 is performed during the period T1. During period T2, transistors Q2 and Q
4 is conductive (transistors Ql and Q3 are non-conductive), and a contact test is performed between the lead wire on the anode side of diode 1 and the input terminal.
次に期間T3に}いてはトランジスタQlQ4とが導通
し(トランジスタQ2,Q3は非導通)、E6→Q1→
R3→ダイオード1→Q4→R,→E6の閉回路が形成
され、ダイオード1が実線で示した極性のときは電流は
流れず、破線で示した極性のときに電流が流れる。Next, during period T3}, transistor QlQ4 becomes conductive (transistors Q2 and Q3 are non-conductive), and E6→Q1→
A closed circuit of R3→diode 1→Q4→R,→E6 is formed, and no current flows when diode 1 has the polarity shown by the solid line, but current flows when the diode 1 has the polarity shown by the broken line.
更に期間T4にふ一いてはトランジスタQ2と9とが導
通し(トランジスタQl,Q4は非導通)、ダイオード
1が実線で示した極性のときは抵抗R5に電流が流れ、
破線で示した極性のときには電流が流れない。Further, during period T4, transistors Q2 and 9 are conductive (transistors Ql and Q4 are non-conductive), and when diode 1 has the polarity shown by the solid line, current flows through resistor R5.
No current flows when the polarity is indicated by the broken line.
な}、ダイオード1に断線があれば、期間T,,T2に
}ける接触検査の結果が良好であつても、期間T3,T
4とも抵抗R5には電流ば流れない。}, if there is a disconnection in diode 1, even if the result of the contact test in periods T, T2 is good, the period T3, T2
4, no current flows through the resistor R5.
一方、ダイオード1に短絡があれば、期間T3,T4と
もに抵抗R5に電流が流れる。以上をまとめると次表の
ようになる。士表の出力は上から順に第3図Bに示した
出力ヌのA,B,C,D,E}よびFにそれぞれ対応す
る。On the other hand, if there is a short circuit in the diode 1, current flows through the resistor R5 during both periods T3 and T4. The above can be summarized as shown in the table below. The outputs of the output correspond to outputs A, B, C, D, E} and F shown in FIG. 3B in order from the top.
第4図aは周辺補助回路を附加したこの発明の他の実施
例を示す回路図で、安定化直流電源E6、トランジスタ
Q,〜Qぃ抵抗R3〜R5からなる主体部分は第3図a
に示した実施例と同一である。Fig. 4a is a circuit diagram showing another embodiment of the present invention in which a peripheral auxiliary circuit is added.
This is the same as the embodiment shown in .
トランジスタQ5〜Q8および抵抗R6〜Rl5は駆動
補助回路を構成し、更に6は電流検出抵抗R5の両端の
出力電圧を基準電圧E7と比較する比較器、7はシフト
レジスタ、8,9は0Rゲート、10,11はNORゲ
ート、12はクロツクパルス発生器、13はシフトレジ
スタである。第4図bはこの実施例の動作を説明するた
めの各部波形図である。スタート信号ルを与えるとクロ
ツクパルス発生器12はこれを受けてクロツクパルスヲ
}よびストローブパルスムを発生する。Transistors Q5 to Q8 and resistors R6 to Rl5 constitute a drive auxiliary circuit, 6 is a comparator that compares the output voltage across the current detection resistor R5 with reference voltage E7, 7 is a shift register, and 8 and 9 are 0R gates. , 10 and 11 are NOR gates, 12 is a clock pulse generator, and 13 is a shift register. FIG. 4b is a waveform diagram of each part for explaining the operation of this embodiment. When a start signal is applied, the clock pulse generator 12 receives this and generates a clock pulse and a strobe pulse.
シフトレジスタ7はスタート信号ルとこのクロツクパル
スヲとを受けて、順次遅れた出力ワ,力,ヨ,夕を発生
する。これらの出力は0Rゲート8,9訃よびNORゲ
ート10,11によつて合成されて、試験部1駆動信号
レ,ソ,ツ,ネが得られる。これによつて、トランジス
タQ5〜Q8訃よび抵抗R6〜Rl5を用いて主体部分
を構成するトランジスタQ1〜Q4のベースに第3図b
に示した,駆動電圧波形へ,卜,チ,りがそれぞれ得ら
れることは回路構成から容易に理解できよう。このよう
にして、順次被試験体であるダイオード1のリード線接
触検査および極性判別が行われる〇電流検出抵抗R5の
両端に生じる通電信号ナと基準電流に対応する基準電圧
E7とを比較器6で比較し、その比較出ガラを上述のス
トローフッくルスムによつてシフトレジスタ13にシフ
ト入力させると各出力には波形ウ,イ,ノ,オに示すよ
うに情報が入る。The shift register 7 receives the start signal and this clock pulse and generates delayed outputs in sequence. These outputs are combined by 0R gates 8 and 9 and NOR gates 10 and 11 to obtain test section 1 drive signals R, S, T, and N. As a result, the bases of the transistors Q1 to Q4, which constitute the main part using the transistors Q5 to Q8 and the resistors R6 to Rl5, can be set as shown in FIG.
It can be easily understood from the circuit configuration that the drive voltage waveforms shown in Figure 1 can be obtained with the following values. In this way, the lead wire contact inspection and polarity determination of the diode 1, which is the object under test, are performed sequentially. The energization signal N generated across the current detection resistor R5 and the reference voltage E7 corresponding to the reference current are detected by the comparator 6. When the comparison outputs are shifted into the shift register 13 by the above-mentioned straw flux, each output contains information as shown in the waveforms C, I, NO, and O.
従つて、試験終了後のこれらの信号は、第3図bのタイ
ミングT4,T3,T2,T,にあ一ける出力ヌに相当
することは容易に理解できよう0このようにして、前述
のと卦り接触不良、正方向、逆方向、断線、短絡に被試
験体1を分類することができる。以上各実施例では所定
電流が通電したか否かを比較器6の比較出ガラによつて
判定しいてるのみであるが、被試験体1の順電圧の大小
をも判定に関与させることもできる。Therefore, it is easy to understand that these signals after the test correspond to the outputs at timings T4, T3, T2, and T in FIG. 3b. The test object 1 can be classified into poor contact, forward direction, reverse direction, disconnection, and short circuit. In each of the above embodiments, whether or not a predetermined current has been applied is only determined based on the comparison output of the comparator 6, but the magnitude of the forward voltage of the test object 1 may also be involved in the determination. .
第5図はこのような機能をもたせたこの発明の更に他の
実施例を示す回路図で、14〜16は演算増幅器、17
は比較器、18はAND回路である。被試験体1の順電
圧は演算増幅器14と抵抗Rl6〜Rl9とで構成づれ
る電圧差検出回路によつて信号クとして検出される。こ
の電圧は正、負いずれの値もとるので、演算増幅器15
,16、ダイオードD,,D2お・よび抵抗R2O−R
24によつて構成される絶対値回路によつて絶対値マが
検出づれ、比較器17によつて基準電圧E8と比較され
、順電圧大小判定信号ケが得られる。この信号ケと前述
の信号ラとをAND回路18で合成して得た通電判定信
号7を前記電流検出信号ラの代りに用いれば順電圧の大
小をこの試験に関与させることができる。以上、この発
明はダイオードのマーキング機に用いる場合について述
べたが、ダイオード試験機などにも応用可能であり、ま
た、被試験体もダイオードに限らず方向性素子一般に利
用できる。FIG. 5 is a circuit diagram showing still another embodiment of the present invention having such a function, in which 14 to 16 are operational amplifiers, and 17 are operational amplifiers.
is a comparator, and 18 is an AND circuit. The forward voltage of the test object 1 is detected as a signal by a voltage difference detection circuit composed of an operational amplifier 14 and resistors R16 to R19. Since this voltage takes either positive or negative values, the operational amplifier 15
, 16, diodes D, , D2, and resistors R2O-R
The absolute value M is detected by the absolute value circuit constituted by 24, and compared with the reference voltage E8 by the comparator 17 to obtain a forward voltage magnitude determination signal K. If the energization determination signal 7 obtained by combining this signal A and the above-mentioned signal A in an AND circuit 18 is used in place of the current detection signal A, the magnitude of the forward voltage can be involved in this test. Although the present invention has been described above for use in a diode marking machine, it can also be applied to a diode testing machine, etc., and the test object is not limited to diodes, but can be used for directional elements in general.
以上詳述したように、この発明では被試験体の一方の極
に第1訃よび第2の接触端子を接触させ、他方の極に第
3卦よび第4の接触端子を接触させ、直流電源の正極か
ら第1}よび第3の接触子への通電をそれぞれ開閉可能
な第1}よび第2の無接点開閉素子と上記第2および第
4の接触子から直流電源の負極への通電をそれぞれ開閉
可能な第3}よび第4の無接点開閉素子並びに直流電源
から供給される電流を制限する抵抗を備えているので、
上記第1ないし第4の無接点開閉素子の開閉の組合わせ
によつて接触端子の接触の検査、卦よび被試験体の極性
判別が高速かつ安定に可能であるばかりでなく、被試験
体の断線、短絡による通電方向性の喪失をもチエツクで
きる。As detailed above, in this invention, one pole of the test object is brought into contact with the first contact terminal and the second contact terminal, the other pole is brought into contact with the third contact terminal and the fourth contact terminal, and the DC power supply The first } and second non-contact switching elements are capable of opening and closing energization from the positive electrode to the first } and third contactors, respectively, and the energization from the second and fourth contactors to the negative electrode of the DC power source. Since it is equipped with third and fourth non-contact switching elements that can be opened and closed, respectively, and a resistor that limits the current supplied from the DC power supply,
By combining the opening and closing of the first to fourth non-contact switching elements, it is not only possible to inspect the contact of the contact terminals and determine the polarity of the test object at high speed and stability. It is also possible to check for loss of current directionality due to disconnection or short circuit.
第1図は従来装置の一例を示す回路図、第2図は従来装
置の他の例を示す回路図、第3図aはこの発明の原理的
一実施例を示す回路図、第3図bは第3図aの回路の動
作を説明するための各部波形図、第4図aは周辺補助回
路を附加したこの発明の他の実施例を示す回路図、第4
図bは第4図aの回路の動作を説明するための各部波形
図、第5図はこの発明の更に他の実施例を示す回路図で
ある〇図に卦いて、1は被試験体、E6は直流電源、Q
l,Q2,Q3}よびQ4はそれぞれ第1、第2、第3
}よび第4の無接点開閉素子、R3卦よびR4は電流制
限用抵抗である。Fig. 1 is a circuit diagram showing an example of a conventional device, Fig. 2 is a circuit diagram showing another example of the conventional device, Fig. 3a is a circuit diagram showing an embodiment of the principle of the present invention, Fig. 3b 3A is a waveform diagram of various parts for explaining the operation of the circuit of FIG. 3a, FIG.
Fig. b is a waveform diagram of various parts for explaining the operation of the circuit of Fig. 4a, and Fig. 5 is a circuit diagram showing still another embodiment of the present invention. E6 is a DC power supply, Q
l, Q2, Q3} and Q4 are the first, second, and third, respectively.
} and the fourth non-contact switching element, R3 and R4 are current limiting resistors.
Claims (1)
第1および第2の接触端子、上記被試験体の他方の極が
接触する第3および第4の接触端子、直流電源の正極か
ら上記第1および第3の接触端子への通電をそれぞれ開
閉可能な第1および第2の無接点開閉素子、上記第2お
よび第4の接触端子から上記直流電源の負極への通電を
それぞれ開閉可能な第3および第4の無接点開閉素子、
並びに上記直流電源から供給される電流を検出する電流
値検出手段を備え、上記第1および第3の無接点開閉素
子を閉状態、上記第2および第4の無接点開閉素子を開
状態とした第1の場合と、上記第1および第3の無接点
開閉素子を開状態、上記第2および第4の無接点開閉素
子を閉状態とした第2の場合と、上記第1および第4の
無接点開閉素子を閉状態、上記第2および第3の無接点
開閉素子を開状態とした第3の場合と、上記第2および
第3の無接点開閉素子を閉状態、上記第1および第4の
無接点開閉素子を開状態とした第4の場合とにおける上
記電流値検出手段による検出電流値から上記各接触端子
の接触の良否および上記被試験体の極性を判別するよう
にしたことを特徴とする接触検査および極性判別装置。 2 第1、第2、第3および第4の無接点開閉素子にト
ランジスタを用いたことを特徴とする特許請求の範囲第
1項記載の接触検査および極性判別装置。[Claims] 1. First and second contact terminals that are in contact with one pole of a test object having current directionality, and third and fourth contact terminals that are in contact with the other pole of the test object. , first and second non-contact switching elements capable of switching on and off electricity from the positive electrode of the DC power source to the first and third contact terminals, respectively; from the second and fourth contact terminals to the negative electrode of the DC power source; third and fourth non-contact switching elements capable of respectively switching on and off energization;
and current value detection means for detecting the current supplied from the DC power supply, the first and third non-contact switching elements being in a closed state and the second and fourth non-contact switching elements being in an open state. A first case, a second case in which the first and third non-contact switching elements are in an open state, and a second case in which the second and fourth non-contact switching elements are in a closed state, and a second case in which the above-mentioned first and fourth non-contact switching elements are in a closed state. A third case in which the non-contact switching element is in a closed state and the second and third non-contact switching elements are in an open state, and a third case in which the second and third non-contact switching elements are in a closed state and the first and third non-contact switching elements are in a closed state. The quality of the contact of each of the contact terminals and the polarity of the test object are determined from the current value detected by the current value detection means in the fourth case in which the non-contact switching element of No. 4 is in an open state. Features a contact inspection and polarity determination device. 2. The contact inspection and polarity discrimination device according to claim 1, wherein transistors are used for the first, second, third, and fourth non-contact switching elements.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5895777A JPS5931980B2 (en) | 1977-05-21 | 1977-05-21 | Contact inspection and polarity determination device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5895777A JPS5931980B2 (en) | 1977-05-21 | 1977-05-21 | Contact inspection and polarity determination device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53144272A JPS53144272A (en) | 1978-12-15 |
JPS5931980B2 true JPS5931980B2 (en) | 1984-08-06 |
Family
ID=13099309
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5895777A Expired JPS5931980B2 (en) | 1977-05-21 | 1977-05-21 | Contact inspection and polarity determination device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5931980B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62203474U (en) * | 1986-06-17 | 1987-12-25 | ||
CN102680845B (en) * | 2012-05-04 | 2014-11-26 | 深圳连硕自动化科技有限公司 | Polarity determining device of direct plug-in type two-pin semiconductor |
-
1977
- 1977-05-21 JP JP5895777A patent/JPS5931980B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS53144272A (en) | 1978-12-15 |
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