JPS5931047Y2 - cascode amplifier circuit - Google Patents

Description

[Detailed explanation of the idea] The present invention relates to a cascode amplifier circuit.

When a cascode amplifier circuit is composed of bipolar transistors, the input signal is applied to the base electrode of a common-emitter amplification transistor, the emitter is connected to the collector of the amplification transistor, and the output terminal (a so-called cascode transistor whose collector is connected to A reference power source is connected to the base electrode of the cascode transistor.

In such a configuration, the cascode transistor operates as a common base transistor with low input impedance, and this common base transistor serves as a load for the amplification transistor, so that it has various advantages as described below and is widely used.

That is, a high output can be obtained because the collector load of the amplification transistor is apparently reduced, and a stable amplification function can be obtained because the common base transistor has an impedance conversion function.

Furthermore, the input capacitance of the amplifier is reduced, resulting in good frequency characteristics and high-speed operation.

In particular, when a cascode connection configuration is used in a differential amplifier circuit, in addition to the above-mentioned advantages, the common mode rejection ratio □ (CMR)
It is an extremely useful circuit that has the effect of improving

FIG. 1 is a diagram showing an example of a conventional cascode amplifier circuit, in which an input signal is applied to the base of an NPN transistor Q1 for amplification, and the emitter is grounded via a feedback resistor RE.

The collector of transistor Q0 is connected to the emitter of NPN cascode transistor Q2, and its collector is connected to the power supply via a load resistor RL.

A reference power source E is applied to the base of the cascode transistor Q2, and the output of the amplifier circuit is derived from the base of the transistor Q2.

In the configuration, the power source E is expressed by the following equation.

E-VBE2+VOEt+IERE ・・・・・・・・・
(1) Here, ■BE2 is the base-emitter voltage of the transistor Q2, vcE is the collector-emitter voltage of the transistor Q1, and IE is the emitter current of the transistor Q1.

Expressing equation (1) in terms of VcE and t' gives the following equation.

VOE1=E (VBE2+IERB)------...
(2) Therefore, when the collector current, that is, the emitter current changes due to the input signal, the VOB of transistor Q1
This has the disadvantage that t also changes, making the operation of the amplifier unstable.

In particular, in the case of an amplifying transistor FET (field effect transistor), the drain-source voltage varies depending on the input level, which has the drawback of increasing non-linearity or increasing or decreasing noise.

Furthermore, although a Zener diode is normally used as the power source E, there is also the problem that noise is generated due to the characteristics of the Zener diode.

An object of the present invention is to provide a cascode amplifier circuit having a stable amplification function that eliminates the above-mentioned drawbacks.

Hereinafter, the present invention will be explained in detail with reference to the accompanying drawings.

FIG. 2 is a circuit diagram showing an embodiment of the present invention. Parts equivalent to those in FIG. The input of the voltage follower circuit 10 is connected to the base, which is the control electrode of the amplification transistor Q1, and the output is connected to the base, which is the control electrode of the cascode transistor Q2.

The voltage follower circuit 10 includes a PNP transistor Q3 and a level shift diode D1. It is composed of D2.

That is, the base of transistor Q and the transistor Q3
The bases of the transistors are connected in common, the collectors of the transistors are connected to the negative power supply, and the emitters are connected to the diode D1. It is connected to the blank connection circuit of D2.

Therefore, transistor Q3 forms an emitter follower circuit.

This emitter follower output is a level shift diode D
1. It becomes the base input of the transistor Q2 via D2 (and is also connected to the constant current source 1).

In such a configuration, the input voltage of the base electrode of the amplifying transistor Q1 is υi, and the diode -1'l)1°D2
Letting the forward voltages of both be vD, the following equation holds true.

Emitter voltage of transistor Q1: VBl −v i VBEl””・(3) Output voltage of voltage follower circuit 10: V□−1) i +VBB3 + 2 V D・”・”
...(4) Emitter voltage of transistor Q2: VE=V.

-VBB2=υi +VBE3 +2 V DVBE2
・・・・・・・・・(5) Therefore, (3)
, From the equation (5), the collector-emitter voltage vcE1 of the transistor Q1 becomes as shown in the following equation.

VcE1=VE2 VE1=VBB+2VD-・-・-
(6) It is assumed that the VBE of each transistor is all equal.

As is clear from the above equation (6), the amplification transistor Q1
The collector-emitter voltage cE1 is always a constant voltage regardless of the input level, so a stable amplification effect is achieved.

Since the transistor Q3 operates as an emitter follower, mutual interference between the human power signal (IN) of the voltage follower circuit 10 and the output section of the voltage follower circuit 10 can be eliminated, and the constant current source This prevents the inflow of into the input signal side (this also makes it possible to supply the base bias of the cascode transistor Q2 with low impedance).

In this case, the value of VCEt of the amplification transistor Q1 is made as small as possible to reduce the loss due to the transistor Q1 (VCEt).
OEI X I c ), the level shift diode D1. D2 may be omitted and the emitter of the emitter follower transistor Q3 may be directly input to the base of the transistor Q2.

VOEt at this time becomes equal to VBE of transistor Q3.

In other words, only the emitter follower transistor Q3 has a voltage follower function and a level shift function, resulting in an extremely simple structure.

Furthermore, it is also possible to increase or decrease the number of level shift diodes as necessary to make the value of VOEl arbitrary.

The collector-emitter voltage VcE of the transistor
If it is made too small, the output distortion will increase, so it is necessary to determine the VOE so that this distortion does not occur, and the VOE in this example
E1 is practical.

FIG. 3 is a circuit diagram showing another embodiment of the present invention, in which the amplifying transistor Q1 and the cascode transistor Q2 are formed by N-channel field effect transistors, and the source of the transistor Q1 is connected to a constant current source I2. This invention is applied to a cascode amplifier circuit.

Amplification transistor Q. The voltage follower circuit 10, which is connected between the gate which is the control electrode of the cascode amplification transistor Q2 and the gate which is the control electrode of the cascode amplification transistor Q2, is a source follower circuit consisting of an N-channel FET Q4 and its source follower output. PNP with base input
It consists of an emitter follower circuit consisting of a transistor Q3 and a diode D which level shifts the emitter follower output and uses it as a gate input of the transistor Q2.

The source of transistor Q4 is connected to constant current source 3.

In such a configuration, the following equation holds true.

Source voltage of transistor Q1: ■s1-υj (VGSm)=υi + VG B
1・”・(7) Output voltage of voltage follower circuit 10: V□−U i +VGS++VBFi3 +V D
-,,, (8) Source voltage of transistor Q2: ■s2=■o+■G52-υi +VGS4 +VBE
3 ++V D+vGs 2 ・---
-.-(9) Therefore, from equations (7) and (9), the voltage VDSt between the drain and source of the transistor Q1 becomes as shown in the following equation.

VDS1=V82 V8t=VG8+VBB+VD-
--(11) It is assumed that the VGS of each transistor is all equal.

As is clear from the above equation α0, the drain-source voltage VD81 of the amplifying transistor Q1 is always a constant voltage regardless of the input level, and therefore a stable amplifying action is performed.

In Example 1 of FIG. 3, the input impedance of the voltage follower circuit 10 is made higher by using a two-stage configuration of a source follower and an emitter follower.

However, as shown in FIG. 2, it is clear that the number of level shift diodes may be increased or decreased as necessary in a one-stage emitter follower configuration.

FIG. 4 is a circuit diagram of still another embodiment of the present invention, showing an example of a cascode differential amplifier circuit.

NPNt-transistor Qto t Qtt for differential amplification
is a constant current source I, whose emitters are commonly connected.

It is connected to the. Differential input signals (IN+, I
N ) is applied.

Each collector is connected to each emitter of an NPN type cascode transistor Q12 t Q13 whose bases are commonly connected, and both collectors of the cascode transistor Q12 t Q13 are connected to an NPN transistor Q14 p Q15.
The current mirror circuit is connected to the power supply through a current mirror circuit consisting of the following, and this current mirror circuit operates as an active load of the differential amplifier circuit.

Then, an output signal is derived from the collector of transistor Q]3.

The input of the voltage follower circuit 10 is a differential transistor Q1o.
, Q,1 is connected to the base of transistor Qll, for example, whose output is connected to the base of cascode transistor Q
12. It is connected to the base common connection point of Q13.

The voltage follower circuit 10 includes an emitter follower circuit composed of a PNP transistor Q3, and a level shift diode D1 . Contains D2.

Even in such a configuration, the amplifying transistor Q11. Collector-emitter voltage V of Q1
OE is expressed as VcB = VBB + 2VD, and it is clear that it remains constant with respect to input level fluctuations.

In this example as well, the number of level shift diodes can be increased or decreased as necessary.

FIG. 5 is a circuit diagram showing another embodiment of the present invention, in which the differential amplification transistors Q1o, Q1□ and the cascode transistor Q12 t Qts are N-channel FETs, and their connection relationship is shown in FIG. This is similar to the bipolar transistor circuit.

The voltage follower circuit 10 has a gate electrode connected to a differential input (IN
) transistor Q4' which is a source follower circuit connected to PNP transistor Q4' which is an emitter follower circuit which receives the source follower output as input;
The output of this diode D1 is a cascode transistor Q1□.

This is a configuration in which the voltage is applied to the gate common connection point of Q13.

In such a configuration, as in the example shown in FIG. 3, the drain-source voltage V of the amplification transistor Q1o t Qvt
8D becomes ■SD−■GS+■BE+VD, which remains constant regardless of input level fluctuation.

FIG. 6 is a diagram showing still another embodiment of the present invention, in which the differential amplification transistors Q1o and Q11 are N-channel FE transistors.
A differential amplifier circuit is shown in which the cascode transistors Q1□ and Q13 are NPN transistors.

The voltage follower circuit 10 has a gate electrode connected to a differential input (IN
) is connected to the N-channel/l/FET Q4 that forms a source follower circuit, and the PN that forms an emitter follower circuit whose source follower output is the base input.
P transistor Q3 and a diode D1.P for level shifting its emitter follower output. I am more careful than D21D3.

In such a configuration, the amplification transistor Q1 o t
The drain-source voltage VSD of Qll is VSD=3VD
Therefore, it remains constant regardless of input level fluctuations.

FIG. 7 is a diagram showing another embodiment of the present invention, and shows an example in which the voltage follower circuit 10 of the present invention is applied to the differential amplifier circuit in FIG. an operational amplifier 11 whose input is connected to a differential input (IN) and whose inverting input is connected to its output; a PNP transistor Q3 forming an emitter follower circuit whose base input is the output of the operational amplifier 11 and whose collector is grounded; It consists of a diode D1 that shifts the level of this emitter follower output.

The operational amplifier 11 itself has a voltage follower function.

In such a configuration, if the level shift amount by the operational amplifier 11 is Vs, the amplification transistors Q1o, Q1
The drain-source voltage VSG of 1 is Vso=Vs+
vBE+vD, which is also independent of input level fluctuations.

As detailed above, according to the present invention, the voltage between the collector and emitter or the voltage between the drain and source of the amplification transistor can be kept constant regardless of input level fluctuations, so the cascode amplifier circuit is stable and has low noise. is obtained.

In addition, since the bias to the control electrode of the cascode transistor is supplied using a voltage follower circuit, low impedance drive is possible, and it is suitable as a bias power supply. It becomes possible to omit the large-capacity capacitor required to reduce the impedance of the circuit, and therefore, the integration of the circuit becomes easy.

Furthermore, in Fig. 1, the voltage of the power supply E must be increased in consideration of handling large amplitude signals, which has the disadvantage that the power consumption in the amplification transistor becomes high. In the present invention, by controlling the amount of level shift by the voltage follower circuit, it is possible to suppress the collector-emitter (drain-source) type pressure of the amplification transistor, thereby reducing the power consumption of the transistor. can do.

Further, the circuit according to the present invention does not use a Zener diode, and there is no problem of noise generation caused by the Zener diode.

[Brief explanation of drawings]

Fig. 1 is a diagram showing a conventional cascode amplifier circuit, Fig. 2 is a circuit diagram showing an embodiment of the invention, Fig. 3 is a circuit diagram showing another embodiment of the invention, and Fig. 4 is a circuit diagram showing an embodiment of the invention. FIG. 5 is a circuit diagram showing another embodiment of the present invention. FIG. 6 is a circuit diagram showing still another embodiment of the present invention. FIG. 7 is a circuit diagram showing still another embodiment of the present invention. FIG. 3 is a circuit diagram showing another embodiment of the present invention. Explanation of symbols of main parts: Ql...amplification transistor, Q2. Q1□, Q13... Cascode transistor, Q3... Emitter follower transistor, Q4... Cathode follower transistor, QlotQll... Differential amplification transistor, Dl , D2. D3... Level shift diode, 10... Voltage follower circuit, 11...
...Operation amplifier circuit.

Claims (10)

[Scope of utility model registration request] (1) A cascode amplification circuit comprising an amplification transistor and a cascode transistor of the same conductivity type as the amplification transistor and connected in series with the amplification transistor, wherein a bias circuit for a control electrode of the cascode transistor is connected to the amplification transistor. an impedance buffer circuit whose input is an input signal to the control electrode of the cascode transistor; and a voltage filter separate circuit whose output is connected to the control electrode of the cascode transistor and whose input is connected to the output of the impedance buffer circuit and has a level shift function. A cascode amplification circuit comprising: a cascode amplification circuit characterized in that the voltage between the pair of controlled electrodes of the amplification transistor is always maintained constant. (2) The voltage follower circuit has an emitter follower circuit.
cascode amplifier circuit described in ). (3) Utility model registration claim No. (1) characterized in that the voltage follower circuit has a source follower circuit.
Cascode amplifier circuit described in section. (4) The cascode amplifier circuit according to claim (2), wherein the emitter output of the emitter follower circuit is connected to the control electrode of the cascode transistor via a level shift diode. (5) The cascode amplifier circuit according to claim (3), wherein the source output of the source follower circuit is connected to the control electrode of the cascode transistor via a level shift diode. (6) The cascode amplifier according to claim (1) of the utility model registration, characterized in that the amplifying transistor constitutes a differential amplifier circuit consisting of a pair of bipolar transistors whose emitters are commonly connected. circuit. (7) The cascode transistor includes a pair of bipolar transistors each connected in series with the pair of bipolar transistors and having base electrodes connected in common, and the input of the voltage follower circuit is connected to the pair of bipolar transistors through the impedance buffer circuit to amplify the pair of bipolar transistors. The cascode amplifier circuit according to claim 6, wherein the output is connected to one base electrode of the transistor and to a base common connection point of the pair of cascode transistors. (8) The cascode amplification according to claim (1) of the utility model registration claim, wherein the amplification transistor constitutes a differential amplification circuit consisting of a pair of field effect transistors whose sources are commonly connected. circuit. (9) The cascode transistor is composed of a pair of field effect transistors each connected in series with the pair of field effect transistors and having gate electrodes connected in common, and the input of the voltage follower circuit is connected to the pair of field effect transistors through the impedance buffer circuit. The cascode amplification circuit according to claim 8, wherein the output of one gate electrode of the amplification transistor is connected to a common connection point of the gates of the pair of cascode transistors. (10) The impedance buffer circuit is composed of an operational amplifier whose output is fed back to the input voltage and whose input is connected to the control electrode of the amplifying transistor, and the voltage follower circuit is configured to connect the output of the operational amplifier and the cascode transistor. The cascode amplifier circuit according to claim 1, which is a utility model, and comprises a level shift circuit connected between a control electrode and a control electrode.