JPS5930470Y2 - calculator with clock - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a calculator with a clock, and particularly to a display device thereof.

A clock is usually displayed in a 12-hour period, and because it is necessary to distinguish between morning and afternoon, symbols such as the Latin abbreviations AM (am) and PM (pm) are used to indicate the clock.

On the other hand, the calculator displays the memory usage status.
It is necessary to display a symbol such as an indicator or nano flow error indicator.

However, if you want to display the contents using a display device that has both clock and calculator functions, simply adding more symbols will require many symbols to be displayed in addition to the numerical display, and the display device will become too large. It becomes larger and more complex.

Furthermore, when displaying a clock or a calculator, the symbols between the buttons are unnecessary when displaying other displays, which is inefficient.

For example, the present invention configures AM with separate display segments A and M, and when a clock displays AM, AM is displayed at the same time, but PM is not displayed), and when a calculator displays, for example, M is a memory indicator. , A are used as alarm displays to notify battery consumption, thereby preventing enlargement and saving driver terminals to provide an efficient calculator with a clock.

The present invention will be explained below according to the embodiments shown in the drawings.

FIG. 1 is a plan view showing various display examples in an embodiment of the present invention, and FIG. 2 is a block diagram of main parts.

In Figure 1, a, b, and c are display examples when using a computer. a displays M after the number section X to indicate that the memory is in use, and b displays A and indicates that the battery is running low. C indicates that the battery is exhausted, and both A and M are displayed to indicate that the memory is being used and the battery is exhausted.

FIG. 1d shows an example of a clock display, in which the numeral section X indicates the time (12:34 in the figure), and the AM display indicates that it is morning.

A and M in FIG. 2 are display segments corresponding to A and M in FIG. 1, respectively.

MS is a mode switch, and the mode switch MS switches to computer mode C or watch mode T.

CG is an oscillator, DV is a frequency divider, and CO is a time counter, and a morning/afternoon discrimination signal is output from the time counter C00COA section.

Here, it is assumed that when the morning/afternoon discrimination signal has a logical value of 1, it is morning, and when the logical value is 0, it is afternoon.

MR is a memory register in the computer circuit, and JM is a judgment circuit that detects whether or not this memory register MR has contents.

B is a battery that supplies power to the clock circuit and computer circuit, J
is a voltage detection circuit that detects when the battery power supply voltage has decreased to a set value.

Dl and D2 are driver circuits for each display segment) A and M, mode switch MS, and time counter C00C.
OA section, judgment circuit JM, voltage detection circuit section - 0
1 to G6 are provided.

When mode switch MS is set to computer mode C, gate G2. G4 turns on.

In this computer mode C, memory register MR
If any non-zero content is stored in memory, the judge JM
detects this and becomes a logical value 1, and the gate G4. The driver circuit D2 of the display segment (M) is driven via G6.

In addition, when the voltage detection circuit J detects that the battery power supply voltage has decreased below the set value and becomes a logical value 1, the gate G
2 + G drives the driver circuit D1 of display segment A via 5.

In this manner, in computer mode C, if the memory is in use, M is displayed as shown in FIG. 1A, and if the battery power supply voltage decreases, A is displayed as shown in FIG.

In addition, when memory usage and battery power supply voltage drop occur simultaneously, driver circuits D1 and D2 are driven together, and both A and M are displayed as shown in FIG. 1C.

When mode switch MS is set to clock mode TK, gate G
1 w G 3 turns on.

Here, if the morning/afternoon discrimination signal output from the time counter C00COA section has a logic value of 1, the gate G
1.

The driver circuits D1+D2 are simultaneously driven through G5, G3, and G6, and AAM is displayed as shown in FIG. 1d to inform that it is morning.

If the morning/afternoon discrimination signal has a logical value of 0, driver circuits D I and D 2 are not driven, and there is no display, so it is known that it is afternoon.

Although the embodiment described above uses only display segments A and M, it is of course applicable to a display segment A and P arranged using a common display segment M as shown in FIG.

FIG. 4 shows a block diagram of the drive section.

In computer mode C, gate G2. C8 and G4 are on,
The driver circuits DI and D2 are the same as in the previous embodiment.
Inputting the outputs of the voltage detection circuit J and the judgment circuit JM via gates G2, G5 or gates G4 and G6,
Display segment A indicates battery consumption, and display segment MK indicates that memory is in use.

The driver circuit D3 of the display segment P has a gate G8.
．． Input error signal E via G9 and switch to computer mode C.
When the button is pressed and there is an error, the display segment P displays the error status.

In clock mode T, gate G1. C7 and G6 turn on.

In this mode, driver circuit D2 is constantly driven.

If the morning/afternoon discrimination signal from the COA section of the time counter has a logical value of 1, the gate G1 is activated.

G5 drives the driver circuit D1, and if the logic value is 0, the inverter Ins gate G7. Driver circuit D3 is driven via G9.

Therefore, if it is in the morning, AM is displayed, and if it is in the afternoon, it is displayed as PM.

Note that the consumption of the battery B is common to the watch mode T, and it is desirable to display the consumption not only in the computer mode CVc but also in the watch mode T.

For example, instead of the computer mode C signal of gate G2, I
If a blinking signal such as Hz is input and gate G5 is set as an exclusive-or gate, if a drop in battery power supply voltage is detected, it is possible to switch to both modes and display A in blinking mode.

Of course, in the clock mode T, AM is displayed in the morning, and when the battery is low, the A blinks to notify you.

As described above, in the present invention, the display segments consisting of Latin abbreviations indicating AM or PM are each driven by separate driver means, and this driving is performed by a clock circuit or a computer through a gate means. Circuits, power supply circuits, etc. can be selected arbitrarily based on the control signals of the equipment, so not only can AM or PM be displayed when the clock is displayed, but also various symbols and information such as the power supply circuit when the calculator is displayed can also be displayed using this display segment. The display device is small and simple, and especially in computer mode, the status of C is simply selected and displayed from display body A, P, or M, so the display driver circuit in clock mode is easy to use. It can be used to display the battery, error, and memory status of a computer without increasing the size of the display device, and it can be submitted at a very low cost.

[Brief Description of the Drawings] Fig. 1 is a plan view showing a display example in one embodiment of the present invention, Fig. 2 is a block diagram of the same main part, and Fig. 3 is a main part showing another embodiment of the present invention. The arrangement diagram and FIG. 4 are block diagrams of essential parts showing the driving section of FIG. 3. MS...Mode switch, CO...Time counter, MR...Memory register, J
M...Judgment circuit, B...Battery, J...
...Voltage detection circuit, 01-G9...Gate, D1-D3...Driver circuit, A, M, P
...Display segment.

Claims (1)

[Scope of utility model registration request] In a calculator with a clock, which has display bodies A, P, and M, and can display morning (AM) and afternoon (PM) by selecting each of the display bodies when in the clock display mode, the three display bodies A, P
, a display driving circuit provided independently for M, and displays associated in advance in response to output signals such as a computer mode signal, a battery status determination output, an error detection output, and a memory status determination output. 1. A calculator with a clock, comprising: a gate circuit for selectively operating one of the display drive circuits to drive and display the body.