JPS5926708Y2 - Cross color erase circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a cross-color erasing circuit for erasing cross-color and color noise occurring within a black and white small screen in a so-called picture-in-picture television receiver.

In conventional picture-in-picture television receivers using color cathode ray tubes, when the small screen is a black and white image, when color broadcasting is visualized on the large screen, cross color or noise may occur on the small screen. This may occur, resulting in a loss of image quality.

A possible reason for the occurrence of cross color and color noise is that noise is superimposed on the small screen signal and is applied to the demodulator.

SUMMARY OF THE INVENTION An object of the present invention is to provide an erasing circuit that avoids the above-mentioned cross color and color noise, etc., in order to obtain good image quality in a picture-in-picture television receiver.

The gist of the present invention is that in a picture-in-picture television receiver using a color cathode ray tube, the color difference signals EREY and EGEY are generated at the moment the scanning beam transitions from the large screen area to the small screen area.

The application of ER-EY to the color cathode ray tube was cut off, and in place of the color difference signal in the video signal, the same or separate DC voltages were supplied from separate DC voltage sources, and the scanning beam reached the large screen area again. At this point, a cross color erasing circuit applies a color difference signal based on a video signal instead of this DC voltage.

Hereinafter, the present invention will be described based on embodiments with reference to the drawings.

FIG. 1 is a block diagram showing the main parts of the video circuit of a picture-in-picture color television receiver to which the present invention is preferably applied.

In this receiver, the antenna 3 first receives the TV reception signal, and the signal is sent to the large screen and small screen signals via the distributor 4 to prevent mutual interference between the large screen signal and the small screen signal. Input to image receiving circuits 1 and 2.

The large screen image receiving circuit 1 includes a large screen tuner 11°, an intermediate frequency amplification and detection circuit 12, a synchronization separation circuit 13, a video amplification circuit 14, and a cathode ray tube 15.

On the other hand, the output of the distributor 4 is also applied to the small screen image receiving circuit 2.

In this circuit 2, a video signal for a small screen is obtained via a small image tuner 21 and an intermediate frequency amplification/detection circuit 22, which is input to a memory device 24, and further inputted to an analog switch 26 and a video amplification circuit 22. The image is projected onto a cathode ray tube 15 via a circuit 14.

The small screen video signal is also applied to a synchronization separation circuit 27, which detects and separates vertical and horizontal synchronization signals included in the small screen signal and applies them to a memory control circuit 28.

This memory control circuit 28 includes the large screen image receiving circuit 1.
The vertical and horizontal synchronization signals contained in the large screen video signal separated by the synchronization separation circuit 13 provided in the video signal are added.

Based on these four types of synchronization signals, the memory device 24
, outputs a write command, a read command, and a command signal to the analog switch 26, and 5 is a tuning circuit.

FIG. 2 is a schematic diagram showing an embodiment of a cross color erasing circuit according to the present invention.

In the figure, the matrix circuit 32 includes color difference signals EREY, EB, which are the outputs of the color demodulator 31 shown in FIG.
EY and Ec Ey are added.

The color difference signal that is the output of the Madnox circuit 32 is sent to the first analog switch group 40 . analog switch 41, 4
It is added to the input end of 2°43.

Reference numeral 15 denotes a cathode ray tube, the cathode of which is supplied with a luminance signal, and the output terminals of analog switches 41, 42, and 43 are connected to the R grid, G grid, and B grid, respectively.

Each analog switch 41, 42, 43, which is normally conductive and supplies each color difference signal to each grid, is connected to the memory control circuit 2.
Cut-off occurs at the moment when the gate signal indicating that the scanning beam is in the small screen area is output from 8, that is, at the moment when the scanning beam transitions from the large screen area to the small screen area. When the scanning beam is in the small screen area, the supply of color difference signals to each grid is cut off.

The analog switches 41, 42 and 43 return to the conductive state when the scanning beam moves from the small screen area to the large screen area.

Note that the voltage level of the gate signal is converted through the inverter 71 and applied to the analog switch 40 as a first control signal.

The second analog switch group 50 includes the analog switch 5
1, 52, and 53, and the gate signal is inputted as a second control signal via two inverters 72, 73.

A common DC voltage source 6 is connected to the input end of each analog switch.
0 to the color difference signals ER-Ey, Ec Ey and E
The same DC voltage corresponding to the zero level of sEy is applied, and each output terminal is connected to the R grid, G grid, and B grid, respectively.

Then, the gate signal from the memory control circuit 20 is low (l
ow) That is, at the point when the scanning beam transitions from the large screen area to the small screen area, each analog switch 51, 52.5
3 becomes conductive and the scanning beam is cut off at the transition from the small screen area to the large screen area.

When the first analog switch group 40 is in the cut-off state and the second analog switch group 50 is in the conductive state, the same voltage is supplied to each grid, and E R = E
c=EB In other words, the amplitude of the color difference signal becomes zero, and the image in the small screen area always becomes achromatic.

Therefore, it is possible to prevent cross colors and color noise from occurring on a small screen, as in conventional devices.

Note that instead of the variable resistor 61 provided in the DC voltage source 60, three variable resistors connected to each of the analog switches 51 to 53 are provided to independently set the DC level of each electron gun. , may be provided so that the white balance of the image on the small screen can be finely adjusted.

Note that for the technical configuration in which the memory control circuit 28 determines the point at which the scanning beam shifts from the large screen area to the small screen area or the point at which it enters the reverse transition, any conventionally known technology can be used as appropriate, and the explanation thereof will be given below. Omitted.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram showing a part of a picture-in-picture receiver to which the present invention is applied. FIG. 2 is a schematic circuit diagram showing an embodiment of the present invention. 28... Control circuit, 40... First analog switch group, 50... Second analog switch group, 60... DC voltage source.

Claims (1)

[Claim for Utility Model Registration] In a television receiver that displays color images by supplying a luminance signal to the cathode of a cathode ray tube and a color difference signal to a grid, A control circuit that inputs vertical and horizontal synchronization signals of the screen video signal and outputs a gate signal indicating that the scanning beam is in the small screen area; and a control circuit that inputs the color difference signal from the matrix circuit and supplies it to the grid. a first mode of switching to a second mode of cutting off the color difference signal to the grid when the scanning beam is within a small screen area in response to the applied gating signal; a set of analog switches; a DC voltage source for providing a constant DC voltage; and a DC voltage source for applying the constant DC voltage to the grid only when the scanning beam is within a small screen area in response to the applied gate signal. A cross color erasing circuit characterized in that it comprises a second analog switch group that provides a second analog switch group.