JPS5925818U - Receiver automatic gain control circuit - Google Patents
Receiver automatic gain control circuitInfo
- Publication number
- JPS5925818U JPS5925818U JP4272582U JP4272582U JPS5925818U JP S5925818 U JPS5925818 U JP S5925818U JP 4272582 U JP4272582 U JP 4272582U JP 4272582 U JP4272582 U JP 4272582U JP S5925818 U JPS5925818 U JP S5925818U
- Authority
- JP
- Japan
- Prior art keywords
- gain control
- automatic gain
- circuit
- control circuit
- high frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面はこの考案の一実施例を示す回路図である。
１１・・・・・・入力回路、−１２・・・・・・高周波
増幅回路、１３・・・・・・段間同調回路、１４・・・
・・・局部発振回路、１５゛・・・・・・混合回路、１
６・・・・・・ＡＧＣ電圧ライン、２０・・・・・・ミ
ュートパルス発生回路、Ｑ・−−−−−）ランジスタ。The drawing is a circuit diagram showing an embodiment of this invention. 11...Input circuit, -12...High frequency amplifier circuit, 13...Interstage tuning circuit, 14...
・・・Local oscillation circuit, 15゛・・・Mixed circuit, 1
6...AGC voltage line, 20...Mute pulse generation circuit, Q----) transistor.
Claims (1)
変するため同調電圧を伝送する線路を有する受信装置の
自動利得制御回路において、前記高周波増幅回路に接続
される自動利得制御ラインに設けられ、受信信号中の同
期信号の有無とかチャンネル切換えを検出するミュート
パルス発生回路の検出パルスにより自動利得制電圧を強
制的に制御して前記高周波増幅回路の利得を低下させる
回路手段を具備したことを特徴とする受信装置の自動利
得制御回路。In an automatic gain control circuit of a receiving device having a line for transmitting a tuning voltage to vary the capacitance of a variable capacitance diode after a high frequency amplifier circuit, the automatic gain control circuit connected to the high frequency amplifier circuit is provided with a line for transmitting a tuning voltage to vary the capacitance of a variable capacitance diode. The present invention is characterized by comprising circuit means for forcibly controlling the automatic gain control voltage to lower the gain of the high frequency amplification circuit using a detection pulse of a mute pulse generation circuit that detects the presence or absence of a synchronization signal in the high frequency amplifier circuit or channel switching. Automatic gain control circuit for receiving equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4272582U JPS5925818U (en) | 1982-03-26 | 1982-03-26 | Receiver automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4272582U JPS5925818U (en) | 1982-03-26 | 1982-03-26 | Receiver automatic gain control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5925818U true JPS5925818U (en) | 1984-02-17 |
Family
ID=30173258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4272582U Pending JPS5925818U (en) | 1982-03-26 | 1982-03-26 | Receiver automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5925818U (en) |
-
1982
- 1982-03-26 JP JP4272582U patent/JPS5925818U/en active Pending
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