JPS5925445B2 - Counter circuit for measuring train distance - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a counter circuit for measuring train travel distance in various devices such as automatic train stopping (ATS) or automatic train operation (ATO), and its purpose is to improve the reliability of this type of circuit. It is something to do.

An ATS device that issues a warning to the staff when a train approaches a dangerous area, and automatically applies the brakes to stop the train if the train continues into the dangerous area despite the warning, or for example, an ATS device that stops the train at one station. In ATO systems equipped with fixed-position stopping devices that automatically stop trains at fixed positions, the source of information for train control such as alarm generation or braking is set at a desired point on the ground, and the information from the set point is transferred to electromagnetic action. etc., to control the operation of the train by transmitting it to the train.
A so-called point control method is generally used.

The present invention is applied to such a point-controlled ATS ATO device when measuring the distance set between two required points along the train's traveling direction using an on-board speed generator. do.

FIG. 1 is a schematic diagram showing an example of the arrangement of the above-mentioned point control type equipment, in which a beacon S1 as a point information source is installed at two points separated by a required distance along the track. This figure shows a state in which a vehicle C is traveling in the direction of the arrow with S2 installed, an onboard antenna CA as an onboard antenna hanging above the track, and an onboard device CR mounted inside. It is.

Figure 2a shows an example of the so-called station change type control method that is used in conventional point control type ATS equipment, and shows the receiving circuit connected to the beacon S and the on-car body CA facing it, and the wheels CW. This is a block diagram of a speed generator TG, etc. that interlocks and generates a number of pulses proportional to the number of rotations.O20 has a constant frequency f where there is no ground coil S using the onboard coil CA as a feedback circuit.

An oscillator that oscillates, SAo has a frequency f. selection amplification circuit, MR is its output relay.

The beacon S is composed of a resonant circuit with a specific frequency, and when the onboard CA passes over the beacon S, the frequency up to that point is f.

The oscillation frequency of the oscillator O8C, which was oscillating at , changes to a frequency close to the resonant frequency of the ground element S.

Therefore, if the resonant frequencies of the ground element S1 and S2 in Fig. 1 are respectively fl t f2, then the onboard element CA is
1, the oscillation frequency of the oscillator O8C is f.

The frequency is changed from f1 to f1, and relay MR is restored to frequency f1.
The output relay 1R of the selection amplification circuit SA1 operates.

Similarly, when the onboard child CA passes over the ground child S2, the frequency f
The output relay 2R of the second selective amplification circuit SA2 operates.

The operated relay 1R or 2R maintains its operation via the recovery contact RER of the reset relay RER shown in the figure (hereinafter, the contact symbol is indicated by the symbol of the relay to which it belongs) and its own operation contact 1R or 2R, respectively.

The reset relay RER is a relay operated by a reset signal in which information from the ground elements S1 and S2 is sent back to the control system from the transmission wave control system.

The above is an example showing the outline of the point information receiving operation in the point control system. However, in order to control the speed of the train, the distance set between the beacon S1 and 82 shown in FIG.
A circuit for measuring the output pulses of the speed generator TG which is interlocked with the rotation of the motor is provided in the on-vehicle device CR.

Figure 3 shows a conventional counter circuit for counting the pulses.
In the example, the counter DC1 counts the output pulse tg of the speed generator TG inputted through the operating contact of the relay 1R under the condition that the vehicle C passes over the first ground element S1, and the counter DC1 counts the output pulse tg of the speed generator TG inputted through the operating contact of the relay 1R, Relay TGR is driven via Tr1.

Then, the counter DC0 is reset by the reset condition, that is, the operation of the relay RER, and the relay TGR1 is restored.

However, such a conventional counter circuit lacks a circuit that constantly monitors the operating state of the counter DC1, and thus lacks a failure detection function of the counter circuit itself, resulting in poor reliability.

In view of the above-mentioned points, the present invention provides an arrangement in which the onboard member CA is connected to the first ground member S1.
After passing the top, counting of the output pulses of the speed generator TG is started, and the operation is determined by the relationship between the count amplifier output of the pulse count setting value n that slightly exceeds the distance and the information reception from the second ground element S2. In addition to determining correctness or failure, when there is no need for distance measurement, a monitoring relay is operated using a frequency much higher than the output pulse number of the speed generator TG, and in addition to constantly monitoring the counter operation, the monitoring relay The circuit is operated in an alternating current manner to check for disconnections in the circuit and failures in circuit elements.

An embodiment of the present invention will be described with reference to the drawings from FIG. 4 onwards.
DC2 in Fig. 4 is a counter that generates a count-up output when the count value n is reached through the recovery contact of relay 1R shown in Fig. In the previous state, the oscillation frequency of the on-board oscillator O8C is f
.

At this time, a part of the output is pulsed and the output pulses cp are counted, divided into 1/n, and output.

A transistor Tr2, a transformer T including a capacitor, and a rectifier Rf.

The circuit consisting of relay CKR is a counter operation monitoring circuit, NOR gate N0R1 transistor T r 3, and relay T.
The circuit consisting of GR2 is a distance measurement output circuit.

FIG. 5 shows an output circuit for combination information configured as information sent to the control system in this embodiment, and FIG. 6 shows an operating condition circuit for a failure detection relay FR that detects failures in the receiver and counter circuits.

The operation of each of the above circuits will be explained below along with the time chart of FIG.

As mentioned earlier, before the onboard element CA reaches the first ground element S1, the output pulse cp is input to the counter DC2 via the recovery contact of the relay 1R.

Counter DC2 divides this frequency into 1/n, switches transistor Tr2 with the output of the divided frequency, and operates relay CKR in an alternating current manner via transformer T1 and rectifier Rf.

Moreover, the transformer T of this circuit is constructed to have a band frequency characteristic, and operates the relay CKR at a frequency obtained by dividing the pulse cp by 1/n.

Also, the output of counter DC2 is the a input of the NOR gate NOR, and at this time, the level of the a input repeats HIGH and LOW, but the b input of the same gate is at (1) because relay 1R is in the recovery state. , its gate output C is L
Since it becomes OW, the transistor Tr3 is OFF,
Relay TGR2 has been restored.

Next, when the onboard element CA reaches the first ground element S1, the relay 1R operates, and during the contact traveling, the counter DC2 is reset once, and the output pulse of the speed generator TC is Start counting tg.

Since the output of the counter DC2 is LOW until the count value reaches n, the a input of the gate NOR is LOW.
B of the same gate due to the operating contact configuration of relay 1R.
Since the input is also LOW, the output C of the same gate is HIGH.
As a result, transistor T r 3 becomes conductive and relay TGR
2 works.

Since the output pulse tg of the speed generator TG has a much lower frequency than the output pulse cp of the oscillator O8C, the relay CKR is immediately restored due to the frequency characteristics of the circuit.

If the input/output signals of the circuit and the operating states of each relay at the time when the above-mentioned onboard member CA passes over the first ground member S1 are represented in the time chart of FIG. 7, the timing T1 shown in A and B of the same figure is It is expressed as a state of change of the motion that is the starting point.

A in the same figure is a time chart when the counter DC2 receives the information from the second ground element S2 before counting up n output pulses tg of the speed generator TO, and B in the same figure is a time chart when the information is not received. .

Therefore, both AB and A in the figure are shown in the same state.

T2 in A in the same figure is at the time of receiving information from the ground transceiver S2.
In this case, both relays 1R2R are activated, the combination information output circuit shown in FIG. 5 is configured, and the combination information shown in the chart of FIG. 7A is sent to the control system.

After sending the combination information, a reset signal is sent back from the control system and the reset relay RER operates, which releases the self-holding circuits of relays IR and 2R and activates the relay IR.
, 2R is restored.

When relay 1R is restored, pulse tg to counter DC2
When the input of the relay is cut off, and during the contact traveling of the relay, the counter DC2 is once reset and now the pulse cp
Start counting.

Also, during that time, the b input of the NOR gate becomes HIGH, so the C output becomes LOW, the conduction of the transistor Tr2 is cut off, the relay TGR2 is restored, and the relay CKR is activated by counting the pulses Cp.

The failure detection relay FR shown in Fig. 6 is a relay with slow release characteristics, and after being initially energized via the push circuit of the start push button switch SW, the operating contacts of relay CKR, and the recovery contacts of relay 1R1TGR2, its own operating contacts The operating state of each relay is self-maintained via the FR, and the operating state of each relay shown in the time chart of FIG.
From the operating conditions when receiving information from 2, relay F
Since R continues to operate, it is determined that the operation of the counter circuit is normal.

In the operating state of the circuit shown in the time chart of FIG. 7B, that is, when information is not received from the second ground element S2 before the time T3 when the counter DC2 counts up n pulses tg, the a input of the NOR gate NOR becomes HIGH. , C
Since the output becomes LOW, conduction of transistor Tr3 is cut off and relay TGR2 is restored.

At this time, relay 1R is operating and relay CKR has recovered, so of the conditional circuit in Figure 6, relay CKR is operating.
The excitation circuit via the R recovery contact, the operation contact of relay 1R, and the operation contact of relay TGR2 is cut off from the relay TGR2, and □'relay FR is restored, and a circuit failure is determined.

Also, when there is no output due to a counter failure, or when there is an extremely high frequency output, the relay CKR
Restore and check counter operation.

Such circuit disconnections, element failures, etc. are checked by the failure determination circuit shown in FIG.

The operational combination requirements of relay CKRIRTGR2 for determining circuit failure are summarized in a table as shown in FIG.

In the figure, the upward direction of the arrow indicates relay operation, the downward direction indicates recovery, ○ indicates normality, and X indicates failure.

As described above, the present invention provides a counter monitoring circuit, and constantly operates a check relay in an alternating current manner using the counter output obtained by dividing a specific frequency by 1/n, thereby monitoring the counter operation and also controlling the check relay drive circuit. If there is no output or abnormal frequency output due to a counter failure, the check relay will be restored and the failure will be detected.Furthermore, when counting the output pulses of the speed generator, a specific In order to immediately switch from the state of counting frequency pulses to perform counting operation,
This has the effect of significantly improving reliability compared to conventional counter circuits of this type.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram showing an example of a point-controlled device arrangement;
Figure a is a block diagram showing an example of the main part of a variable frequency information transmission circuit, the figure is a reset signal relay circuit diagram, Figure 3 is an example of a conventional counter circuit, and Figure 4 is a train running according to the present invention. FIG. 5 is a block diagram showing an embodiment of a counter circuit for distance measurement; FIG. 5 is an example of a combination information output circuit; FIG. 6 is a circuit diagram for monitoring the operation of the counter circuit; FIG. Figure 8 is a chart showing combinations of failure determination requirements. S, Sl, S2... Ground element, CA...
On-board device, O8C...On-board oscillation circuit, IR, 2R
...Output relay, TG...Pulse generator (speed generator) DC2...Counter, T...
...Transformer with frequency characteristics, CKR...
・Check relay, TGR2... Distance measurement output relay.

Claims (1)

[Claims] 1. A point-controlled train distance measurement counter that measures the distance between two points set in the direction of train travel by counting the output pulses of a pulse generator that generates a number of pulses proportional to the number of wheel rotations. The circuit has a function of dividing the constant oscillation frequency of the point control and monitoring the counter operation by a relay drive circuit having a passband of the divided frequency, and outputting the frequency dividing operation as described above on the condition that point detection information is received. A counter circuit for measuring train travel distance, characterized by having a function of switching to pulse counting operation.