JPS592533A - Harmonic wave suppressing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a harmonic suppression device used in a power system.

A conventional harmonic suppression device is constructed as shown in FIG. In Fig. 1, 10 is an electric power system, and this system 1
A load 11 is connected to the terminal 0. 12 is a harmonic suppression device, and this device 12 includes a controlled rectifying element 13 such as a thyristor.
A bridge circuit 13 consisting of a to 13d, and a DC reactor 14 connected to the DC output end of this bridge circuit 13.
, a carrier wave ripple removal filter 15 connected to the AC input side of the bridge circuit 13, and the bridge circuit 1.
Thyristors 13 a to 13 (consisting of a control circuit 16 that fires the
detects the harmonic component of the current in the power grid 1o, controls the detection output from the control circuit 16, and supplies a compensation current to the grid 10 by controlling the thyristors 13a to 13 (1) of the bridge circuit 13 using PWM control. This is to suppress harmonic currents in the system. However, the device shown in FIG. 1 has the following drawbacks.

(1) In the case of capacitive loads, it is difficult to ensure stability as a suppressor. (When the load is light, it is normally a capacitive load.

) (2) If the power supply side (system) forms a resonant circuit, harmonic current cannot be suppressed. In addition, the harmonic components of the compensation current and load current also increase, and the distortion of the protrusion voltage increases on the contrary.

An object of the present invention is to provide a harmonic suppression device that can reliably suppress harmonics, since the above-mentioned drawbacks can be eliminated and the suppression device can be stabilized.

First, to explain the principle of this invention, this principle is disclosed in the patent published by the inventor of this applicant (%
-49629) has been filed.

A summary of this published patent is explained below.

Although FIG. 4 is the same circuit diagram as the harmonic suppression device shown in FIG. 1, the switching method by the control circuit 16 is different as follows. In Fig. 4, if the input alternating current is iag, the function f (t) is a weighting function, and the direct current 1ds is constant, then the alternating current ia6 is i a5 = * f (t) ・ d5
...It can be expressed as (1). It is also assumed that ids is commutated in the direction of the arrow in FIG. 5 at time n·ΔT and in the opposite direction at time (n+λ)ΔT. The average value of the AC side current from n・ΔT to (n+1)ΔT can be expressed as t=n・ΔT, so from equation (1), f
(n-ΔT) (1+=(2λ(n-ΔT)-1) d
5, by transforming this equation, f(n-ΔT)=2λ(n-ΔT)-1-...-(
There is a relationship as shown in 3).

Returning to equation (1), consider infinite switching.

(ΔT −+ Q ) and i a(t) = f (tl
The following equation is obtained by Laplace transform to 1@.

Engineering a(sl = y (s+ r, a,
・= (4) I a(s) , F (s1
Equal capital letters represent currents and weighting functions in the frequency domain. For the sake of simplicity, a description will now be given of how to obtain the timing λ(1) for converting the circuit shown in FIG. 4 into an equivalent circuit with only the attenuation Y shown in FIG. 6.

If the set admittance t-Ya(s) is given, then the force a(
s) = Y a(s) −Va(F3)
−・−・−(5), so this equation (5) can be written as (
4) Substituting into the equation, the switch etching frequency k F (8) = 1a, Y a (θ
)・Va(θ), F (Japanese) Labor d.

``'');-Ti is the same. 9 A predetermined Ya(sl is realized. Since Vo(t) is given by a time function, Ya(θ
) / d11 can be calculated as described below. (f(t) is F(
8) Time domain expression) That is, the control circuit performs the above calculation, determines f (tl, and calculates λ(t) from equation (3) above.
'e is calculated, and if the thyristors 13a to 13d i of the bridge circuit are switched using this λ(1), the equivalent (b) path shown in FIG. 6 is obtained.

Furthermore, a voltage source Vg is connected in series with the admittance Yg,
The switching frequency to obtain the equivalent circuit shown in Fig. 7 in which a current source 1g is connected in parallel with it is as follows:
l ) +Ig[s) Therefore, the following equation can be obtained from equation (4). (However, vg(E3) and Igfsl are expressions in the frequency domain of the voltage source and current source.) All the values on the right side of this equation (8) are known, and after Laplace transform, the switching frequency f (tl can also be found. Note that Va(s) is the time function Va(
t), and the transfer function Ya(s) is composed of an operational amplifier or the like. When Va(tl is input to the input of the arithmetic circuit formed as described above, the output is Ya(θ)・Va(
A time function representation of θ) will appear. Therefore, v
g(sl, g(8), etc. are also given as time functions, and V a(t
) + V g(tlf Y a(s) is supplied to the input of the arithmetic circuit, and its output is ig(t)f: In addition, ds
If you divide by, you will get f(t).

In this calculation method, it is possible to handle not only a continuous pillow thread but also a sample value thread using a pulse transfer function. Therefore, by switching the thyristors 13a to 13d at the switching frequency λ(tltl+f("), the equivalent circuit shown in FIG. Depending on the selection, harmonics can be completely suppressed. For example, by connecting in parallel to the admittance k Ifl m source, the suppression becomes possible.

Next, an embodiment of the present invention using the above-described sound principle will be described.

In FIG. 2, the same parts as in FIG. 1 are denoted by the same reference numerals, and the harmonic suppressor 12 detects and inputs a current 1 and a voltage v=jc- from the power system 10. This current 1 and voltage V are input to the control circuit 16. The control circuit 16 is configured as shown in FIG.

In FIG. 3, the detected current 111j is input to the first proportionality constant circuit 21, which is an equal current control circuit that flows a current proportional to the harmonic component. Furthermore, the detected voltage V is connected to a second parallel admittance circuit that flows a current proportional to the harmonic component.
Input to proportional constant circuit B.

1st. Output ig of second proportional constant (b) paths 21 and 22
, iy are input to the matching circuit, and its bias output 1
z is input to the division circuit 24 together with the detected value d of the DC output voltage of the bridge circuit 13 shown in FIG.

The division circuit calculates the deviation output 1z and the detected value Id (
After performing iz÷It1), the signal is supplied to the first comparator circuit via the arithmetic circuit 5. The output of the sawtooth wave generator 27 is applied to the second input of the comparator circuit 26 . 4 is an oscillator, and the output of this oscillator path is a sawtooth wave generator 27.
It is also supplied to the first thyristor ignition circuit 29. The comparison output of the comparison circuit is supplied to a second thyristor firing circuit. Said 1st. The firing output (PWM output) of the second thyristor firing circuit 29° (9) is supplied to the gates of the thyristors 13a to 13(L).

As mentioned above, the first. Since the thyristors 13a to 13 (1i PWM control) is performed by obtaining a current proportional to the harmonic component by the second proportional constant circuits 21 and 22, harmonics can be suppressed reliably.Especially When the power supply side forms a resonant circuit, the resonance condition can be removed by an amount proportional to the current compensation gain, allowing stable operation.When the power supply side does not form a resonant circuit, the admittance term is zero. Good.Also, when the load 11 of the system 10 is capacitive, it becomes difficult to stabilize the control system, but in this case, due to the number of parallel admittances,
If the sum of the load admittance and the equivalent parallel admittance of the suppressor 12 is made to have conductivity, stabilization becomes easier.

In addition, in the embodiment of the present invention, in addition to detecting the current and suppressing the harmonic distribution, an equivalent parallel admittance is added to achieve multi-stabilization, so the harmonic generation sources to be suppressed are limited. This characteristic has not been lost.

As described above, according to the present invention, even when the power supply side is entirely configured with a resonant circuit, it operates stably, and the harmonic component included in the load current is suppressed from flowing to the power supply side. Furthermore, even if the load side becomes capacitive due to a light load, it becomes easy to stabilize due to the equivalent parallel admittance. Furthermore, the harmonic generation sources to be suppressed can be limited.

[Brief explanation of the drawing]

FIG. 1 is a schematic structural explanatory diagram showing a conventional harmonic suppression device, and FIG. 2 is a schematic diagram showing an embodiment of the present invention. 13... Bridge circuit, 21.22... 1st. fg
2 proportional constant circuit, Ru...matching circuit, Sae...divider circuit, δ...performance circuit, ka...comparison circuit, υ...
Sawtooth wave generator, public... oscillator, 29, 30... 1st. Second thyristor firing circuit. Figure 4 Figure 5 (n-2) ΔT (n-1) 8T nΔT
(n+1)ΔT (n+2)at (n
+3) Figure 6

Claims (1)

[Claims] (1) When driving a υ load with a load current supplied from a power supply system, a harmonic component included in the load current is detected, and a compensation current that cancels out this harmonic component is controlled by a rectifier. A harmonic suppression device supplied from a current source conversion circuit using The harmonic voltage is supplied to a second proportional foot circuit that outputs a current proportional to the harmonic voltage, and the outputs of both circuits are matched, and the deviation output and the current source conversion circuit are DC current is input to an arithmetic circuit, and the output of this arithmetic circuit converts the current source conversion circuit into PWM mode.
A harmonic suppression device characterized in that a controlled compensation current is supplied to a power supply system.