JPS592330A - Pattern matching method and device therefor - Google Patents

Abstract

PURPOSE:To perform the accurate positioning of comparison patterns by enhancing the matching degree by a method wherein a non-sensitive region is prepared on a master pattern, and the non-sensitive region is excluded from comparison in the comparison with the comparison pattern. CONSTITUTION:The image pattern of master samples 3 image-picked by a camera 1 has the region regarded as the master pattern therein cut out and then memorized in a master pattern memory 9. The second time image pattern is image-picked up, the instable region between the pattern memorized in the memory 9 is discriminated by a non-sensitive region preparing circuit 10, and thus different pattern parts are registered into the memory 9 as the provisional non- sensitive region. The master patterns are prepared by registering provisional non-sensitive regions as sensitive regions into the memory 9 in the repetition of such a treatment by required times. The instable region of the comparison pattern obtained from samples brought within the field of vision of the TV camera 1 by a sample feed mechanism 2 is memorized previously in the memory 9 as the non-sensitive region, and excluded from comparison of the master pattern with the comparison pattern in a pattern matching circuit 11.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a pattern matching method and apparatus for improving the creation of mask patterns.

(2) Amount of technology The mask pattern used in the conventional pattern matching technique is created without performing any processing on the image pattern data obtained from the master sample. A method is adopted in which the pattern is stored in a master pattern memory. In this method, if unstable pattern parts are not mixed into the master pattern obtained as described above, there is no problem with VC, but in reality, unstable pattern parts are mixed in. Therefore, there is a drawback that a sufficient degree of matching cannot be obtained during pattern matching, and accurate positioning of a comparison sample cannot be performed.Therefore, there is a need for an improvement method.

(3) Prior Art and Problems An automatic wire bonder that bonds wires to pads of a semiconductor chip is an apparatus that requires pattern matching. Before bonding the wire, it is necessary to recognize the pad position of the semiconductor chip, and for this purpose, pattern matching processing must be performed.
The pattern matching technique of the mask pattern memory used therein is such that the image pattern obtained from the tL master sample is directly obtained as a master pattern. Therefore, this master pattern is mixed with uneasy pattern parts due to the fineness difference of the binarization. Therefore, if pattern matching is performed using this mask pattern with a comparison pattern obtained from a sample, there is a high possibility that a pattern portion different from the mask pattern in the comparison pattern will appear, so the degree of matching should not be increased. This makes it impossible to accurately position the pads of the semiconductor chip that is the sample.

(4) 1. Purpose of the Invention The present invention has been devised in view of the problems of the prior art as described above, and its purpose is to provide a pattern matching method and method for accurately positioning comparison patterns by increasing the degree of matching. The goal is to provide equipment.

(5) 0 Structure of the Invention And, these objects are to obtain a mask pattern from a master sample by inputting all patterns from the master sample repeatedly a predetermined number of times, creating a dead area from those patterns, and generating a mask pattern. This is achieved by obtaining a master pattern and comparing this master pattern with a comparison pattern obtained from a sample.

(6) Second Embodiment of the Invention The present invention will now be described in detail with reference to the accompanying drawings.

FIG. 1 shows an embodiment of the invention. This example shows the case where it is implemented in a fully automatic wire bonder. Reference numeral 1 denotes a TV right camera, and this camera images the surface pattern of a sample placed on the sample feeding mechanism 2, for example, a semiconductor chip 30.

The entire image pattern from the camera 1 is connected to a binarization circuit 4. Binarization circuit 4 #'i binarizes the image pattern signal at the binarization slice level. The binarization slice level is preferably configured to be changed in an appropriate small step width as described later.

5 is a recognition unit connected to the output of the binarization circuit 4;
The output of is connected to the control section 6. The control section 6 is connected to the bonding mechanism 7 and controls it.

The recognition unit 5 includes a pattern memory (frame memory) 8 to be recognized.
, a mask pattern memory 9, a dead area creation circuit 10 connected to both of these memories, and a pattern matching circuit 11 connected to the memory 8.9.

Next, the operation of the apparatus implementing the present invention with the above configuration will be explained.

First, a mask pattern is created prior to performing a pattern matching circuit between the mask pattern and the pattern to be recognized (comparison pattern).

Sample feed mechanism 2 A sample (master sample) 3 placed on the soil and placed within the field of view of the TV right camera is moved to camera 1.
Images are taken a predetermined number of times.

The first image pattern captured by the camera 1 is binarized by the binarization circuit 4 and stored in the frame memory 8 which is synchronized with the camera 1, and the area considered to be the master pattern is cut out. and stored in the mask pattern memory 9.

Subsequently, the second image pattern of the master sample is stored in the frame memory 8 in the same way, and the same area as the first cut out area in the frame memory 8 is stored in the master pattern memory 9. An unstable region due to quantization between the master pattern and the master pattern is discriminated by a dead region creation circuit 10, and the unstable pattern portion, that is, a different pattern portion is stored in the mask pattern memory 9 as a temporary dead region. register.

Such processing is repeated for a required number of times for the master sample, and the master pattern stored in the mask pattern memory 9 is used as a comparison pattern obtained from the sample brought into the field of view of the TV camera 1 by the sample feeder 4112. At the same time, a temporary dead area that has been created and updated by the dead area creation circuit 10 after the required number of times is registered in the master pattern memory 9 as a dead area, and the creation of the mask pattern is completed. The master pattern is 1, for example (2-1 in Figure 2).
).

After that, the comparison pattern obtained from the sample brought into the field of view of the TV right camera by the sample feeding mechanism 2 is shown as a second comparison pattern.
Even if the area is as shown in (2-2) in the figure, the unstable area is stored in advance in the mask pattern memory 9 as an insensitive area, and the pattern matching circuit 11 compares the mask pattern with the comparison pattern. Since they are excluded from the comparisons, their comparisons can be performed under a high degree of matching. Therefore, the bonding mechanism 7 under the control of the control section 6 which receives the output signal can accurately position the pads of the semiconductor chip 3 as a sample.

Incidentally, conventional pattern matching is illustrated in Figure 3, and as can be seen from this figure, regardless of the presence or absence of unstable pattern parts in the mask pattern, this is not taken into consideration at all. Therefore, the comparison with the comparison pattern had to be carried out without achieving a high degree of matching. In addition, in FIG. 2 and FIG. 3, the P pad, L beam, and - pad are shown.

In the above embodiment, a case has been explained in which the binarization slice level of the binarization circuit 4 is fixed, but if the binarization slice level is changed in small steps, unstable pattern parts can be fixed more reliably. It becomes possible to exclude the mask pattern from the comparison between the mask pattern and the comparison pattern by making it a dead area, and it is possible to perform pattern matching at a higher degree of matching.

(7) 0 Effects of the Invention In short, according to the present invention, a dead area is created in the master pattern, and the dead area is excluded from the comparison between comparison patterns and 8-.
A high degree of matching can be achieved. Therefore, when the present invention is applied to an automatic wire bonder, effects such as accurate pad positioning can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are diagrams showing mask patterns of the present invention, conventional mask patterns, and comparative patterns, respectively. In the figure, 1 is a TV right camera 3it sample, 4 is a binarization circuit, 8 is a recognized pattern memory, 9 is a master sample IJ, 10 is an i/i dead area creation circuit, and 11 is a pattern matching circuit. Patent Applicant: Fujitsu Ltd. Figure 2 Roy distribution area Figure 3 Master tough 1'' turn specific gravity pattern 27 Soching and regai moss! Vertical

Claims (1)

[Claims] 111 In a pattern matching method in which a mask pattern is prepared in advance and a pattern to be recognized is compared with the pattern to be recognized to determine the presence or absence of matching between the two, when the master pattern is generated, the master pattern is image and
In order to generate the process of binarizing the image signal at a preset slice level and storing it in the mask pattern memory, the storage process is performed multiple times, and each time, the previously stored , while storing a pattern portion where there is a difference between the master pattern and the next input master pattern as a dead area, when comparing this master pattern with a recognized pattern, exclude the dead area from the comparison. A pattern matching method characterized by: (2) An imaging system, a binarization circuit that binarizes the image signal from there at a preset slice level, a recognized pattern memory connected to the binarization circuit, and the recognized pattern memory A pattern matching device comprising: a mask pattern memory connected to a mask pattern memory; a dead area creation circuit connected to both of the memories; and a pattern matching circuit connected to both of the memories. (3) The pattern matching device according to claim 2, wherein the slice level is variably set from 1 to 1.