JPS5922415A - Automatic gain control circuit - Google Patents

Abstract

PURPOSE:To apply stably a strong automatic gain control having a good S/N, by starting sequentially the automatic gain control from an intermediate frequency amplifier section of the post-stage attended with the increase in an input level. CONSTITUTION:When an automatic gain control voltage is given, the intermediate frequency amplifier section 18 starts the automatic gain control at a region where the automatic gain control voltage is low at first. Then, the 2nd high frequency amplifier section 12 starts the control and a high frequency amplifier section 10 starts the control finally. Since the amplifier stages 12, 18 suppress the gain to an intermediate value with the automatic gain control at the intermediate input level region and the amplifier stage 18 only suppresses the gain to a small value with the automatic gain control at the further lower input level, the output voltage of the automatic gain control amplifier becomes stepwise.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to automatic gain control (AGC) circuits for radio receivers.

AM radio receivers usually apply AGC to reduce output level fluctuations. 5th when applying AGC
As shown by the curve C1 in the figure, the relationship between the person and the output level shows a saturation curve, and above a certain level, the output level does not change much even if the input level changes. To make this output level fluctuation extremely small as shown by the line C2, specifically, 8'Od B
There is also a method for suppressing output fluctuations to about 0.5 dB with respect to input fluctuations, and this is called hard AGC. In AM stereo, the L (left channel) + R (right channel) signal is sent as AM, and the L-R signal is sent as FM or PM, but as is known, FM etc. are not affected by amplitude, so The L+R signal needs to be subjected to strong AGC so as not to be affected by amplitude changes to the extent that the FM L-R signal is, and hard AGC is suitable for such applications.

Hard AGC can be obtained by increasing the gain of the negative feedback system, but as the gain increases, the operation becomes unstable. The present invention is intended to make it possible to stably apply hard AGC, and to output a signal indicating the signal level (S level) to facilitate S level display and stereo/monaural switching.

The present invention relates to a high frequency amplification section, an intermediate frequency amplification section, and an AGC
In the automatic gain control circuit of the tuner of a radio receiver equipped with an amplifier, an AGC voltage shift circuit is provided that provides a step difference in the output of the high gain A'GC amplifier, and the AGC voltage that differs in level Ω from the shift circuit is transferred to the high frequency amplifier section and the intermediate frequency. The invention is characterized in that the automatic gain control is started sequentially from the intermediate frequency amplification section in the subsequent stage as the human power level increases. This will be explained in detail.

Figure 1 is a block diagram of the AM radio receiver tuner section.
10.12 is the first and second stage high frequency amplification sections, 14 is a mixing section, 16 is a local oscillator, 18 is an intermediate frequency stage, 20 is a detection section, and 22 is an AGC amplifier, which detects the received signal level from the detection section. It outputs a gain control signal Va by obtaining a signal Vd shown in FIG.
send to

T1 is a tuner input terminal that receives an antenna output, and T2 is an output terminal. In the conventional system, each stage receives this signal ``a'' and performs AGC simultaneously, although the degree of gain control differs. In contrast, in the present invention, each stage starts AGC differently. Figure 2 shows the outline.

The same parts in Figure 2 as in Figure 1 are given the same symbols.
As is clear from comparing both figures, in the present invention, the output V'a of the AGC amplifier 22 is directly sent to the AGC voltage voltage 2 1 frequency amplifier 10, and ΔV is added to Va to the second stage high frequency amplifier 12. Then, ΔV and ΔV' are added to Va and outputted to the intermediate frequency amplification section 18.

Figure 3 shows the specific circuit.

In Figure 3, Q1 to Q, 4 are transistors, R1 to R1o are resistors, 01 to C3 are capacitors, 26.30 is a constant current source, 28, 32.34 are diodes, 36 is an intermediate frequency transformer, and 3rd is a high frequency A transformer (tuned circuit) 40 is a variable capacitance diode whose capacitance is changed by a bias voltage TB. The dashed lines indicate the boundaries of the integrated circuit. 1st as shown
, the second high frequency amplification stage 10.12 and the intermediate frequency amplification section 18 have a common emitter of a transistor Q+2 1,Q
9 1 In a differential amplifier configuration consisting of a pair of transistors Q, 3 and Q, 4, Qlo and Q, and IQ7 and Q8 connected to Q6, these transistors are Q, 2 and Q9 and Q s.

A bias voltage is supplied to Q, Ql, and Qe.

Input voltage is transistor Q+21 Q 9 1 Q 6
is received by the transistor Q13 + Q10 + Q7
is the AGC voltage Va.

Va + ΔV, Va + ΔV + Δ■' are AGC voltage voltage 2 yen 1 power transistor Q + , transistors Q2 and Q3 forming a current mirror circuit, and load resistor R3, and the signal Vd from the detection section 20 is applied to the time constant circuit R1, R2 and 01
is received by the input transistor Q1 via the input transistor Q1 to generate a voltage Va. AGC voltage voltage 2 circles 1 node 32.3.2, consists of Darlington connected transistors Q4 and Q5, voltage Va from the emitter of transistor Q5 (more specifically, the voltage between the base and emitter of Qa and Qi is subtracted from Va. voltage Va+ from the anode of the diode 34
8V from the anode of diode 32 ■a+ΔV
+ΔV' is output. With this, the base of the transistor
If both the emitter voltage and the diode forward voltage drop are expressed in VF, then the AGC voltage applied to the amplifier stages 18, 12.10 is Va.

Va v,, Va 2Vp.

When the AGC voltage is applied in this way, it is the intermediate frequency amplification section 18 that starts AGC at the beginning (in the region where the AGC voltage is low).
Next, the second high frequency amplification section 12, and lastly the high frequency amplification section 10. Roughly speaking, in this example, since the bias voltage applied to the reference side transistors Q14+Ql and rQe of each amplification stage is 5 vF, the voltage Va of the resistor R3 is
When becomes more than ν2, the anode potential of the diode 32 becomes 5
Va becomes more than 2VF, 3VF and AGC starts in the amplification stage 18, and Va becomes more than 2VF, 3VF in the amplification stage 12.10
Start GC. Considering the antenna input level, as shown in Figure 4, in the A3 region where the input level is high, the amplifier stage 1
0,12゜18 AGC is performed to strengthen (suppress) the gain,
Lower the detection output as shown in the figure Vd. In the intermediate input level region A2, the amplifier stage 12.18 performs AGC to suppress the gain to a medium level, and in the even lower input level region A1, only the amplifier stage 18 performs AGC to suppress the gain slightly, and eventually the detection The output becomes almost constant as shown in the figure Vd. The output voltage of the AGC amplifier is stepwise as shown in the figure (this is caused by whether the amplification stages 10, 12, and 18 perform AGC operation or not, and Vd also fluctuates with Va in detail, but the fluctuation is caused by the AGC amplifier. (1 out of 22), and this gain is high), so this can be used as a reception level signal and used to display weak electric fields, medium electric fields, strong electric fields, etc. Furthermore, since AGC starts to be applied from the latter stage, the S/N ratio can be maintained better than when it starts from the upper stage.

In the embodiment, the AGC voltage is Va, Va+ΔV.

A difference was made between Va+Δ■+ΔV', which is the difference between the other transistor Q, 4. A similar effect can be obtained even if the bias voltages of QB and Qe are different.

As explained above, according to the present invention, strong AGC can be applied stably and with a good S/N ratio, and since the AGC voltage is a voltage that changes stepwise according to the electric field strength, it can be used as an input level signal. This gives you the advantage of being able to.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of the radio tuner, Figure 2 is a block diagram showing the configuration of the radio tuner.
3 is a block diagram showing an embodiment of the present invention, FIG. 3 is a circuit diagram showing details of FIG. 2, and FIGS. 4 and 5 are graphs for explaining the operation. In the drawing, 10.12 is a high frequency amplification section, 18 is an intermediate frequency amplification section, 22 is an AGC amplifier, and 24 is an AGC voltage shift circuit. Applicant: Minoru Aoyagi, Patent Attorney, Fujitsu Ten Limited

Claims (2)

[Claims] (1) In an automatic gain control circuit for a tuner of a radio receiver that includes a high-frequency amplification section, an intermediate-frequency amplification section, and an AGC amplifier, an AGC voltage shift circuit is provided to provide a step difference in the output of the high-gain AGC amplifier; AGC voltages with different levels are output to the high frequency amplification section and the intermediate frequency amplification section, and as the input level increases, automatic gain control is sequentially started from the intermediate frequency amplification section in the subsequent stage. Automatic gain control circuit for radio receiver tuner. (2) The automatic gain control circuit according to claim 1, characterized in that an AC'C voltage that changes stepwise according to the input level is used as a display signal of the input level. .