JPS59220720A - Exposure control circuit of camera - Google Patents
Exposure control circuit of cameraInfo
- Publication number
- JPS59220720A JPS59220720A JP9498183A JP9498183A JPS59220720A JP S59220720 A JPS59220720 A JP S59220720A JP 9498183 A JP9498183 A JP 9498183A JP 9498183 A JP9498183 A JP 9498183A JP S59220720 A JPS59220720 A JP S59220720A
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- cds
- resistance
- capacitor
- shutter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
- G03B7/00—Control of exposure by setting shutters, diaphragms or filters, separately or conjointly
- G03B7/08—Control effected solely on the basis of the response, to the intensity of the light received by the camera, of a built-in light-sensitive device
- G03B7/081—Analogue circuits
- G03B7/083—Analogue circuits for control of exposure time
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Abstract
Description
【発明の詳細な説明】
(陀業上の利用分野)
この発明はカメラにおける蕗出?1illlII411
1!l路、特に商II耽被写体に対する露出制御をd易
にした回路に関する。[Detailed description of the invention] (Field of industrial application) Is this invention a product of cameras? 1illllII411
1! The present invention relates to a circuit that facilitates exposure control for photographic subjects, especially for photographic subjects.
(従来技術)
カメラの自動露出制御回路のうち、CdSを用いたシャ
ッタ制御回路はよく知られている。(Prior Art) Among automatic exposure control circuits for cameras, a shutter control circuit using CdS is well known.
その1例を第1図に示す。An example is shown in FIG.
図中IFiシャッタトリガスイッチであシ、これをON
することによ、9、CdS受光素子2を通じてコンデン
サ4が充電されると共にシャッタの開動作が開始される
。In the figure, turn on the IFi shutter trigger switch.
As a result, the capacitor 4 is charged through the CdS light-receiving element 2 and the shutter opening operation is started.
コンパレータ6に祉、コンデンサ4の電圧と共に、可変
抵抗器5で決定される電圧が入力されておシ、コンデン
サ4が充電され、その電圧が可変抵抗器5によって決定
された基準電圧と一枚したとき、コンパレータ6の出力
が反転し、該出力によって制御されるシャッタ制御マグ
ネット7が作動し、シャッタを閉じて一元を終る。The voltage determined by the variable resistor 5 is input to the comparator 6 along with the voltage of the capacitor 4, and the capacitor 4 is charged, and the voltage is equal to the reference voltage determined by the variable resistor 5. At this time, the output of the comparator 6 is inverted, and the shutter control magnet 7 controlled by the output is activated, closing the shutter and ending the process.
なお3はASAフィルタである。Note that 3 is an ASA filter.
このコンパレータ6の入力、出力及びシャッタの開口波
形を第2図に示す。同図(b)はコンパレータ6への入
力を示し、Sは可変抵抗器5によって定められる基準電
圧である。)1はコンデンサ40電圧変化を示し、時刻
T1におけるスイッチ1のONによ少時間の経過と共に
増加する電圧tが基準電圧Sを超えたとき、同図(a)
のようにコンパレータ出力が反転し、マグネット7を作
動させる。この間、1b」図(e)のように、シャッタ
は時刻T1から少しく後の時刻T2で開き始め、マグネ
ット7■作動T4から閉動作を開始し、時刻T5で閉止
する。このように比較的被写体の輝度が低いききは問題
がないが、輝度が高く、cd j−2v)抵抗が険めて
小さく、−:圧【の上昇が早い場合に問題が生じる。FIG. 2 shows the input and output waveforms of the comparator 6 and the shutter aperture waveforms. FIG. 6B shows the input to the comparator 6, where S is the reference voltage determined by the variable resistor 5. ) 1 shows the voltage change of the capacitor 40, and when the voltage t, which increases with the passage of time when the switch 1 is turned on at time T1, exceeds the reference voltage S, the figure (a)
The comparator output is inverted as shown in the figure, and the magnet 7 is activated. During this time, as shown in FIG. 1B (e), the shutter begins to open at time T2, which is a little later than time T1, starts its closing operation at time T4 when magnet 7 is activated, and closes at time T5. There is no problem when the brightness of the subject is relatively low, but a problem occurs when the brightness is high, the resistance is steep and small, and the pressure rises quickly.
ナなわら、第2図(b)に一点鎖線で示すように、コン
デンt4の光電電流が大きく、電圧t′の室上シが急敏
な場合は、シャッタが全曲に到る前T3でシャッタの閉
動作が始まる。こυため、極端な高輝度被写体でT3か
12位値にくれは無光が行なわれない場合すら生じ、シ
ャッタトリがスイッチ1v)ONv)タイミング祉Tい
1゛2の時間差をa尚にするため微妙な調整が必髪とな
る。However, as shown by the dashed line in FIG. 2(b), if the photoelectric current of the capacitor t4 is large and the voltage t' rises rapidly, the shutter will close at T3 before the shutter reaches the entire track. The closing operation begins. For this reason, in the case of extremely high-brightness subjects, deviations in the T3 or 12th place values will occur even when no light is used, and the shutter release will cause the switch 1v) ONv) timing control to minimize the time difference between T1 and T2. Subtle adjustments are required.
(発明の目的)
この発明は、適当な抵抗をCdaと直列、に接続し、コ
ンデンサ電圧tυ立上ジ速kを適尚に抑さえることによ
シ、上記の欠点を含まぬ制御回路を得ようとするもので
ある。(Object of the invention) The present invention provides a control circuit that does not have the above drawbacks by connecting an appropriate resistor in series with Cda and appropriately suppressing the rising speed k of the capacitor voltage tυ. This is what we are trying to do.
(発明の構成)
この発明の露出制御回路は、第3図に示すように、高輝
度補正抵抗8をCd52と直列に接続したものである。(Structure of the Invention) As shown in FIG. 3, the exposure control circuit of the present invention has a high brightness correction resistor 8 connected in series with Cd52.
この制御回路によるコンパレータ6の入出力及びシャッ
タの開口波形を第4図に示す。FIG. 4 shows the input/output waveform of the comparator 6 and the shutter opening waveform caused by this control circuit.
同図(b)に示すように、第2図(b)に比べてコンデ
ンサ電圧tQ立上ルはゆるやかになシ、高輝度において
も時間差T、、T2の調整が極めて容易になる。勿論、
露出時間の調整は基準電圧8を小にすることによって可
能となるものである◎この挿入される補正抵抗8υ抵抗
値は、小さすぎるときはコンデンサ電圧の立上りを抑え
る効果が小さく、時間差T1、T2の調整の難しさが残
シ、一方、大きすぎれはコンデンサ電圧Q立上シが緩慢
になシナぎ、短い鈷出時間を得るへめには可変抵抗5に
よって設定される基準電圧が低くなシナぎるという問題
を生ずる。こOため、補正抵抗8■抵抗IRBI/′i
、光量値EV、oo17におけるCdSの抵抗値をRE
V10017としたとき0.5Rk;Vt oo 17
≦R8≦2 ’1V1oo 17の範囲に選ぶのが望
ましい。As shown in FIG. 2(b), the capacitor voltage tQ rises more slowly than in FIG. 2(b), and the time differences T, . . . T2 can be adjusted extremely easily even at high brightness. Of course,
The exposure time can be adjusted by reducing the reference voltage 8. If the resistance value of the inserted correction resistor 8υ is too small, the effect of suppressing the rise of the capacitor voltage will be small, and the time difference T1, T2 On the other hand, if it is too large, the rise of the capacitor voltage Q will be slow, and in order to obtain a short launch time, the reference voltage set by the variable resistor 5 must be low. This causes the problem of overloading. Therefore, the correction resistance 8 ■ resistance IRBI/'i
, the light amount value EV, the resistance value of CdS at oo17 is RE
0.5Rk when V10017; Vt oo 17
≦R8≦2 '1V1oo It is desirable to select the range of 17.
上記υ実施し0はコンデンサの光電による制御回路v■
を示したが、CdSを通じて放電するタイプυ制御回路
にも同様に実施出来ることは云う迄もない。The above υ is implemented and 0 is the photoelectric control circuit of the capacitor v■
However, it goes without saying that the same can be applied to a type υ control circuit that discharges through CdS.
(発明Q幼果)
こV発明は、上i己のように、IfL当な大きさの抵抗
直り抵i7tをCdS受元水元素子りlに接続するとい
う浦牟な構成によシ、゛コンデンサの光電電流が過大に
なるのを防止し、゛電圧変化の立上シを緩やかにし、7
ヤツタトリガスイツチとシャンタ開動作囲始のタイミン
グ調整t−谷易にし、楔端な高輝度被写体の場合も無光
が行なわれないといった事故を防止し、f1曲な露出制
御回路を提供することが出来る。(Young fruit of invention Q) This invention, as in the above example, is based on a unique configuration in which a resistance straightener i7t of a size corresponding to IfL is connected to a CdS receiving water element element l. It prevents the photoelectric current of the capacitor from becoming excessive, ``slows the rise of voltage change, and
It is possible to easily adjust the timing of the start of the shutter trigger switch and shunter opening operation, to prevent accidents such as non-lighting even in the case of wedge-shaped, high-brightness objects, and to provide an exposure control circuit with f1 performance. I can do it.
@1図は従来の紐出ll1lI鐸装置の回路図、第2図
はその作動を示すタイミングチャート、第3図はこの発
明の露出制御回路の1実施列の回路図、第4図はそ■タ
イミングチャートでおる。
1;シャッタトリガスイッチ 2:cds受光索子 3
:ASAフィルタ 4:コンデンサ5:可変抵抗 6:
コンパレータ 7:シャッタ制御マグネット 8:補正
抵抗
特許出願人 小西六与真工業沫弐会社出願人代理人
弁理士 佐 藤 文 め(ほか1名)@Figure 1 is a circuit diagram of a conventional lace-drawing device, Figure 2 is a timing chart showing its operation, Figure 3 is a circuit diagram of one embodiment of the exposure control circuit of the present invention, and Figure 4 is a circuit diagram of the exposure control circuit of the present invention. See the timing chart. 1; Shutter trigger switch 2: CDS light receiving cable 3
:ASA filter 4:Capacitor 5:Variable resistor 6:
Comparator 7: Shutter control magnet 8: Compensation resistance Patent applicant Konishi Rokuyoshin Kogyo Niji Company applicant agent Patent attorney Fumi Sato (and 1 other person)
Claims (1)
放電し、その電圧変化に委する時間で露光時間を決定す
る露出制御回路において、別記受光素子に直列に補正抵
抗を接続し、該補正抵抗の抵抗値R8f:、光被直EV
1oo17におけるCdSの抵抗器を1LEV1oou
7 としたとき0.5aav10017 ≦R8≦2
REV10017の範囲としたことを特数とするカメラ
O露出制御回路In an exposure control circuit that uses CdS as a light-receiving element, discharges the element to photodischarge a capacitor, and determines the exposure time by the time allowed for the voltage change, a correction resistor is connected in series to the light-receiving element, and the correction is performed. Resistance value R8f of resistor:, light exposure EV
CdS resistor in 1oo17 1LEV1oou
7, then 0.5aav10017 ≦R8≦2
Camera O exposure control circuit with special features in the range of REV10017
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9498183A JPS59220720A (en) | 1983-05-31 | 1983-05-31 | Exposure control circuit of camera |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9498183A JPS59220720A (en) | 1983-05-31 | 1983-05-31 | Exposure control circuit of camera |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59220720A true JPS59220720A (en) | 1984-12-12 |
Family
ID=14125076
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9498183A Pending JPS59220720A (en) | 1983-05-31 | 1983-05-31 | Exposure control circuit of camera |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59220720A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH053946U (en) * | 1991-07-02 | 1993-01-22 | 株式会社小松ライト製作所 | Optical sensor circuit |
-
1983
- 1983-05-31 JP JP9498183A patent/JPS59220720A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH053946U (en) * | 1991-07-02 | 1993-01-22 | 株式会社小松ライト製作所 | Optical sensor circuit |
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