JPS59216378A - Clamping circuit for television signal - Google Patents

Abstract

PURPOSE:To eliminate DC and low frequency variation by detecting a synchronizing signal of the output for every polarity of a PN code and feeding back the difference so that the difference becomes zero when a video signal whose polarity is inverted in accordance with the PN code is restored. CONSTITUTION:The video signal whose polarity inverted in accordance with the PN code is subjected to low frequency variation and is inputted to a differential amplifier 5. The output is amplified by a non-inverting amplifier 7 and an inverting amplifier 6, and oututs are switched in accordance with the polarity synchronously with the vertical synchronizing signal of the video input signal by a switch 8 and are outputted. This output signal holds the pedestal level of the synchronizing signal or the peak-to-peak value in a sample holding circuit 11 or 12 in accordance with the PN code by a control circuit 16 and a synchronizing signal separating circuit 10. The output difference between both sample holding circuits 11 and 12 is fed back to the differential amplifier 5 through a low-pass filter 14, thereby eliminating DC and low frequency variations.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a clamp circuit for television signals, and particularly a feedback circuit for restoring a television video signal whose polarity has been inverted using a pseudo-random code (abbreviated as PN code) or the like in units of horizontal scanning periods and regenerating the DC component. This invention relates to a compression type television signal clamp circuit.

In order to equalize the spectrum of frequency modulated waves when transmitting television video signals using frequency modulation methods such as microwaves,
Alternatively, for the purpose of secrecy in pay television, etc., the polarity of the video signal is inverted and transmitted in units of horizontal scanning lines according to a PN code determined based on a certain standard. In this way, it goes without saying that the conventional feedback compression type Clann circuit cannot be used as is for signals where the polarity of the signal including the horizontal synchronization signal is not constant for each horizontal scanning line, but even if the polarity is reversed, Even when applied to restored video signals, there is a problem in that low frequency fluctuation components cannot be removed and complete DC component reproduction cannot be performed, as will be described later.

Misfire - 〇The purpose is to provide a television signal clamp circuit that restores the polarity-inverted video signal described above and regenerates the direct current component including the low frequency fluctuation component, thereby making it possible to reproduce the correct video signal. .

The television signal clamp circuit of the present invention includes a first differential amplifier that amplifies a video input signal whose polarity is inverted according to predetermined code turns in units of horizontal scanning periods, and whose DC voltage component is controlled by a feedback voltage. And this first
an inverting and non-inverting amplifier connected in parallel to the output of the differential amplifier, an amplifier whose output signal is switched by a switching control signal to the output terminal of either of the inverting and non-inverting amplifiers, and an amplifier connected to the output terminal of the differential amplifier. a low-pass filter connected to the output of the second differential amplifier that removes high frequency components and generates the feedback voltage; and a synchronization signal that separates a synchronization signal component from the video signal and generates a sampling synchronization pulse for the sample-and-hold circuit. a separation circuit; a second switch that switches and connects the output of the synchronization signal separation circuit to the first or second sample hold circuit according to the switching control signal; and a second switch used for inverting the polarity of the video input signal. and a control circuit that generates the switching control signal corresponding to the predetermined code pattern.

Next, the present invention will be described in detail with reference to the drawings.

Figure 1 is a block diagram of a conventional feedback compression type clamp circuit, in which the output of a differential amplifier 1 is branched, a slicing type synchronization signal separation circuit 2 generates a sampling synchronization pulse for a sample and hold circuit 3, and the synchronization pulse is By feeding back the beak envelope to the differential amplifier 1 via the low-pass filter 4, the peak value of the synchronizing pulse is clamped to a constant value.

FIG. 2 is a block diagram of an embodiment of the present invention, in which an inverted video input signal applied to an input terminal 100 is amplified by a first differential amplifier 5 and then divided into two parts. and non-inverting amplifier 7. The output is switched by the first switch 8 in synchronization with the polarity reversal of the video input signal, and the video signal having the same polarity is sent to the output terminal 101 via the amplifier 9. The feedback circuit for clamping the synchronization pulse includes a synchronization signal separation circuit 10 similar to that shown in FIG. , a differential amplifier 13 , a low-pass filter 14 , and a second switch 15 that switches the sampling synchronization pulse of the synchronization signal separation circuit 10 to the sample hold circuit 11 or 12 . The control signal 102 includes a switching synchronization signal separation circuit in synchronization with the polarity inversion of the video input signal, and is configured to generate a switching control signal similar to that on the transmission side in synchronization with the vertical synchronization signal.

When the video input signal contains low frequency fluctuations, the input to the differential amplifier 5 changes as shown in FIG. 3(a), and its synchronous pulse envelope is shown by solid lines A and A'.

When the feedback voltage 103 of the differential amplifier 5 is kept constant, the synchronous pulse envelope of the outputs of the inverting amplifier 6 and the non-inverting amplifier 7 is as shown by the broken line B in FIG. 3(b).

The output waveform of the switch 8 which is restored by inverting the ten-polar part of the solid lines C, C' and υ, Fig. 3 +8) is shown in Fig. 3 (b). When controlled by a feedback circuit having one sample-and-hold circuit similar to The low frequency fluctuation component, that is, A in Fig. 3(a),
It is in phase with A', but the broken line portion D' is out of phase with A and A'. When this is applied to the empty differential amplifier 5, the output waveform of the switch 8 becomes as shown in FIG. Striped shading occurs and becomes unstable. In order to eliminate this drawback, the sign of the negative phase portion D' may be inverted. In the embodiment of the present invention shown in FIG. 2, the sampling synchronization pulses of the two sample and hold circuits 11 and 12 are switched by the switch 15 in synchronization with the switch 8, so that the B of FIG. By generating the envelopes shown in and C and calculating the difference between the two using the differential amplifier 13, a feedback voltage with inverted polarity can be obtained. Therefore, stable negative feedback is performed, all synchronization pulse peak values are clamped to the same value, and a correct video signal is restored. The above explanation deals with the case where the video input signal contains a low frequency component, but the same applies to the case where the low frequency component is not a direct current component, and in the conventional method using a single sample and hold circuit, the Control to align the synchronization pulse peak values of the inversion section cannot be performed. In the circuit of the present invention, various fluctuation factors such as fluctuations in the DC setting level of inverting and non-inverting amplifiers, amplitude fluctuations and DC component fluctuations of the input signal, and differences in the inversion reference level between the transmitting side and the receiving side can be avoided. At the same time, a clamping operation is performed to align all synchronization pulse peak values to the same value, and a correct video signal is restored.

In the above-described embodiment, the first switch 8 is provided on the output side of the inverting amplifier 6 and the non-inverting amplifier 7, but a configuration in which the switch is provided on the input side and the output side is an adder circuit is also possible. C,
The amplifier 9 provided after the switch 8 may be omitted. Furthermore, although it has been explained that the control circuit 16 includes the same PN code generator and horizontal synchronization signal oscillator as the transmitting side and generates the same inversion switching control signal as the transmitting side, it does not include the INN code generator and can generate the horizontal synchronization signal oscillator of the input signal. It is also possible to reproduce the inversion switching control signal by determining whether the pulse is inverted or non-inverted. Furthermore, although the signal inputs of the sample and hold circuits 11 and 12 are branched from the output side of the switch 8, they may be configured to be branched from the outputs of the inverting amplifier 6 and the non-inverting amplifier 7, respectively. Although the circuit configuration is complicated, it is also possible to branch from the input side of the switch 8. Note that if the sample and hold circuit samples and holds the level of the pedestal section instead of the peak value of the synchronous pulse, it is clear that control can be performed to make the pedestal levels the same, and the gain of the non-inverting amplifier will be It has the characteristic that even if there is a difference, there is little deterioration of the image.

As described above in detail, the television signal clamp circuit of the present invention receives and restores a television video signal that includes a horizontal synchronizing pulse and whose polarity is inverted according to an arbitrary predetermined code pattern in units of horizontal scanning lines, This has the effect of reproducing a correct video signal by removing direct current and low frequency fluctuations, and the purpose of spectrum equalization or concealment can be achieved without affecting the quality of the reproduced image.

[Brief Description of the Drawings] Fig. 1 is a block diagram of a conventional example of a feedback compression type clamp circuit, Fig. 2 is a block diagram of an embodiment of the present invention, and Fig. 3 (a
) to (d) are waveform diagrams for explaining the operation of FIG. 2. 1.5.13...Differential amplifier, 2,10...
...Synchronization signal separation circuit, 3, 11.12...
Sample and hold circuit, 4, 14...Low pass filter, 6...Inverting amplifier, 7, 9...
Non-inverting amplifier, 8.15...Switcher, 16...
...control circuit. Part 1: 2: 3: Flash

Claims (1)

[Claims] A first differential amplifier amplifies a video input signal whose polarity is inverted according to a predetermined code pattern using a horizontal scanning period as a unit, and whose DC voltage component is controlled by a feedback voltage; Inverting and non-inverting amplifiers connected in parallel, a first switch that switches the output signal of one of the inverting and non-inverting amplifiers using a switching control signal and connects it to the output terminal, and the inverting and pull-hold circuit. a second differential amplifier that amplifies the difference between the output voltages of the first and second sample and hold circuits; and a second differential amplifier that is connected to the output of the second differential amplifier and removes high frequency components to generate the feedback voltage a sync signal separation circuit that separates a sync signal component from the video signal and generates a sampling sync pulse for the sample-and-hold circuit; a second switch that is selectively connected to the first or second sample and hold circuit; and a control circuit that generates the switching control signal corresponding to the predetermined code pattern used for polarity inversion of the video input signal. A clamp circuit for television signals characterized by the following features: