JPS59211972A - Cell remainder recognition circuit - Google Patents
Cell remainder recognition circuitInfo
- Publication number
- JPS59211972A JPS59211972A JP58084369A JP8436983A JPS59211972A JP S59211972 A JPS59211972 A JP S59211972A JP 58084369 A JP58084369 A JP 58084369A JP 8436983 A JP8436983 A JP 8436983A JP S59211972 A JPS59211972 A JP S59211972A
- Authority
- JP
- Japan
- Prior art keywords
- discharge
- circuit
- cell
- pulse discharge
- battery
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/44—Methods for charging or discharging
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Tests Of Electric Status Of Batteries (AREA)
- Secondary Cells (AREA)
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
本発明は憧池式元至充電式の電気かみそりのような電池
式機器において、電池切れによるその便用途中での停止
を防止するために電池の残量表示を行なうに際し、との
電池の残量表示の制御に使用する電池him職回路、に
関するものであろう〔背景技術〕
従来電池の残量を認識判別するに際しては\電池から所
定の放電負荷に放電を行ない、このときの電池の電圧降
下の状態から残量の認識判別を行ならようにしていた。[Detailed Description of the Invention] [Technical Field] The present invention relates to a battery-operated device such as a rechargeable electric shaver that has a residual amount of battery in order to prevent the device from stopping during use due to a dead battery. [Background technology] Conventionally, when recognizing and determining the remaining battery level, a predetermined discharging load from the battery is used to display the remaining battery level. The battery was then discharged, and the remaining battery power could be determined based on the state of the battery's voltage drop at this time.
ところがかかる従来例におい゛そり、個々の電池につい
ては夫々残量の認識判別ができるのであるが、多数の電
池に対しては非常にばらつきが大きく、このばらつきの
補正のた程が煩雑化され茗問題があった。However, in such a conventional example, although it is possible to recognize and determine the remaining capacity of each individual battery, there is a very large variation in the number of batteries, and the process of correcting this variation becomes complicated and troublesome. There was a problem.
□本発明は電池の残量を認識判別する際のばらつき誤差
を一力小さくシ、はとんど無調整で使用してしかも正確
な残量の認識判別ができるようにした電池残量認識回路
を提供することを目的とするものである。□The present invention is a battery remaining power recognition circuit that minimizes the variation error when recognizing and determining the remaining battery power, and allows accurate recognition and determination of the remaining power while being used without any adjustment. The purpose is to provide the following.
本発明は、パルス放電時の電池Bの電圧降下を検出する
ことにより、この電池Bの残量を認識判別するに際し、
大小2種の放電負荷を設け、これらの放電負荷への夫々
のパルス放電時における電圧降下の差異を検出し、この
電圧降下の差異と予め設定されている電池残量との関係
に対して上記検出された差異を比較することにより電池
Bの残量を認識判別するものである。The present invention recognizes and determines the remaining capacity of battery B by detecting the voltage drop of battery B during pulse discharge.
Two types of discharge loads, large and small, are provided, and the difference in voltage drop during pulse discharge to these discharge loads is detected, and the relationship between the difference in voltage drop and the preset remaining battery capacity is calculated as described above. The remaining capacity of battery B is recognized and determined by comparing the detected differences.
(実施例1)
第1図は本発明の第1の実施例を示し、大小2種の放電
負荷に対応した2個のパルス放電回路D1、D2を設け
、パルス放電回路D+により小電流のパルス放電を、パ
ルス放電回路D2により大電流のパルス放電を夫々行な
うようにしたものであり、これらパルス放電回路Dt、
Dzld夫々単安定マルチパイプし一タMVI、MV2
で制御される。また図中PH土、 PH2はピークホー
ルド回路、Gは減算回路、APは増幅回路、Cは関係比
較回路、Hは表示器である。(Embodiment 1) FIG. 1 shows a first embodiment of the present invention, in which two pulse discharge circuits D1 and D2 corresponding to two types of discharge loads, large and small, are provided, and the pulse discharge circuit D+ generates small current pulses. The discharge is performed by pulse discharge of a large current by the pulse discharge circuit D2, and these pulse discharge circuits Dt,
Dzld each monostable multipipe one MVI, MV2
controlled by In the figure, PH2 is a peak hold circuit, G is a subtraction circuit, AP is an amplification circuit, C is a relational comparison circuit, and H is a display.
かくて令弟1図の実施例の回路において、スイッチSW
をオシすると、第2図(a)のようなトリガ信号が発生
して単安定マルチバイブレータMVIが動作し、同図(
b)のようなパルスを発生する。この同図(b)のパル
スの立ち上がりで第1のパルス放電回路D1がオンし、
同図(b)のパルスの立ち下がりでこの第1のパルス放
電回路D+がオフするまでの間、同図(d)に示すよう
に小電流のパルス放電が行なわれる0第1の単安定マル
チバイブレータMVIが立ち下がると同時に同図(c)
のように第2の単安定マルチバイづレータMV2が立ち
上がり、この立ち上がると同時にこれが立ち下がるまで
の間第2のパルス放電回路D2がオンし、同図(d)の
ように大電流のパルス放電が行なわれる。一方ピークホ
ールド回路PHI 、 PH2は夫々単安定マルチバイ
づレータMVI 、 MV2出力により制御されて第1
、第2のパルス放電回路D1. IIと同様のタイミン
クに動作するものであり、同図(d)のような放電電流
が流れることによって電池Bの端子電圧が同図(e)の
ように変化したとすると、ピークホールド回路PHI
。Thus, in the circuit of the embodiment shown in Fig. 1, the switch SW
When the oscillator is turned on, a trigger signal as shown in Fig. 2 (a) is generated, and the monostable multivibrator MVI operates, and as shown in Fig. 2 (a).
b) Generates a pulse like the one shown below. The first pulse discharge circuit D1 is turned on at the rising edge of the pulse shown in FIG.
Until the first pulse discharge circuit D+ is turned off at the falling edge of the pulse shown in (b) of the same figure, a small current pulse discharge is performed as shown in (d) of the same figure. At the same time as the vibrator MVI falls (c)
The second monostable multivibrator MV2 rises as shown in the figure, and at the same time as this rise, the second pulse discharge circuit D2 is turned on until it falls, and a large current pulse discharge occurs as shown in (d) of the same figure. It is done. On the other hand, the peak hold circuits PHI and PH2 are controlled by the monostable multivibrator MVI and MV2 outputs, respectively.
, second pulse discharge circuit D1. It operates at the same timing as II, and if the terminal voltage of battery B changes as shown in figure (e) due to the discharge current flowing as shown in figure (d), the peak hold circuit PHI
.
PH2は夫々その動作時間帯におけるピーク値を検出し
て同図(f)及び(g)に示すような出力を生じる。PH2 detects the peak value in each operating time period and produces outputs as shown in (f) and (g) of the figure.
減算回路Gけ例えば抵抗R,R,R,RとオペアンプO
Pとで第5図のように構成され、両ピークホールド回路
PHI 、 PH2の出力の差を検出し出力するもので
あり、この減算回路Gの出力は増幅回路幻で増幅され、
関係比較回路Cに入力される。電池Bの残量と上記減算
回路Gで検出された差異との関係は例えば第4図のよう
になっているも、のであり、このような関係との比較に
よシ上記関係比較回路Cで電池Bの残量を検出認識し、
表示器Hで表示するものである。Subtraction circuit G, for example, resistors R, R, R, R and operational amplifier O
It is configured as shown in Figure 5 with P and detects and outputs the difference between the outputs of both peak hold circuits PHI and PH2, and the output of this subtraction circuit G is amplified by an amplifier circuit.
It is input to a relational comparison circuit C. The relationship between the remaining amount of battery B and the difference detected by the subtraction circuit G is as shown in FIG. Detects and recognizes the remaining amount of battery B,
This is displayed on the display H.
(実施例2)
第5図乃至第7図は本発明の第2の実施例を示すもので
あって、前述の第1の実施例のものに対して割算器Wを
加え、一方の放電負荷への放電による放電電圧降下と、
両放電負荷への放電による放電電圧降下の差の比として
差異率を算出するようにしたものであり、割算器Wは第
6図に示すように5台の臆アンプLA 1〜LA3と第
5図回路と同様の構成の減算器G1とKより構成される
ものであり、割算器W出力、即ち上記差異率と電池残量
との関係は例えば第7図のようになり、この関係に基き
関係比較回路Cで電池Bの残量が検出認識されるO
(実施例3)
第8図及び第9図は本発明の第5の実施例を示し一%第
2の単安定マルチバイブレータMV2の出力で制御され
る第3の単安定マルチバイブレータM■を設け、この第
3の単安定マルチバイブレータMV3により竿2のパル
ス放電回路D2をオンするようにして第1及び第2のパ
ルス放電回路DI、D2のオンタイエンクを互いに時間
的に離間し、さらに第1及び第2のパルス放電による電
圧降下の差異を両者の比として割算器Wによシ検出する
ようにし次ものである。しかしてこの第3の実施例にあ
っては、第9、図(a)のようなスイッチSW入力に対
し、第1乃至第5の単安定マルチバイブレータMv1〜
MV凸が同図(b)〜(d)のように動作し、同図(e
)のように電池Bからパルス電流が流れる。このため電
池Bには同図(f)のような電圧降下を生じ、これをピ
ークホールド回w!rPHI 、 PH2により夫々同
図(g)及び(h)のように検出し、さら゛に割算器W
で両川力を割算して同図(i)のような出力を得るもの
であり、この割算器Wの出力に応じて関係比較回路Cで
電池残量を認識判別し、表示器Hで表示するものである
。(Embodiment 2) FIGS. 5 to 7 show a second embodiment of the present invention, in which a divider W is added to the first embodiment described above, and one discharge Discharge voltage drop due to discharge to load,
The difference rate is calculated as the ratio of the difference in discharge voltage drop due to discharge to both discharge loads, and the divider W is divided into five amplifiers LA1 to LA3 and the The circuit is composed of subtracters G1 and K, which have the same configuration as the circuit in Figure 5, and the relationship between the output of the divider W, that is, the above-mentioned difference rate, and the remaining battery capacity is as shown in Figure 7, for example. The remaining capacity of battery B is detected and recognized by relational comparison circuit C based on O (Third Embodiment) Figures 8 and 9 show a fifth embodiment of the present invention. A third monostable multivibrator M■ controlled by the output of MV2 is provided, and this third monostable multivibrator MV3 turns on the pulse discharge circuit D2 of the rod 2 to generate the first and second pulse discharges. The on-starts of the circuits DI and D2 are temporally separated from each other, and the difference in voltage drop due to the first and second pulse discharges is detected by a divider W as a ratio between the two. However, in this third embodiment, the first to fifth monostable multivibrators Mv1 to
The MV convex operates as shown in the figure (b) to (d), and the figure (e
), a pulse current flows from battery B. This causes a voltage drop in battery B as shown in (f) in the same figure, which is then held at the peak w! rPHI and PH2 are detected as shown in (g) and (h) of the same figure, respectively, and further the divider W
The output shown in (i) in the same figure is obtained by dividing the power of Ryokawa by . According to the output of this divider W, the relational comparison circuit C recognizes and determines the remaining battery level, and the display H shows the remaining battery power. It is to be displayed.
本発明は上述のように、大小2種の放電負荷を設けてこ
れら放電負荷に個別に電池より放電し、これら夫々の放
電時の電池の電圧降下の差異より電池残量を認識判別す
るようにしたものであるから、電池毎のばらつき誤差を
最小限にすることができて電池の残量表示をより正確に
行なうことができ、しかも製造時においてばらつき補正
のための調整を必要としないため、生産性が大巾に向上
する効果を有するものである。As described above, the present invention provides two types of discharge loads, large and small, discharges from the battery individually to these discharge loads, and recognizes and discriminates the remaining battery capacity from the difference in voltage drop of the battery during each discharge. Because of this, it is possible to minimize the variation error for each battery and more accurately display the remaining battery power, and there is no need to make adjustments to compensate for variations during manufacturing. This has the effect of greatly improving productivity.
第1図は本発明の第1の実施例の1099図、第2図は
同上のタイムチャート、第5図は同上の減算回路の回路
図、第4図は同上の電池残量と減算回路出力との関係特
性図、第5図は本発明の第2の実施例の1099図、第
6図は同上の割算回路の詳細づ0ツク図、第7図は同上
の電池残量と割算回路出力との関係特性図、第8図は本
発明の第5の実施例のブロック図、第9図は同上のタイ
ムチセードであり、Bは電池である。
代理人 弁理士 石 1)長 七
第3図
R
残10%−1■%
第5図
第6図
第7図
第8図
第9図Figure 1 is a 1099 diagram of the first embodiment of the present invention, Figure 2 is a time chart of the same as the above, Figure 5 is a circuit diagram of the subtraction circuit of the same as the above, and Figure 4 is the remaining battery level and the output of the subtraction circuit of the same as the above. Fig. 5 is a 1099 diagram of the second embodiment of the present invention, Fig. 6 is a detailed diagram of the division circuit of the same as above, and Fig. 7 is a diagram of the remaining battery power and division of the same as above. FIG. 8 is a block diagram of the fifth embodiment of the present invention, FIG. 9 is a time cisode as described above, and B is a battery. Agent Patent Attorney Ishi 1) Chief 7 Figure 3 R Remaining 10% - 1% Figure 5 Figure 6 Figure 7 Figure 8 Figure 9
Claims (3)
別に電池より放電し、これら夫々の放電時の電池におけ
る電圧降下の差異より電池残量を判別認識するようにし
て成ることを特徴とする電池残量認識回路。(1) Two types of discharge loads, large and small, are provided, and the batteries are discharged individually to each discharge load, and the remaining battery capacity is determined and recognized from the difference in voltage drop in the batteries during each discharge. Features a battery level recognition circuit.
圧降下と、両放電負荷に対す名放電による放電電圧降下
の差との北として差異率を求め、この差異率により電池
残量を判別認識するようKして成ることを特徴とする特
許請求の岐囲第1項記載の電池残量認識回路。(2) Find the difference rate as the north of the difference between the discharge voltage drop during discharge for either discharge load and the discharge voltage drop due to normal discharge for both discharge loads, and use this difference rate to determine and recognize the remaining battery capacity. 1. A battery remaining amount recognition circuit as set forth in claim 1, characterized in that the circuit is configured such that:
いに時間的に離間して行なうようにして成ることを特徴
とする特許請求の範囲一1項記載の電池残量認識回路。(3) The remaining battery capacity recognition circuit as set forth in claim 11, wherein the battery discharges for two types of discharge loads, large and small, are performed temporally apart from each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58084369A JPS59211972A (en) | 1983-05-14 | 1983-05-14 | Cell remainder recognition circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58084369A JPS59211972A (en) | 1983-05-14 | 1983-05-14 | Cell remainder recognition circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59211972A true JPS59211972A (en) | 1984-11-30 |
Family
ID=13828610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58084369A Pending JPS59211972A (en) | 1983-05-14 | 1983-05-14 | Cell remainder recognition circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59211972A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61148379A (en) * | 1984-12-22 | 1986-07-07 | Kaize Denki Kk | Battery tester |
-
1983
- 1983-05-14 JP JP58084369A patent/JPS59211972A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61148379A (en) * | 1984-12-22 | 1986-07-07 | Kaize Denki Kk | Battery tester |
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