JPS5921128A - Field effect semiconductor device - Google Patents

Field effect semiconductor device

Info

Publication number
JPS5921128A
JPS5921128A JP57129928A JP12992882A JPS5921128A JP S5921128 A JPS5921128 A JP S5921128A JP 57129928 A JP57129928 A JP 57129928A JP 12992882 A JP12992882 A JP 12992882A JP S5921128 A JPS5921128 A JP S5921128A
Authority
JP
Japan
Prior art keywords
voltage
substrate potential
source
programmably
threshold voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57129928A
Other languages
Japanese (ja)
Inventor
Toshiaki Fujita
藤田　利昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP57129928A priority Critical patent/JPS5921128A/en
Publication of JPS5921128A publication Critical patent/JPS5921128A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/30—Modifications for providing a predetermined threshold before switching
    • H03K17/302—Modifications for providing a predetermined threshold before switching in field-effect transistor switches

Landscapes

  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To vary programmably a treatable signal level, by varying programmably the substrate potential. CONSTITUTION:Plural units of resistance R are connected in series between a source S of an N channel FETQ1 of a C-MOS inverter 1 and a terminal of the earth side VSS. A substrate potential control circuit 2 is added to apply the voltage obtained between optional resistances to a substrate SUB against the source S with a switch of switches SW1-SW4. When a current (i) flows to the resistance R, the voltage is produced between the source S of the FETQ1 and the SUB. Then the SUB is adversely biased to the source S. This device increases the threshold voltage of the FETQ1. As a result, the threshold voltage of the inverter 1 rises higher than a case where the substrate potential is 0V. Therefore, the resistance value of the circuit 2 is varied programmably by a switch, etc. Thus the threshold voltage of the inverter 1 has a programmable change owing to a change of the substrate potential VBS.

Description

【発明の詳細な説明】 本発明は電ｙ′Ｃ効果型半導体装１ｉ’ｚ（ＦＥ’ｌｌ
’という）に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides an electric y'C effect type semiconductor device 1i'z (FE'll
').

ＦＥＴ特に絶縁ゲート型ＦＥＴ（八・ＩＩＳ　　ＦＥ’
ｌ”という）は犬谷是メモリ全始め多くの応用回路素子
として用いらｈ今日のエレクトロニクス発展の基礎を川
っている。特に最近においてはリニア回路にも盛んに用
いられるようになｐその応用範囲が広がるとともに、取
扱う信号レベル（電圧、電流ともに）も多岐にわたるよ
うになって来ている。これに対して従来のＦ　Ｅ　Ｔは
一つの製品毎に取扱い得る信号レベルは固定されている
ので、信号レベルに応じて幾つかの種類の異るＦ　Ｅ　
’１１’を用意しなければならないこと、更には所望の
Ｆ　Ｂ　’Ｉ’が得られないということが発生している
。このため一種類の１・＋　ＥＴでもってその取扱い得
る信号をプログラマブルに変えることのできるｌｉ’ｌ
　Ｊ、；　ＩＩＩの実現が強く望ｊれるに至っている。FET, especially insulated gate FET (8.IIS FE'
Inuya Inutani has used it as a circuit element in many applications, including memory, and is the basis of the development of today's electronics.In recent years, it has also been widely used in linear circuits. As the range has expanded, the signal levels that can be handled (both voltage and current) have also become more diverse.In contrast, with conventional FETs, the signal levels that can be handled by each product are fixed. , there are several different types of F E depending on the signal level.
'11' must be prepared, and furthermore, the desired F B 'I' cannot be obtained. Therefore, it is possible to programmably change the signals that can be handled by one type of 1+ET.
The realization of J. III has come to be strongly desired.

本発明の目的（は、かかる要望を実現するために、基板
電位をプログラマブルに変化させることによりＦ１号Ｔ
のしきい値電圧を変化させることにより、取扱いイ０る
信−号レベルをプログラマブルに変えられるところの１
・”　Ｅ　Ｔ　ｆ：提供することにある。The purpose of the present invention is to realize the F1 T by programmably changing the substrate potential.
1. The signal level to be handled can be changed programmably by changing the threshold voltage.
・”E T f: To provide.

本発明のＪ・Ｎ　Ｊ５　Ｉｌｌは、基板電位をプログラ
マグルに制御する基板電位制御回路をイ１することがら
なっている。The J.N.J5 Ill of the present invention includes a substrate potential control circuit that programmably controls the substrate potential.

以下本発明についで図面全参照して詳細に説明する。The present invention will be described in detail below with reference to all the drawings.

まず本発明の基礎となるＦ　Ｅ　’］’のしきい値電圧
ＶＴ　と基板電位ＶＢＳの関係について簡単に説明する
。なお以下の説明はＦ　Ｅ　’１’としてＭｏ８　Ｆ’
ＥＴをと力上げて行う。First, the relationship between the threshold voltage VT of F E ']' and the substrate potential VBS, which is the basis of the present invention, will be briefly explained. In addition, in the following explanation, Mo8 F' is assumed to be F E '1'.
Perform ET with all your might.

Ｍｏ８Ｉ”ＥＴのしきい値電圧ＶＴ及びドレイン電流■
ｐはそれぞれ次式で与えられる。Threshold voltage VT and drain current of Mo8I”ET■
p is given by the following equations.

■Ｔ＝ｉ＝■ぐ、−４−に、　　ン’：π）２＄、Σ　
　　　　　　　　　　　　　　・旧・・（１）ＩＤ”β
（ＶＧ　　ＶＴ）’／２　（飽和領域）　　　　−・”
（２）たｙし、 工ぐＩ＋Ｋｔ；材料と構造で定まる定数、％；フェ゛ル
ミ準位（を圧表示）β：利得定数　ＶＧ；ゲート電圧。■T=i=■gu, -4-, n': π) 2$, Σ
・Old...(1) ID"β
(VG VT)'/2 (Saturation region) -・”
(2) Then, I + Kt: constant determined by material and structure, %: Fermi level (expressed as pressure) β: gain constant VG: gate voltage.

（１）式から明らかなようにしきい値電圧ＶＴは基板電
圧Ｖｎｓによって制御できることが分る。この関係を図
示したのが第２図で、　ＶＢＳの値を変え７ＶＢ８＋２
５％の値が点Ａから点Ｂに変えられると、ＶＴはＶＴＡ
からＶＴＢへと増大することを示しである。なお、第１
図はＮチャネル型Ｍ（Ｊ８　　Ｉｉ’ＥＴの基板電圧Ｖ
ＢＳを変えたときのドレイン電流ＩＤの測定回路を示し
たもので、ＶＤＳはドレイン電圧である。As is clear from equation (1), it can be seen that the threshold voltage VT can be controlled by the substrate voltage Vns. This relationship is illustrated in Figure 2, where the value of VBS is changed to 7VB8+2
When a value of 5% is changed from point A to point B, VT becomes VTA
This shows that the value increases from VTB to VTB. In addition, the first
The figure shows the substrate voltage V of N-channel type M (J8 Ii'ET).
This figure shows a circuit for measuring drain current ID when BS is changed, and VDS is the drain voltage.

第３図は本発明の一実ｊｉ［ｉ例の相補型ＭＯ８１ｉ”
ＥＴのプログラマブルＱスレッショルド（論理しきい値
）可変回路を示す。この回路は相補型ＭＯＳインバータ
１ＯＮチヤンネルＦＥ’ｌ’　Ｑ、のソースＳとＶｓｓ
（接地側）端子間に、抵抗Ｒを４個直列に接ｆｔＪ、−
スイッチＳＷ１〜Ｓ　Ｗ　４の切換えによυ任意の抵抗
間の電圧がソースＳに対して基板Ｓ　Ｕ　Ｉ：３にかか
るように゛した基板電位制御回路２を挿入したものであ
る。FIG.
2 shows a programmable Q-threshold (logic threshold) variable circuit for ET. This circuit consists of complementary MOS inverter 1ON channel FE'l' Q, source S and Vss
Connect four resistors R in series between the (ground side) terminals ftJ, -
A substrate potential control circuit 2 is inserted so that a voltage across an arbitrary resistance is applied to the source S and to the substrate SUI:3 by switching the switches SW1 to SW4.

この抵抗几に電流ｉが流れると、Ｑ、＋のソースＳと基
板ＳＵＢ間に電圧が生じて、ソースＳに対して基板ＳＵ
Ｂが逆バイアスされるので前述の第２図に示したように
Ｑ、のしきい値電圧ＶＴは増加する。ＶＴが増加すると
前述の（２）式に従いドレイン電流ＩＤは減少し、その
結果インバータのしきい値軍、圧■Ｔｈが基板電位ＶＢ
ＳがＯｖのときよりも上昇する。従って、第３図に示す
ように抵抗値をスイッチ等によりプログラマブルに可変
にすれば、基板電位Ｖｎｓが変化することにより、イン
バータ回路のしきい値電圧Ｖｒｈがプログラマブルに変
ることになる。When a current i flows through this resistor, a voltage is generated between the source S of Q,+ and the substrate SUB, and the voltage is generated between the source S and the substrate SUB.
Since B is reverse biased, the threshold voltage VT of Q increases as shown in FIG. 2 above. When VT increases, the drain current ID decreases according to equation (2) above, and as a result, the inverter's threshold value, voltage Th, decreases to the substrate potential VB.
This increases compared to when S is Ov. Therefore, if the resistance value is made programmably variable using a switch or the like as shown in FIG. 3, the threshold voltage Vrh of the inverter circuit can be programmably changed by changing the substrate potential Vns.

この実施例においては、スイッチＳＷｌ〜ＳＷ４の組合
せによ、！７第４図に示すようにしきい値電圧Ｖｒｈの
異なる４通ｐの入出力１時性が得られる。な　　　　５
おこの場合のスイッチの組合せは次表のとおシである。In this embodiment, the combination of switches SWl to SW4 allows ! 7 As shown in FIG. 4, four input/output one-time characteristics with different threshold voltages Vrh are obtained. Na 5
The switch combinations in this case are as shown in the table below.

か ２としては通常の抵抗とスイッチとで表わしけれども、
実際にはＭｏ８　Ｆ、ＥＴによる抵抗及びアナログスイ
ッチとしても良いし、あるいは抵抗としては拡散抵抗を
用いても良い。さらに適当なプログラマブルな電圧発生
回路を設けても良い。(2) is expressed by an ordinary resistor and a switch,
In fact, a resistor made of Mo8 F or ET and an analog switch may be used, or a diffused resistor may be used as the resistor. Furthermore, a suitable programmable voltage generation circuit may be provided.

又、以上の説明においてはＦ　Ｅ　ＴとしてＭｏ５Ｆ　
Ｅ　’ｌ’をと９上げたけれども他の１．ｍ　Ｆ　Ｔに
も同様に適用されることはいうまでもない。In addition, in the above explanation, Mo5F is used as FET.
E 'l' was raised by 9, but the other 1. It goes without saying that the same applies to mFT.

以上詳細に説明したとおυ、本発明のＦＥＴは基板電位
をプログラマブルに制御する基板電位制御回路を有して
いるので、一種類のＦ　Ｅ　Ｔでもって取扱い得る信号
レベルをプログラマブルに変えることができる。従って
広範な用途に適応したＦＥ　’１’　′ｆ：提供できる
ことになりその効果は大である。As explained in detail above, since the FET of the present invention has a substrate potential control circuit that programmably controls the substrate potential, it is possible to programmably change the signal level that can be handled by one type of FET. . Therefore, it is possible to provide FE '1''f that is suitable for a wide range of uses, and the effect is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はＭｏ８　Ｉ”Ｅ’Ｌ’の基板電圧Ｖｎｓ対ドレ
イン電流の測定回路図、第２図はＭｏ８　ｌ”ＥＴの基
板電圧■ＢＳとしきい値電圧ＶＴの関係を示す特性曲線
図、第３図は本発明の一実施例の回路図、第４図はこの
一実施例の回路の入出力１時性図である。 ｌ・・・・・・インバータ回路、２・・・・・・基板電
位制御回路、Ｑ、、Ｑ、・・・・・・ＦＥＴ、几・・・
・・・抵抗、ＳＷＩ〜ＳＷ４　・・・・・・スイッチ、
Ｖｔｎ・・・・・・入力電圧、Ｖａｓｔ・・・・・・出
力電圧、ＶＤＤ・・・・・・電源電圧端子、Ｖｓｓ・・
・・・・ソース電源端子、ＩＤ・・・・・・ドレイン電
流、ＶＴ旧〜ＶＴ１１４・・・・・・インバータのしき
い値電圧。 ′−一 ・−一、 的 へ ＼ 「−’−−１ 第３図 巧 端４区Figure 1 is a measurement circuit diagram of substrate voltage Vns versus drain current of Mo8 I"E'L', Figure 2 is a characteristic curve diagram showing the relationship between substrate voltage BS and threshold voltage VT of Mo8 I"ET, FIG. 3 is a circuit diagram of an embodiment of the present invention, and FIG. 4 is an input/output temporal diagram of the circuit of this embodiment. 1... Inverter circuit, 2... Substrate potential control circuit, Q, , Q,... FET, 几...
...Resistance, SWI~SW4 ...Switch,
Vtn...input voltage, Vast...output voltage, VDD...power supply voltage terminal, Vss...
...Source power supply terminal, ID...Drain current, VT old to VT114...Inverter threshold voltage. '-1・-1, To the target \ ``-'--1 Figure 3 Masterpiece 4th section

Claims (1)

【特許請求の範囲】[Claims] 基板電位をプログラマブルに制御する基板電位制御回路
を有することを特徴とする電界効果型半導体装置。A field-effect semiconductor device comprising a substrate potential control circuit that programmably controls a substrate potential.
JP57129928A 1982-07-26 1982-07-26 Field effect semiconductor device Pending JPS5921128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57129928A JPS5921128A (en) 1982-07-26 1982-07-26 Field effect semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57129928A JPS5921128A (en) 1982-07-26 1982-07-26 Field effect semiconductor device

Publications (1)

Publication Number Publication Date
JPS5921128A true JPS5921128A (en) 1984-02-03

Family

ID=15021879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57129928A Pending JPS5921128A (en) 1982-07-26 1982-07-26 Field effect semiconductor device

Country Status (1)

Country Link
JP (1) JPS5921128A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01126822A (en) * 1987-11-12 1989-05-18 Kawasaki Steel Corp Programmable input circuit
JPH04155693A (en) * 1990-10-18 1992-05-28 Nec Ic Microcomput Syst Ltd Data output circuit for semiconductor memory
WO2006027709A2 (en) * 2004-09-08 2006-03-16 Koninklijke Philips Electronics N.V. Fast switching circuit with input hysteresis

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01126822A (en) * 1987-11-12 1989-05-18 Kawasaki Steel Corp Programmable input circuit
JPH04155693A (en) * 1990-10-18 1992-05-28 Nec Ic Microcomput Syst Ltd Data output circuit for semiconductor memory
WO2006027709A2 (en) * 2004-09-08 2006-03-16 Koninklijke Philips Electronics N.V. Fast switching circuit with input hysteresis
WO2006027709A3 (en) * 2004-09-08 2006-08-17 Koninkl Philips Electronics Nv Fast switching circuit with input hysteresis

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