JPS59204307A - Eliminating device of disturbing signal - Google Patents

Eliminating device of disturbing signal

Info

Publication number
JPS59204307A
JPS59204307A JP7913783A JP7913783A JPS59204307A JP S59204307 A JPS59204307 A JP S59204307A JP 7913783 A JP7913783 A JP 7913783A JP 7913783 A JP7913783 A JP 7913783A JP S59204307 A JPS59204307 A JP S59204307A
Authority
JP
Japan
Prior art keywords
conductive patterns
speaker
magnetic body
signals
lead wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7913783A
Other languages
Japanese (ja)
Inventor
Keiichi Fukukawa
福川 佳一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP7913783A priority Critical patent/JPS59204307A/en
Publication of JPS59204307A publication Critical patent/JPS59204307A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H1/0007Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network of radio frequency interference filters

Landscapes

  • Filters And Equalizers (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To secure the ability to exclude an external disturbing signal without exerting any evil influence upon the original performance of an acoustic equipment, by forming part of a signal transmission line of a magnetic body. CONSTITUTION:The 1st and the 2nd conductive patterns 11 and 12 which transmit sound signals are fixed to an insulating substrate 10. Those 1st and the 2nd conductive patterns 11 and 12 are cut partially and their cut parts are connected electrically to a speaker terminal 15 directly or through lead wires 13 and 14. This terminal 15 is connected to a speaker or another acoustic equipment through a connection cord. Further, the lead wires 13 and 14 are inserted by a cylindrical magnetic body 16. Thus, the ability to exclude external disturbing signals is secured without exerting any evil influence upon the original performance of the acoustic equipment.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は音響機器等の入力や出ツノ端子に流入する外部
の妨害信号をV[除するための妨害信号排除装置に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an interference signal eliminating device for eliminating external interference signals flowing into input and output terminals of audio equipment, etc.

[発明の技術的背景どその問題点1 音響機器に流入する外来の妨害信号にはテレビ信号、ア
マチュア無線、ポケットベル等がラジオ受信機に飛び込
む場合や各音響機器間を接続する接続コードへの各種の
雑音信号が飛び込んでしまい、これら外来の妨害信号が
電源ラインに流入し、これが他のテレビ受信機等に妨害
信号となる等の悪影響を与えていた。この影響をなくす
ためには外部接続端子に流入する外来の妨害信号に対し
、’I 50 kllz以−Fの周波数を減衰するよう
に1れはよいとされている。
[Technical background of the invention, etc. Problem 1] External interference signals that flow into audio equipment include television signals, amateur radio, pagers, etc. that jump into radio receivers, and connection cords that connect each audio equipment. Various noise signals jump in, and these external interference signals flow into the power supply line, which has an adverse effect on other television receivers and the like by becoming interference signals. In order to eliminate this effect, it is said that it is better to attenuate the frequencies of 'I 50 kllz and -F for external interference signals flowing into the external connection terminal.

具体的には外来の妨害信号を排除覆るため従来は第1図
に示すような手段で行なわれていた。第1図は増幅器に
利用した例を示すものである。
Specifically, in order to eliminate and cover up external interference signals, conventional methods have been used as shown in FIG. FIG. 1 shows an example of use in an amplifier.

第1図においU、1は入力端子ぐあり、この入力端子1
に印加された音声信号は増幅器2′c増幅されたのち、
コイル(Ll)と抵抗(R+)を並列に介してスピーカ
端子4に導出され、このスピーカ端子4から図示しない
スピーカコードに接続されたスピーカを駆動している。
In Figure 1, U, 1 is an input terminal, and this input terminal 1
After the audio signal applied to the amplifier 2'c is amplified,
It is led out to a speaker terminal 4 via a coil (Ll) and a resistor (R+) in parallel, and drives a speaker connected from this speaker terminal 4 to a speaker cord (not shown).

なおコンデンサ(C1)と(C2)の一方は並列接続し
たコイル(Ll)と抵抗(R1)の両端にそれぞれ接続
し、他方は接地している。このコンデンサ(C1)と(
C2)はローパス回路を構成している。
Note that one of the capacitors (C1) and (C2) is connected to both ends of the parallel-connected coil (Ll) and resistor (R1), respectively, and the other is grounded. This capacitor (C1) and (
C2) constitutes a low-pass circuit.

この第1図で構成された妨害信号排除装置ではスピーカ
端子4から流入する外来の150kHz以上の周波数の
妨害信号(よコンデンサ(C1)、(C2)のローパス
回路により排除されることとなる。しかし、増幅器2の
負荷インピーダンスをRとしたとき外来の150 kH
7,以上の妨害を排除するため共振周波数fは 、f=     1−m− 2π(CI +02 ) R となる。
In the interference signal eliminating device configured as shown in FIG. 1, external interference signals with a frequency of 150 kHz or more flowing in from the speaker terminal 4 are eliminated by the low-pass circuit of capacitors (C1) and (C2). However, , when the load impedance of amplifier 2 is R, the external 150 kHz
7. In order to eliminate the interference above, the resonant frequency f becomes f=1-m-2π(CI+02)R.

一般に増幅器2の負荷インピーダンスは小ざく、共振周
波数fを求めるためにはコンデンサ(C1)、(C2)
の値が犬ぎくなる。このため増幅器2の出ツノ信号路と
接地間に接続した大容量のコンデンサ((CI)、((
ン2)により増幅器とし−Cの周波数特性や歪率が劣化
してしまう欠点を有していlこ 。
Generally, the load impedance of amplifier 2 is small, and in order to find the resonant frequency f, capacitors (C1) and (C2) are used.
The value of is too small. For this reason, a large capacity capacitor ((CI), ((
This has the drawback that the frequency characteristics and distortion factor of the amplifier are degraded due to 2).

[発明の目的] 本発明は上記した問題点を除去したものであり、簡単な
構成で、しかも本来の音響機器の性能への影響を与えず
に外来の妨害信号を排除する能力を確保出来るようにし
た妨害信号排除装置を提供する。
[Object of the Invention] The present invention eliminates the above-mentioned problems, and has a simple configuration that can ensure the ability to eliminate external interference signals without affecting the performance of the original audio equipment. The present invention provides an interference signal eliminating device that has the following features.

[発明の概要・コ 上記の目的を達成するために絶縁基板と、この絶縁基板
に固着された信号を伝送する第1および第2の導電パタ
ーンと、これら第1および第2の導電パターンの一部に
それぞれ介挿されたリード線と、前記第1および第2の
導電パターンに接続した外部接続端子とからなり、前記
各リード線に筒形状の磁性体に挿入し外来の妨害信号を
排除するJ:うにしたものである。
[Summary of the Invention] To achieve the above object, an insulating substrate, first and second conductive patterns for transmitting signals fixed to the insulating substrate, and one of the first and second conductive patterns are provided. It consists of lead wires inserted into the respective parts, and external connection terminals connected to the first and second conductive patterns, and each of the lead wires is inserted into a cylindrical magnetic body to eliminate external interference signals. J: Sea urchin.

[発明の実施例1 以下本発明の一実施例につき図面を参照して詳細に説明
する。
[Embodiment 1 of the Invention] An embodiment of the present invention will be described in detail below with reference to the drawings.

第2図において符号10は絶縁基板、11.12はこの
絶縁基板10に固着され、音声信号を伝送1“る第1お
よび第2の導電パターンを示1もので、これらの第1お
よび第2の導電パターン11.12は一部分が分断され
、この分断された第1および第2の導電パターン11.
12部分をそれぞれリード線13.14で半田付けによ
り接続しη−いる。そしCリード線13.14にて接続
した近傍の第1および第2の導電パターン11.12に
直接あるいはリード線を介し゛(゛スピーカ端子15に
電気的に接続し°Cいる。このスピーカ端子15から接
続用:J−ドを介してスピーカや伯の音響I原器に接続
し−Cいる。
In FIG. 2, reference numeral 10 denotes an insulating substrate, and 11.12 denotes first and second conductive patterns fixed to the insulating substrate 10 and transmitting audio signals. A portion of the conductive patterns 11.12 is divided, and the divided first and second conductive patterns 11.12 are separated.
The 12 parts are connected by soldering with lead wires 13 and 14, respectively. Then, it is electrically connected to the speaker terminal 15 directly or via the lead wire to the first and second conductive patterns 11.12 in the vicinity connected by the C lead wire 13.14. For connection from 15: Connect to a speaker or Haku's acoustic I prototype via J-C.

まl〔16は筒形状の磁性体であり、この磁性体16に
前記リード線13.14を挿入している。
16 is a cylindrical magnetic body, and the lead wires 13 and 14 are inserted into this magnetic body 16.

また磁性体16を形成する材料は具体的には例えばフェ
ライトである。
Further, the material forming the magnetic body 16 is specifically, for example, ferrite.

第3図にa3い゛(符号17は入力端子であり、この入
力端子17に印加された音声信号を増幅器18で増幅し
、コイル(Ll)と抵抗(R+)の並列回路19を介し
−C第2図に示す第1の導電パターン11に接続し、並
列回路19の入力おJ:び出力側にそれぞれコンデンサ
(C1)、(C2)の一方を接続し、他方を共通にして
第2の導電パターン12に接続している。
In Fig. 3, a3 is shown (numeral 17 is an input terminal, the audio signal applied to this input terminal 17 is amplified by an amplifier 18, and is passed through a parallel circuit 19 of a coil (Ll) and a resistor (R+) to -C Connected to the first conductive pattern 11 shown in FIG. It is connected to the conductive pattern 12.

また第4図は第2図および第3図に示した回路の等価回
路で、信号伝送ラインすなわち、第1および第2の導電
パターン11.12の特性インピーダンスと相互インダ
クタンスは無視し、外来の妨害信号電圧を受けない状態
、いわゆる平衡モードで考えている。図中VSは平衡モ
ード電源電圧、(RL )は負荷である。
FIG. 4 is an equivalent circuit of the circuits shown in FIGS. 2 and 3, ignoring the characteristic impedance and mutual inductance of the signal transmission line, that is, the first and second conductive patterns 11 and 12, and excluding external interference. We are thinking in a state where no signal voltage is received, a so-called balanced mode. In the figure, VS is the balanced mode power supply voltage, and (RL) is the load.

上記第4図の等価回路で示す状態において、外来から不
平衡セードの妨害信号電圧が印加されたと仮定すると、
第5図に示すように平衡モ゛−ド電源電圧Vsと不平衡
モード電源電圧Vcからなるネットワークとなる。なお
(Rc+)および(RC2)は信号伝送ラインの平衡モ
ード方向のインピーダンス、(RL)は負荷である。
Assuming that an unbalanced shade disturbance signal voltage is applied from an external source in the state shown in the equivalent circuit of FIG. 4 above,
As shown in FIG. 5, it becomes a network consisting of a balanced mode power supply voltage Vs and an unbalanced mode power supply voltage Vc. Note that (Rc+) and (RC2) are the impedances of the signal transmission line in the balanced mode direction, and (RL) is the load.

ところで、第5図での平衡モード電源電圧VSをOどし
たときの等価回路は第6図で示され、この第6図におい
て、不平衡モード電源電圧Vcによって負荷(RL )
に誘起する電圧VNを求め、イへ号伝送ラインに自己イ
ンダクタンスが[l、[2相互インダクタンスがMなる
インダクター′(磁性体16)を挿入した状態を仮定す
ると次式が成立りる。
By the way, the equivalent circuit when the balanced mode power supply voltage VS in FIG. 5 is lowered is shown in FIG.
Find the voltage VN induced in , and assuming that an inductor' (magnetic material 16) with self inductance [l and [2] mutual inductance M is inserted in the A transmission line, the following equation holds true.

りなわら、 Vc =j ωL、+−1+ +j ω’M−I 2 
+I I RL・・・・・・(1) Vc =jωL 2#T 2 +j ωM−I 1 +
RC212・・・・・・(2) 式(1)、(2)より [、=Vc二工見順ユ上    ・・・・・(3)、j
 θン 1− 2 + Rcz Lr=12=M=1として、式(3)を式(1)に代入
すると、 j ωl−・(Rc 2 +RL )トRc 2  ・
RL・・・・・・(4) VN=II ・RLであるから (jω+RC2、/ L ) となる。但し、11およびI2は第1おにび第2のn 
rfHパターン11.12の信号伝送ラインを流れる電
流である。
Rinawara, Vc =j ωL, +-1+ +j ω'M-I 2
+I I RL... (1) Vc = jωL 2#T 2 +j ωM-I 1 +
RC212・・・・・・(2) From formulas (1) and (2), [,=Vc nikomijunyuu top ・・・(3), j
By substituting equation (3) into equation (1) with θn 1- 2 + Rcz Lr=12=M=1, j ωl-・(Rc 2 +RL )t Rc 2 ・
RL (4) Since VN=II・RL, (jω+RC2,/L). However, 11 and I2 are the first and second n
This is the current flowing through the signal transmission line of rfH pattern 11.12.

この結果を図に現わすと第7図に示すようになる。すな
わち、信号伝送ラインに挿入したインダクターがL>R
C2/ωの関係をもつ値のものであれば、V N / 
V c→0となり、不平衡モードに誘起した妨害信号電
圧は負荷に誘起されなくなることがわかる。
This result is shown in FIG. 7. In other words, the inductor inserted in the signal transmission line is L>R
If the value has a relationship of C2/ω, then V N /
It can be seen that V c becomes 0, and the disturbance signal voltage induced in the unbalanced mode is no longer induced in the load.

従つ゛(、外来の妨害信号があっても信号伝送ラインに
インダクターを挿入したことによつr:電源ラインに流
入せず他の電子機器への妨害信号を排除できる。
Therefore, even if there is an external interference signal, by inserting an inductor into the signal transmission line, the interference signal to other electronic devices can be eliminated without flowing into the power supply line.

ところで、実験の結果磁性体16の取付位置は極力外部
接続端子よりが効果がある。また実施例は増幅器のスピ
ーカ端子への外来の妨害信号の排除についC考えたが、
これに限らず増幅器に接続されるプレー17・チューナ
さらにはテープデツキ用の外部入力端子にも同様の構成
に4で外来の妨害信号の排除を可能とするものである。
By the way, as a result of experiments, it is effective to attach the magnetic body 16 as close to the external connection terminal as possible. In addition, in the embodiment, consideration was given to eliminating external interference signals to the speaker terminal of the amplifier.
The present invention is not limited to this, and a similar configuration 4 can be applied to a player 17 connected to an amplifier, a tuner, and even an external input terminal for a tape deck, thereby making it possible to eliminate external interference signals.

またプレーヤ・チューナあるいはテープデツキ等の各出
ノコ端子にも適用できる。
It can also be applied to various outlet terminals of players, tuners, tape decks, etc.

[発明の効果] 以上記載したように本発明の妨害信号排除装置によれば
、信号伝送ラインの一部を磁性体で形成されたものに挿
入することによって妨害信号にJ、る発生する電圧を打
消してしまうため、外来の妨害信号による電源ラインへ
の流入を排除できるため他の電子奢原器への妨害をなく
すことができるものである。
[Effects of the Invention] As described above, according to the interference signal eliminating device of the present invention, by inserting a part of the signal transmission line into something made of a magnetic material, the voltage generated by J is reduced in the interference signal. Since this cancels out the interference, it is possible to eliminate the inflow of external interference signals into the power supply line, thereby eliminating interference with other electronic stimulators.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の増幅器の回路図、第2図は本発明の一実
施例を示す一部切欠斜祝図、第3図は第2図に接続−り
る増幅器の回路図、第4図は第3図の平衡モードにおC
−Jる等価回路図、第5図は第3図に不平衡モードの状
態を加えた等価回路図、第6図は不平衡モード状態だけ
による等価回路図、第7図は不平衡モードの電圧が負荷
に誘起Jる電圧との関係を示づ特性図である。 10・・・・・・・・・・・・絶縁基板1’1.12・
・・第1および第2の導電パターン13.14・・・リ
ード線 15・・・・・・・・・・・・スピーカ端子16・・・
・・・・・・・・・磁性体 代理人弁理士   須 山 佐 −
Fig. 1 is a circuit diagram of a conventional amplifier, Fig. 2 is a partially cutaway diagram showing an embodiment of the present invention, Fig. 3 is a circuit diagram of an amplifier connected to Fig. 2, and Fig. 4. is C in the equilibrium mode of Figure 3.
-J equivalent circuit diagram, Figure 5 is an equivalent circuit diagram with unbalanced mode added to Figure 3, Figure 6 is an equivalent circuit diagram with only unbalanced mode, Figure 7 is unbalanced mode voltage. FIG. 2 is a characteristic diagram showing the relationship between J and the voltage induced in the load. 10・・・・・・・・・Insulating substrate 1'1.12・
...First and second conductive patterns 13.14...Lead wires 15...Speaker terminals 16...
・・・・・・・・・Patent attorney for magnetic materials Sasa Suyama −

Claims (1)

【特許請求の範囲】[Claims] 絶縁基板と、この絶縁基板に同着された信号を伝送ター
る第1おJ:び第2のS電パターンと、これら第1およ
び第2の導電パターンの一部にそれぞれ介挿されたリー
ド線と、前記第1および第2の導電パターンに接続した
外部接続端子とからなり、前記各リード線に筒形状の磁
性体に挿入し外来の妨害信号を排除するようにしたこと
を特徴とづる妨害信号排除装置。
An insulating substrate, first and second conductive patterns for transmitting signals attached to the insulating substrate, and leads inserted into parts of the first and second conductive patterns, respectively. and an external connection terminal connected to the first and second conductive patterns, and each lead wire is inserted into a cylindrical magnetic body to eliminate external interference signals. Interfering signal elimination device.
JP7913783A 1983-05-06 1983-05-06 Eliminating device of disturbing signal Pending JPS59204307A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7913783A JPS59204307A (en) 1983-05-06 1983-05-06 Eliminating device of disturbing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7913783A JPS59204307A (en) 1983-05-06 1983-05-06 Eliminating device of disturbing signal

Publications (1)

Publication Number Publication Date
JPS59204307A true JPS59204307A (en) 1984-11-19

Family

ID=13681563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7913783A Pending JPS59204307A (en) 1983-05-06 1983-05-06 Eliminating device of disturbing signal

Country Status (1)

Country Link
JP (1) JPS59204307A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005060092A1 (en) * 2003-12-15 2005-06-30 Murata Manufacturing Co., Ltd. Noise filter mounting structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005060092A1 (en) * 2003-12-15 2005-06-30 Murata Manufacturing Co., Ltd. Noise filter mounting structure
US7382216B2 (en) 2003-12-15 2008-06-03 Murata Manufacturing Co., Ltd Noise filter mounting structure

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