JPS59202774A - Focusing detector in image sensor - Google Patents

Abstract

PURPOSE:To attain clearly and accurately focusing through the detection of change in numeric display by digitizing a video signal from a CCD camera. generating a detecting signal representing the timing difference from a predetermined low level to a high level, and detecting the focusing position with a position minimizing the digital display based on the said detecting signal. CONSTITUTION:The detector consists of the 1st circuit 4 for detecting reference position multiple, the 2nd circuit 5 for focusing detection, the 3rd circuit 6 including a down- counter 9 for detecting optical level. a switch circuit 7 including contacts 7a-7c to select and activate the said circuits 4,5,6 and a counter 8 counting the number of generation of detecting signals SA, SB and SC from the said circuits 4, 5, 6 in one scanning of a CCD sensor face 2 and transmitting its integrated value to a digital display device C so as to display result digitally. The 1st circuit 4 is activated so as to make the center position of a measured position coincident with a center position of a camera, and after a test pattern is placed to the center position of the measured part, the 3rd circuit 6 is activated, an optical level is detected to detect an optical level, and after a power supply voltage P5 and other adjusting elements are adjusted so as to obtain a maximum level by the presence of the test pattern, the focusing by the 2nd circuit 5 is performed.

Description

[Detailed Description of the Invention] Focusing in the present A sh n % image sensor device? , and is intended to be displayed digitally.

In the conventional focusing device, since the display is based on a change in a geometric figure, a specialized technique for detecting focusing is required.

Misfire F! A is a digital display that allows even those without interrogation technology to detect the synchronization by decreasing the displayed value, thereby eliminating the drawbacks of the conventional device described above, and using a CCD camera. Taking advantage of the fact that the video signal changes from a low slope chevron to a sharp pulse, the digital display clearly shows the timing between the low level value (! - high level value). The device focuses and displays all detections by decreasing the number displayed on the device.

The embodiments shown in the drawings will be explained below.

FIG. 1 shows an example of an image sensor device used in carrying out the present invention, including a photoelectric conversion camera (CCD camera).
(A), a control device (B), and a digital display device (Q).The CCD camera (A) has a photoelectric conversion element assembly [CCD (cha)
The linear image sensor (2) is self-coupled, and the CCU, drive circuit (g), and digital display device C) are installed internally.

A large number of photoelectric conversion elements (for example, photodiodes) (3) are arranged in parallel on the photoelectric conversion element assembly CD).
CCD SE: Y-Y-plane (2) Number of pixels 'i, 128 pixels, 2o48 pixels, 3648 pixels Equal pixel % CCD sensor surface (2) Number of photoelectric conversion elements (photodiodes) (3) that make up the entire structure are set to 128, 2048, 3648, etc., corresponding to the number of pixels mentioned above. Therefore, the number of pixels is 2048 (the number of photodiodes is 2048)
Then fc failure, 1024 at the center of CCD sensor surface (2)
The width of the CCD sensor surface (2) is the product of the width of each pixel (the width of the photodiode) (d) and the prime number of one surface: 2048. That is, W = 2048X
d.

Lens +1 [Selecting the imaging length of the imaging area for the object to be measured, using a replacement lens group instead, ie.

Selection of magnification is arbitrary.

The CCD camera (8) is attached to and supported by a support at an appropriate location facing the point to be measured, and is adjustable by means of arm fixing means, etc.

Digital display device (LED numeric display mechanism) (C) is C
The CD camera is installed on the back of the prisoner, and while looking at the LED numerical display on the back of the CCD camera, the camera position (also t/'
By adjusting the movement of the object to be measured and adjusting the lens mechanism, it is possible to align the camera center, adjust the magnification, and adjust the focus.

Control device (l refers to the video control unit (old) and main control unit, as shown in Figure 1) (B2) Including the signals obtained from the CCD camera and the necessary items depending on the purpose. Extract only that, calculate -PIIU
The display device sends signals to the external device to send or receive signals, or to display those values, but as a control power source for both units (Bl) and (B2). A power supply unit with a built-in switching regulator (not shown) and a main control unit (not shown) that receives the operations of external sequences and limit switches and converts them appropriately.
B2) is sent to fc, which has a control input/output circuit (not shown) that has a circuit that converts and outputs the output from the main control unit to operate an external relay or solenoid, as well as upper and lower limits of operation and comparison. A digital switch input crab knit (not shown) for inputting reference positions for judgment, etc. is added. The main control unit) (B2) receives the signal from the video control unit (Bl) according to the program programmed in advance, calculates and judges i'L, and sends those values to the outside. , and 2 reception of instructions from the outside functions to satisfy the conditions of calculation and judgment.This is done in sequence by the Z-80 CPU and FROM.

Movement I of the CCD camera (5) with respect to the photoelectric conversion element (3)
Control of the clock signal for the clock signal E' is carried out by the CCD drive circuit (E)K in the CCD camera (5), but in order to implement the present invention, the detection circuit shown in FIG. In Fig. 3, the signal (A) is input from the CCD drive circuit (E), and the signal (B) is sent to the control device (B).

The video signal from the CCD camera (N's CCD linear image 7-sensor circle) is divided into 16 equal optical levels and is converted into a 4-bit signal V.
DA, VDB, VDQ, VDD T supply,
Le. From the CCD Fig fJ circuit (5), the above video signal, a measurement signal (MJ) indicating that measurement is in progress, and a clock signal ψ0. ψIIψR1 scan start signal (STO
), end scan signal (EO5), etc., in order to implement the present invention, (BR) k C for driving the photoelectric conversion element (3) at the reference position of the CCD sensor surface (2).
The CD drive circuit (E) generates the signal and supplies the signal to the detection circuit (F).

The detection circuit [B] is at the reference position as shown in Figure 3.

A first circuit (4) for magnification detection, a second circuit (5) for focus detection, a third circuit (6) including a down counter (9) for optical level detection, and the above circuit (4). )(5)
The first contact (7a) and the second contact for selectively operating (6)
A switch circuit (7) including a contact (7b) and a third contact (7c), and detection signals (SA) (SB) (So) 'x CCD sensor surface ( 2) - includes a counter (8) for counting the number of occurrences during scanning and transmitting the integrated value m[QK for digital display.

Regarding the above-mentioned detection circuit CF+, the reference position is: The channel 1 circuit (4) for magnification extraction will be explained.

Measurement Ifi No. (MJ) and Video Master's 2-8 level V
The output signal Szk of the AND circuit (12) of the AND circuit (11) with the DD and the first half signal is inputted to the PS terminal of the flip-flop (1), and the output signal of the AND circuit (12) is input to the flip-flop (
End scan signal (EO5) to the CL terminal of +3)
? ! - Manpower. In the AND circuit, the negation of the encoder signal S1 and the second half signal (BR) are ANDed, the output signal S3 of 1tV +14), the output signal S4 of the Q terminal of the 7 lip-flop (13), and the 'k AND circuit α5) Vc large input, The first half signal (FL) and the output signal S5 of the Q terminal on the 7th rig flop side are input to an AND circuit θ6). ANro road α~
output signal S6't of flip-flop θη to CL terminal of M mountain circuit Q6) output signal S7'& flip-flop 0
7) input to the PS terminal. flip flop (+7)
Q terminal and arithmetic terminal fl, digital display device (q LED code display circuit (10) on the back of CCD camera (2)
)It is connected to the.

AND circuit (15) (16) (D output signal Ss +
S 7 ttx * oR times HHtg large input, its output, clock reference signal ψ0 and "f" AND circuit (19)
A first detection signal (SA) is obtained from the VC input, and the first detection signal (SA) is supplied to an OR circuit.

In this way, the corresponding relationship between whether or not the image of the test pattern exists in the imaging area (CCD sensor surface) and the generation of the count signal (detection signal) to the counter can be reversed before and after scanning the reference position of the imaging area. Then, a clock signal k%l is generated as a detection signal (SA) corresponding to the number of pixels of the CCD sensor at which the edge of the test pattern is offset from the reference position (distance between the two) K.

Second circuit (5) for focus detection, which is the main part of the present invention
Then, with reference to FIG. 3, the output signal S15 from the Q terminal of the flip block 1) of the video signal B is provided, indicating that the measurement is in progress. The signal (MJ) is input to the AND circuit (z signal and the presence of both signals (Ml r S ls ) generates the signal 516, and the M output lock (g signal ψl is input to the AND circuit (23), The AND circuit (fourth t) sends the second detection signals S and B to the OR circuit (20).

Thus, in the second circuit (5) - for each run, from 2 levels of the video signal (presence of VDB) to 12 levels (Vc and V
Existence of DD; 22+23=4+8=12) t
The second detection signal sB is generated by using the clock signal generated at the timing of .

Next, the third circuit (6) will be explained. Referring to Figure 3,
Down counter (9), NAND AND circuit, AND circuit example (including 281 and flip 70 block η, CC
A BR multiplied signal is generated by the travel tray at the center point of the D sensor, and by ANDing it with the measurement signal (MJ), the down counter (9) is held in the hold state until the signal S21 enters the flip lock 7), and the input of the signal S21 is 7 lip flops 2
7) is preset, a down counter (
9) KX2 AND the signal object indicating the stored count number
A third detection signal So generated by D is sent to the NANDAND circuit.

When any of the first detection signals (SA, SB, and Sc) consisting of the clock signal of the AND constant is input, (6) an output signal Sk is generated and sent to the counter.

The third circuit (6) fl for optical level detection detects the optical level at the center point of the CCD sensor for digital measurement, and activates the first circuit (4) to detect the center position of the rectangular measuring board. Align the center position of the camera @, then place the last pattern on the center of the measurement point, and then move to the third circuit (6).
After detecting the optical level and adjusting the power supply voltage P5 and other A adjustment elements so that the level reaches the maximum level due to the presence of the test pattern, focusing is performed by the second circuit (5).

Eishi (In Dashu, the video signal is divided into 16 equal parts, and the 2°2.2,2 4-bit signal 'i VDl), VDQ
, VDB, VDA K supply 4 8 12 VDB Hn+π=π. Therefore, 12
The detection signal SB exists between 1 and 75%.

Therefore, as shown in Fig. 4(a), for a bidet/j-signal with a gentle slope, the number of times the clock signal ψ1 is applied to the cassonta (8) is large, but for a waveform with a steep slope, For a video signal, as shown in FIG. 4(b), the operating time of the detection circuit (5) is short and is reduced to the number of clock signals ψl sent to the counter (8).

Generally, when the focus is in the correct position, the digital display F
Completion of focusing is detected by a decrease (approaching zero) in the digital display of i neck (Cl).

As described above, the present invention digitizes a video signal from a CCD camera, generates a detection signal indicating a timing difference from a predetermined low level to a high level, and
The position that minimizes the digital display based on the detection signal
Since the focus position is detected by
The minimum focus point wh on the digital display can be detected as the focus point, and compared to the conventional method of detecting the focus point l by changing the figure, it is possible to focus clearly and accurately by detecting changes in the numerical display. be.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing the outline of an image sensor device. Second
The figure is a perspective view of a photoelectric conversion element assembly. FIG. 3 is a circuit diagram showing an example of a detection circuit used to implement the present invention. Fig. 4 is a schematic diagram showing the focusing detection function of the camera according to the present invention (Fig. aJ is an out-of-focus state, (b)
Each figure shows a state in which the images are almost in focus. A...CCD camera C...Digital display device D...Photoelectric conversion element assembly F...Detection circuit ψ...Clock signal VDA・・・・・・Digitized video signal (2°=
1) VD, B... digitized video signal (
2"-=2) vDC... Digitized video signal (22=4) VDD... Digitized video signal (23=8) MJ... Measurement signal BR ...Second detection signal sB...Second detection signal (focusing signal) 2
... CCD sensor surface 5 ... Second detection circuit (focusing detection circuit)
1 Taue person Toyonaka Research Co., Ltd. d people
Patent Attorney Fumiyu Hidemura 1 Figure 1 Figure 2 Figure 4 (a) ■ 3 da+ (b) 50

Claims (1)

[Claims] A video signal from a CCD camera is digitized and inputted, and the digitized video signal is set in advance.
The timing amount between the level value and the low level value is detected and a number of clock signals corresponding to the timing difference are output as detection signals. A detection circuit (5) for focusing is provided, and a digital display device fj (Q'
A focus detection device for an image sensor device, characterized in that it detects a decrease or decrease in a count display for each run.