JPS59202743A - Transmitting and receiving device - Google Patents

Transmitting and receiving device

Info

Publication number
JPS59202743A
JPS59202743A JP7778283A JP7778283A JPS59202743A JP S59202743 A JPS59202743 A JP S59202743A JP 7778283 A JP7778283 A JP 7778283A JP 7778283 A JP7778283 A JP 7778283A JP S59202743 A JPS59202743 A JP S59202743A
Authority
JP
Japan
Prior art keywords
circuit
signal
transmitting
receiving
receiving device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7778283A
Other languages
Japanese (ja)
Inventor
Shunichi Nagamoto
俊一 長本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7778283A priority Critical patent/JPS59202743A/en
Publication of JPS59202743A publication Critical patent/JPS59202743A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/54Systems for transmission via power distribution lines
    • H04B3/542Systems for transmission via power distribution lines the information being in digital form
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5404Methods of transmitting or receiving signals via power distribution lines
    • H04B2203/5416Methods of transmitting or receiving signals via power distribution lines by adding signals to the wave form of the power source
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5462Systems for power line communications
    • H04B2203/5483Systems for power line communications using coupling circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5462Systems for power line communications
    • H04B2203/5491Systems for power line communications using filtering and bypassing

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Remote Monitoring And Control Of Power-Distribution Networks (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To simplify the configuration of a circuit and to apply a titled device to a home electric appliance by using in common a carrier signal for superposing an information signal, and a clock signal to a transmitting and receiving digital logical circuit for managing the transmission and reception of a signal. CONSTITUTION:In a power source supply side transmitting and receiving device 1, a signal superposing and separating circuit 10 executes a superposition and a separation of a power source VB and an information signal. It is executed by setting a capacity of a capacitor 8, and an equivalent inductance seen from the secondary winding side of a transformer 6 to a suitable value. A base band signal (DATA) of an information signal outputted from a transmitting and receiving digital logical circuit 14, and a carrier signal (CARRIER) outputted from an oscillating circuit 13 are inputted to a modulating circuit 11, and the signals are modulated to drive the transformer 6 of the signal supperposing and separating circuit 10 and to superpose the information signal on a transmission line. On the contrary, the information signal transmitted from other transmitting and receiving device through transmission lines 5a, 5b is separated and detected from a power source component by the signal superposing and separating circuit 10 to be inputted to a demodulating circuit 12. A rectangular pulse outputted from the oscillating circuit 13 is provided as a carrier signal to the modulating circuit 11, and also inputted as the clock signal of the transmitting and receiving digital logical circuit 14.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ガス給湯機2万油ボイラーなどを遠隔操作す
るためのリモコンシステムに応用tべき送受信装置に係
り、特に情報信号をキャリア信号で変調して、電源供給
線路上に載せて伝送するに好適な送受信装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a transmitting/receiving device that can be applied to a remote control system for remotely controlling gas water heaters, 20,000 oil boilers, etc. The present invention relates to a transmitting/receiving device suitable for being mounted on a power supply line for transmission.

従来例の構成とその問題点 従来、ガス給湯機2万油ボイラーなどを遠隔制御する場
合、機器本体から専用の信号線を延長し、その先に、ス
イッチ類1表示うンプ類を取付けるという構成が最も初
歩的であり、商品化も数多くなされている。しかしこの
ような構成では、信号線の数が多くなって配線工事が繁
雑になるという欠点があった。特に、複数のリモコンを
接続して、いろいろな場所から遠隔制御しようとする場
合には、前述の信号線延長方式では対応できなかった。
Conventional configuration and its problems Conventionally, when remotely controlling a gas water heater, 20,000 oil boiler, etc., a dedicated signal line was extended from the equipment itself, and a switch and one display lamp were installed at the end of the signal line. is the most rudimentary, and many products have been commercialized. However, such a configuration has the drawback that the number of signal lines increases, making wiring work complicated. In particular, when connecting multiple remote controllers to perform remote control from various locations, the signal line extension method described above cannot be used.

そこで、ディジタル信号伝送技術および有線通信技術を
取り入れて、伝送すべき情報信号をディジタルのビット
に対応させ、かつ、一対の伝送線上で、電源供給と情報
信号の伝送を行なうという遠隔制御方式が考えられる。
Therefore, we came up with a remote control method that incorporates digital signal transmission technology and wired communication technology, makes the information signal to be transmitted correspond to digital bits, and supplies power and transmits the information signal over a pair of transmission lines. It will be done.

しかし、このようなディジタル信号伝送技術および有線
通信技術をガス給湯機2右油ボイラーなどの家庭用電気
機器のリモコンシステムに取り入れて商品化するために
は、従来、コスト的な面で解決すべき問題点があった。
However, in order to incorporate and commercialize such digital signal transmission technology and wired communication technology into remote control systems for household electric appliances such as gas water heaters and oil boilers, there have traditionally been problems in terms of cost. There was a problem.

すなわち、その機器・機能が最少で適性なコストで実現
できるか否かにかかっていると言っても過言ではない。
In other words, it is no exaggeration to say that it depends on whether the equipment/function can be realized at the lowest possible cost.

この要件の中には、直材が安価で、全ての部品が小さな
リモコンのケースの中に収納されなければならないとい
う内容は勿論含まれるし、その他に、量産時、検齋およ
び管理が容易でそのためのコストが安価であるという内
容も含丑れる。
These requirements include, of course, that direct materials must be cheap, all parts must be housed in a small remote control case, and they must also be easy to inspect and manage during mass production. It also includes the fact that the cost for doing so is low.

発明の目的 本発明は、上記のようなディジタル信号伝送および有線
通信技術を家庭用電気機器などの民生機器分野の商品に
応用したときのコスト的な問題点を解決しようとするも
のであり、特に、回路構成をシンプルにして、コストを
安くするとともに、量産時の検査2よび管理工数の少な
い送受信装置を提供し、ガス給湯機2右油ボイラーなど
のぼ履用電気機器への応用を図ることを目的とするもの
である。
Purpose of the Invention The present invention seeks to solve cost problems when applying digital signal transmission and wired communication technology as described above to products in the field of consumer electronics such as household electrical equipment. To provide a transmitting/receiving device that has a simple circuit configuration, reduces costs, and requires less inspection and management time during mass production, and is intended to be applied to electric equipment such as gas water heaters and oil boilers. The purpose is to

発明の構成 本発明は、一対の伝送線で、電源供給と情報の伝送を行
なうための信号重畳分離回路と、他の送受信装置へ送信
するための情報信号に変調をかけ、狭帯域で伝送するた
めの変調回路、他の送受信装置から受信した変調されて
いる情報信号を復調するための復調回路、上記入出力さ
れる情報信号の授受を予め約束された通信規約にのっと
り管理するための送受信ディジタル論理回路および、前
記送受信ディジタル論理回路へクロック信号を、又変調
回路にキャリア信号を与えるための発振回路で変調され
るもので、待に、発振回路から出力される矩形パルスを
クロック信号とキャリア信号で共用した構成とするもの
である。
Structure of the Invention The present invention uses a pair of transmission lines to modulate a signal superimposition/separation circuit for supplying power and transmitting information, and to modulate an information signal to be transmitted to another transmitting/receiving device, and transmitting the signal in a narrow band. a demodulation circuit for demodulating modulated information signals received from other transmitting/receiving devices, and a transmitting/receiving digital circuit for managing the transmission and reception of the input/output information signals in accordance with pre-agreed communication rules. It is modulated by a logic circuit and an oscillation circuit that provides a clock signal to the transmitting/receiving digital logic circuit and a carrier signal to the modulation circuit. The configuration is shared by both.

実施例の説明 本発明の一実施例を第1図(a) I (b)に示す。Description of examples An embodiment of the present invention is shown in FIGS. 1(a) and 1(b).

第1図(a)はnm用′厄源八へ100VK接続される
等により、電源供給源を荷し、他の送受信装置へ電源を
供給する側の送受信装置を、又、第1図(b)は逆にl
E源を受給する側の送受信装置を示すものである。
Figure 1(a) shows a transmitting/receiving device that carries a power supply source and supplies power to other transmitting/receiving devices by connecting a 100VK to the ``Yakugenpachi'' for nm, and Figure 1(b) ) is conversely l
This figure shows a transmitting/receiving device receiving an E source.

第1図(a)において、1は電源供給側の送受信装耐全
体の構成を示し、端子2a、2bを介して商用岨源へc
100■に接続される。3は′准源回路工てあり、Ac
10OV入力を′電子回路動作に必要な丙えは→−12
V、+5Vなどのような直流′間圧に変換したり、電源
受給側の送受信装置へ伝送するための′−源VB Kf
侠するものである。
In FIG. 1(a), 1 indicates the entire configuration of the transmitter/receiver on the power supply side, which connects C to the commercial power source via terminals 2a and 2b.
Connected to 100■. 3 has 'junior circuit engineering', Ac
10OV input is required for electronic circuit operation →-12
- source VB Kf for converting to DC voltage such as V, +5V, etc., and transmitting it to the transmitting/receiving device on the power supply side.
It is something to be admired.

端子4a、4bは伝送線sa、5bを接続して、他の送
受信装置への電源供給および情報信号を送受するための
ものであり、信号重畳分離回路10−を介して、前記電
源VBの両端7a、7bに接続される。
The terminals 4a and 4b are for connecting the transmission lines sa and 5b to supply power to other transmitting/receiving devices and for transmitting and receiving information signals, and are connected to both ends of the power supply VB via the signal superimposition/separation circuit 10-. 7a and 7b.

信号重畳分離回路1oにおいて、電源VBと並列にコン
デンサ8が、伝送、腺を直列にトランス6の2次巻線6
bが接続されており、電源■Bと情報信号の重畳・分離
が行なわれる。
In the signal superimposition/separation circuit 1o, a capacitor 8 is connected in parallel to the power supply VB, and a secondary winding 6 of a transformer 6 is connected in series to the power supply VB.
b is connected, and superimposition and separation of the power supply B and the information signal is performed.

すなわち、コンデンサ8の容ff1C+ トランス6の
2次巻線側から見た等価インダクタンスLを適切な値に
設定することにより、周波数fに対するそれぞれのイン
ピーダンスZ c 、 Z Lを第2図のような特性に
することができる。今、電源VBの周波数を11、情報
信号の周波数を12とすると、周波a flにおいて、
Zc〉〉ZL1周波e f 2においては、ZL〉〉Z
cとなり、コンデンサ8の両側には、はとんど電源VB
の成分だけが、又トランス6の2次巻線6bの両端には
、はとんと情報信号成分だけが現われるという良く大目
られた電気回路の原理によって、電源VBと情報信号を
分離するものである。尚、前記周波数f2がキャリア周
波数となる。
That is, by setting the capacitor 8's capacitance ff1C + the equivalent inductance L seen from the secondary winding side of the transformer 6 to appropriate values, the respective impedances Z c and Z L with respect to the frequency f have the characteristics as shown in Fig. 2. It can be done. Now, if the frequency of the power supply VB is 11 and the frequency of the information signal is 12, then at the frequency a fl,
Zc〉〉ZL1 frequency e f 2, ZL〉〉Z
c, and on both sides of capacitor 8, the power supply VB
The power supply VB and the information signal are separated by the well-acclaimed electric circuit principle that only the information signal component appears at both ends of the secondary winding 6b of the transformer 6. . Note that the frequency f2 becomes a carrier frequency.

トランス6の1次巻線6aの両端には、同調用コンデン
サ9を設けて、情報信号の授受に周波数選択性を持たせ
ている。又、変UA9回路11、護調回路12が接続さ
れている。
Tuning capacitors 9 are provided at both ends of the primary winding 6a of the transformer 6 to impart frequency selectivity to the transmission and reception of information signals. Further, a variable UA9 circuit 11 and a guard circuit 12 are connected.

変調回路11には、送受信ティシタル論理回路14の出
力端子(OUT )  から出力される情報信号のベー
スバンド信号(DATA)と、発振回路13から出力さ
れるキャリア信号(CARRIER)か人力され、変n
^1された後、信号重畳分離回路10のトランス6をド
ライブし、伝送線上に情報信号が載せられる。
The modulation circuit 11 receives the baseband signal (DATA) of the information signal outputted from the output terminal (OUT) of the transmitting/receiving digital logic circuit 14 and the carrier signal (CARRIER) outputted from the oscillation circuit 13.
^1, the transformer 6 of the signal superimposition/separation circuit 10 is driven, and the information signal is placed on the transmission line.

逆に伝送線sa、sbを経て他の送受信装置から伝送さ
れてきた情報信号は、信号重畳分離回路10て4 k成
分と分離検出された後、復調回路12に入力される。復
調回路12によって、再び元のベースバンド信号に復元
された情報信号は、1〕力記送受信ディジタル論理回路
14の入力端子(I N )から人力され、処理される
Conversely, information signals transmitted from other transmitting/receiving devices via transmission lines sa and sb are separated and detected as 4k components by a signal superimposition/separation circuit 10 and then input to a demodulation circuit 12. The information signal restored to the original baseband signal by the demodulation circuit 12 is input manually from the input terminal (I N ) of the input/transmit/receive digital logic circuit 14 and processed.

送受信ディジタル論理回路14は、後述する予め約束さ
れた通信規約にのっとり、情報信号の授受を管理する他
、LED、キー、スイッチ、リレー、ボリューム、セン
サー類などでイ皆成される入出力回路15との間で入出
力情報の授受を行なうものである。この入出力情報(は
送受信ディジタル論理回路14を介して、遠く離れた他
の送受信装置との間で相互に又借されるものである。
The transmitting/receiving digital logic circuit 14 manages the transmission and reception of information signals in accordance with the pre-agreed communication rules to be described later, as well as the input/output circuit 15 which is made up of LEDs, keys, switches, relays, volumes, sensors, etc. It exchanges input/output information with the . This input/output information is mutually borrowed between other far away transmitting/receiving devices via the transmitting/receiving digital logic circuit 14.

又、前述の発振回路13から出力される矩形パルスは、
変調回路11ヘキャリア信号として与えられる他、送受
信ディジタル論理回路14のクロック信号として入力さ
れる。尚、送受信ディジタル論理回路14にマイクロコ
ンピュータを利用ずれは好適である。
Moreover, the rectangular pulse output from the oscillation circuit 13 mentioned above is
In addition to being given as a carrier signal to the modulation circuit 11, it is also input as a clock signal to the transmitting/receiving digital logic circuit 14. Note that it is preferable to use a microcomputer for the transmitting/receiving digital logic circuit 14.

次に第1図(b)において、16は電源受給IIj1]
の送受信装置全体の構成を示す。端子17a、1Ybに
は伝送線5a、5bが接続され、伝送されてぎた電源の
受給および情報信号の入出力か行なわれる。電源と情報
信号の分離手段は第1図(a)で説明した通りであり、
コンデンサ8の両端に現われる電源VBを電源回路H1
8によって、例えば→−12V、+sVなどの安定化さ
れた直流電圧に変換し、電源受給f141の送受信装置
16全体を動作させるものである。
Next, in FIG. 1(b), 16 is the power supply IIj1]
The overall configuration of the transmitter/receiver is shown below. Transmission lines 5a, 5b are connected to the terminals 17a, 1Yb, and receive transmitted power and input/output information signals. The power source and information signal separation means are as explained in Fig. 1(a),
The power supply VB appearing at both ends of the capacitor 8 is connected to the power supply circuit H1.
8, the DC voltage is converted into a stabilized DC voltage of, for example, -12V, +sV, and the entire transmitting/receiving device 16 of the power supply f141 is operated.

1゛1Lの回路ブロックについて(は、第11.1(a
)において説明した内容と全く同じであるので省略する
Regarding the circuit block of 1゛1L (see Section 11.1(a)
), so it will be omitted here.

尚、同−促成ブロックについては、同−at号を用いて
いる。
Note that the same-at number is used for the same-promotion block.

次に、第3図に前記送受信ティジタル論理回路14とし
て、クロック発振回路19を内蔵したマイクロコンピュ
ータ14aを使用した別の実方也例を示す。
Next, FIG. 3 shows another practical example in which a microcomputer 14a having a built-in clock oscillation circuit 19 is used as the transmitting/receiving digital logic circuit 14.

一般(7C、クロック発振回路19は、イノバータ素子
198″′c構成されており、その人力および出力かマ
イクロコンピュータ14aの端子20a。
General (7C) The clock oscillation circuit 19 is composed of an inverter element 198'''c, and its power and output are connected to the terminal 20a of the microcomputer 14a.

20bに接続されている。通1・9マ、これら端子20
a。
20b. Through terminals 1 and 9, these terminals are 20
a.

20 b i/(:ば、水晶、セラミック発づ原子ある
しはコンテンザ、抵抗などの発振素子21を接続するこ
と(lこよって、発振させるものである。
20 b i/(: For example, to connect an oscillating element 21 such as a crystal, a ceramic emitting atom or condenser, or a resistor (l) to cause oscillation.

図中、22はエミノタンオロヮ回路等でっ構成したイン
ピーダンス変換回路であり、端子20bより出力される
発振回路19の出力信号をバッファリンクして、キャリ
ア信号(CARRIER)を作り、変調回路11に出方
するものである。
In the figure, 22 is an impedance conversion circuit composed of an Eminotanoro circuit, etc., which buffer-links the output signal of the oscillation circuit 19 outputted from the terminal 20b to create a carrier signal (CARRIER), which is output to the modulation circuit 11. It is something to do.

第4図は、送受信する情報信号の信号パケット構成の実
施例を、又第5図には、情報4−F5号を構成する単位
符号の天施例を示す。
FIG. 4 shows an example of a signal packet structure of an information signal to be transmitted and received, and FIG. 5 shows an example of a unit code forming information No. 4-F5.

第4図において、信号パケットの開始は同」g1コード
23が2ビツト長で設けられており、第5図(C)のよ
うな特列sなビットパターンを割り当てている。この間
J■コードのビットパターンは、1ビツト長をTとする
論al l= 11Iが 、/2 T1論J、jlj 
” O”が /2Tで構成されそれ以降のテストネーシ
ョンアドレス24、データ25、エラーfエツジ26の
各フィールドでは、決して現われないパターンとしてい
る。すなわち、デストネーションアト゛レス24以降は
、第5図(a) 、 (b)のように−Tの所で論理が
反転する二連返照符号を用いており、それらの組み合わ
せでは、上記の同期コードのヒントパターンを取ること
はない。
In FIG. 4, at the beginning of the signal packet, a 2-bit length g1 code 23 is provided, and a special bit pattern as shown in FIG. 5(C) is assigned. During this time, the bit pattern of the J■ code is as follows, where T is the 1-bit length, and /2 T1 theory J, jlj
"O" consists of /2T and is a pattern that never appears in the following fields of test nation address 24, data 25, and error f edge 26. In other words, from destination address 24 onwards, double reference codes whose logic is inverted at -T as shown in Figures 5(a) and (b) are used, and in these combinations, the synchronization code described above is Never take a hint pattern.

このような単位符号、信号パケット構成の情報信号が前
記送受信ティジタル論理回路14にょってヒントシリア
ルに入出力され、各送受信装置間のVf *U 父侠が
行なわれるものである。
Information signals having such a unit code and signal packet configuration are inputted and outputted in a hint serial manner by the transmitting/receiving digital logic circuit 14, and Vf*U transmission between each transmitting/receiving device is performed.

以上の説明で明らかなように、単位符号すなわち、信号
の1ビツト長“fを構成したり、又判定するための基準
時間となるクロック信号の周波数稍一度が、送受信の信
頼性に影響することが明らかである。
As is clear from the above explanation, the frequency variation of the clock signal that constitutes the unit code, that is, the 1-bit length "f" of the signal, and serves as the reference time for determination, affects the reliability of transmission and reception. is clear.

又、一般に前記伝送線との間で情報信号の人出力を行な
うための信号重畳分離回路10は、情報信号を狭帯域で
伝送するために周波数ボ択性をイイしており、所定の周
波数成分しか通さないという性質をイイする。従って、
情報信号を変調するためのキャリア信号の周波数精度も
送受信の信頼性に影響を及ぼすものであり、遺産時営理
をする必要のある項目である。
Generally, the signal superimposition and separation circuit 10 for outputting information signals between the transmission line and the transmission line has good frequency selectivity in order to transmit information signals in a narrow band. I like the property of only letting it pass. Therefore,
The frequency accuracy of the carrier signal for modulating the information signal also affects the reliability of transmission and reception, and is an item that needs to be managed in case of inheritance.

発明の効果 以上の詳細な説明で明らかなように、本発明は′電源供
給線路上に、情報信号を重畳させるためのキャリア信号
と、予め約束された通信規約にのっとり、信号の授受を
管理するための送受信ディジタル論理回路へのクロック
信号を共用する構成とするものであり、次のような効果
がある。
Effects of the Invention As is clear from the detailed explanation above, the present invention provides a carrier signal for superimposing an information signal on a power supply line, and management of signal transmission and reception in accordance with a pre-agreed communication protocol. This configuration shares the clock signal to the transmitting and receiving digital logic circuits for the purpose of transmitting and receiving data, and has the following effects.

■ 第1に、唯1つの発振回路の発振周波数を管理すれ
ばよいので、検査、調整が非常にtMJ車であり、それ
に要するコストが少なくて済む。
First, since it is only necessary to manage the oscillation frequency of one oscillation circuit, inspection and adjustment can be carried out in a very tMJ manner, and the cost required for this can be reduced.

■ 部品点数が少なくなるので、直材コストが下ること
は切論のこと、リモコン那のケースを小さくすることが
できる。
■ Since the number of parts is reduced, it is obvious that the cost of direct materials will be reduced, and the case of the remote control can be made smaller.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a) 、 (b)l′i本発明の一実施例を示
す送受イ」装置の回路構成図、第2図は同信号分離の原
理を1・・・・・・送受信装置(電源供給側)5a 、
sb・・・・・伝送線、10・・・・・・信号重畳分離
回路、11・・・・・・変調回路、12・・・・・・復
調回路、13・・・・・・発振回路、14・・・・・・
送受信ディジタル論理回路、16・・・・・送受信装置
(電源受給側)。
Figures 1 (a) and (b) are circuit configuration diagrams of a transmitting/receiving device showing an embodiment of the present invention. power supply side) 5a,
sb...Transmission line, 10...Signal superposition/separation circuit, 11...Modulation circuit, 12...Demodulation circuit, 13...Oscillation circuit , 14...
Transmitting/receiving digital logic circuit, 16... Transmitting/receiving device (power receiving side).

Claims (3)

【特許請求の範囲】[Claims] (1)情報信号を電源に重畳させて伝送するための一対
の伝送線路と、伝送線路との間で情報信号の入出力を行
なうための信号重畳分離回路と、伝送するための情報信
号を電源とは興った周波数のキャリア信号で変調し、前
記信号重畳分離回路に出力するための変調回路と、前記
信号重畳分離回路より入力される変調された情報信号を
復調するた、 めの復調回路と、予め約束された通信規
約にのっとり、前記変調回路および復調回路との間で情
報信号の授受を行なうためのクロック同期式の送受信デ
ィジタル論理回路と、前記変調回路へ入力されるキャリ
ア信号および、前記送受信ディジタル論理回路へ入力さ
れるクロック信号を出力するための発振回路を備えた送
受信装置。
(1) A pair of transmission lines for transmitting information signals superimposed on a power supply, a signal superimposition/separation circuit for inputting/outputting information signals between the transmission lines, and a power supply for transmitting information signals. and a demodulation circuit for demodulating the modulated information signal inputted from the signal superposition/separation circuit. a clock-synchronous transmitting/receiving digital logic circuit for transmitting and receiving information signals between the modulating circuit and the demodulating circuit in accordance with a pre-agreed communication protocol; a carrier signal input to the modulating circuit; A transmitting/receiving device comprising an oscillation circuit for outputting a clock signal input to the transmitting/receiving digital logic circuit.
(2)送受信ディジタル論理回路として、マイクロ、コ
ンピュータを使用した特許請求の範囲第1項記載の送受
信装置。
(2) The transmitting/receiving device according to claim 1, which uses a microcomputer as the transmitting/receiving digital logic circuit.
(3)  マイクロコンピュータとして、クロック発振
回路を内戚したものを使用し、マイクロコンピータ自身
から出方された矩形波パルスを変調回路にキャリア信号
として供給する特許請求の範囲第2項記載の送受信装置
(3) The transmitting/receiving device according to claim 2, which uses a microcomputer that includes a clock oscillation circuit, and supplies rectangular wave pulses emitted from the microcomputer itself to the modulation circuit as a carrier signal. .
JP7778283A 1983-05-02 1983-05-02 Transmitting and receiving device Pending JPS59202743A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7778283A JPS59202743A (en) 1983-05-02 1983-05-02 Transmitting and receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7778283A JPS59202743A (en) 1983-05-02 1983-05-02 Transmitting and receiving device

Publications (1)

Publication Number Publication Date
JPS59202743A true JPS59202743A (en) 1984-11-16

Family

ID=13643535

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7778283A Pending JPS59202743A (en) 1983-05-02 1983-05-02 Transmitting and receiving device

Country Status (1)

Country Link
JP (1) JPS59202743A (en)

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