JPS59198880A - Sinusoidal wave generating inverter circuit - Google Patents

Sinusoidal wave generating inverter circuit

Info

Publication number
JPS59198880A
JPS59198880A JP58071209A JP7120983A JPS59198880A JP S59198880 A JPS59198880 A JP S59198880A JP 58071209 A JP58071209 A JP 58071209A JP 7120983 A JP7120983 A JP 7120983A JP S59198880 A JPS59198880 A JP S59198880A
Authority
JP
Japan
Prior art keywords
frequency
sinusoidal wave
sine wave
inverter circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58071209A
Other languages
Japanese (ja)
Inventor
Koichi Mitamura
三田村 紘一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tohoku Electric Power Co Inc
Original Assignee
Tohoku Electric Power Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tohoku Electric Power Co Inc filed Critical Tohoku Electric Power Co Inc
Priority to JP58071209A priority Critical patent/JPS59198880A/en
Publication of JPS59198880A publication Critical patent/JPS59198880A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To reduce the size and weight of an inverter circuit by combining rectangular wave signals of frequencies having twice differences of the frequency of a sinusoidal wave to be obtained, applying it to a rectifier which alternately operates at every zero beat to generate a sinusoidal wave. CONSTITUTION:When the frequency of a sinusoidal wave to be obtained is f0 from inverters 41, 42, rectangular wave signals of frequencies f+f0, f-f0 having twice differences of the frequency are outputted, applied to the primary windings of transformers 43, 44, the secondary winding is connected in series and combined. The beat signal of 2f0 is added to rectifiers 45, 46 when the rectifying direction is inverted, alternately driven by a signal of a zero beat detector 47, smoothed by a capacitor 48, thereby obtaining a sinusoidal wave output. Accordingly, the frequencies of inverters 41, 42 are set to high value to reduce the size and to decrease the harmonic wave components.

Description

【発明の詳細な説明】 この発明は正弦波発生インバータ回路に関する。[Detailed description of the invention] The present invention relates to a sine wave generating inverter circuit.

周知のように、正弦波発生インバータ回路が種々開発さ
れている。第1図は従来のこの種の回路111.rll
*〜116からは第2図に示す如く出力タイミングが所
定時間ずらされた同一周波数の矩形波信号el+e2〜
e6が出力される。これら出力された信号else!〜
e6は変圧器12.13〜17の一次コイル121.1
3.〜771にそれぞれ供給され、これら変圧器12.
13〜17の直列接続された二次コイル12..132
〜172において、前記信号el+e!””e6が合成
される。この合成された信号(第2図e。)は低域通過
フィルタ18に供給され、高調波成分が除去される。
As is well known, various sine wave generating inverter circuits have been developed. FIG. 1 shows a conventional circuit 111 of this type. rll
*From 116, rectangular wave signals el+e2 of the same frequency whose output timings are shifted by a predetermined time as shown in FIG.
e6 is output. These output signals else! ~
e6 is the primary coil 121.1 of transformer 12.13-17
3. ~771, respectively, and these transformers 12.
13-17 series connected secondary coils 12. .. 132
~172, the signal el+e! ""e6 is synthesized. This combined signal (FIG. 2e) is supplied to a low-pass filter 18 to remove harmonic components.

ところで、上記構成において、低域通過フィルタ18よ
り出力される波形を正弦波に近づけるためには、インバ
ータ回路の数を多くする必要がある。しかし、これらイ
ンバ−タ回路の点弧位相は、第2図にtl−tsで示す
如くそれぞれ異なるタイミングで制御しなければならな
いため、インバータ回路が多くなった場合、これらの制
御が極めて複雑となるものである。また、インバータ回
路を増加して低次高調波成分を減らすことができたとし
ても低減通過フィルタが必要であり、大きな容量のりア
クドルとコンデンサーを用いなければならないものであ
った。
By the way, in the above configuration, in order to make the waveform output from the low-pass filter 18 closer to a sine wave, it is necessary to increase the number of inverter circuits. However, the firing phases of these inverter circuits must be controlled at different timings, as shown by tl-ts in Figure 2, so when the number of inverter circuits increases, these controls become extremely complicated. It is something. Further, even if it were possible to reduce low-order harmonic components by increasing the number of inverter circuits, a low-pass filter would be required, and a large capacitor and capacitor would have to be used.

そこで、これらの欠点を解決するため、パル図(、)に
示すインバータ回路の矩形波出力信号の1周期間に同図
(b)に示す如くサイリスタ等のスイッチング素子を多
数回オン、オフさせてPWM変調信号を得、この四M変
調信号よシ低次高調波成分を除去して同図(c)に示す
ような正弦波に近似した信号を得るものである。
Therefore, in order to solve these drawbacks, switching elements such as thyristors are turned on and off many times as shown in (b) of the same figure during one period of the rectangular wave output signal of the inverter circuit shown in the Pal diagram (,). A PWM modulated signal is obtained, and low-order harmonic components are removed from this 4M modulated signal to obtain a signal that approximates a sine wave as shown in FIG. 4(c).

しかし、高次高周波まで減少させるためには、インバー
タ回路よシ出力される信号の1周期内でオン、オフさせ
るサイリスタ等のスイッチング周波数を高くしなければ
ならない。しかし、サイリスタ等のスイッチング素子に
は動作可能な周波数に限界があるとともに、それに合っ
た転流回路を必要とするものであり、回路構成に種々の
制約を受けるものであった。
However, in order to reduce the frequency to a higher level, it is necessary to increase the switching frequency of a thyristor or the like that is turned on and off within one cycle of the signal output from the inverter circuit. However, switching elements such as thyristors have a limit to the frequency at which they can operate, and require commutation circuits suitable for that frequency, and are subject to various restrictions on circuit configuration.

この発明は上記事情に基づいてなされたもので、その目
的とするところは求める正弦波に比べてインバータ回路
の出力周波数を高く設定し得て回路の小型、軽量死金図
り得るとともに、スイッチング素子を許容周波数内にお
いて確実に動作でき、高調波成分が少ない正弦波を得る
ことができる正弦波発生インバータ回路全提供しようと
するものである。
This invention was made based on the above circumstances, and its purpose is to be able to set the output frequency of the inverter circuit higher than the desired sine wave, to make the circuit smaller, lighter, and less expensive, and to reduce switching elements. The present invention aims to provide a complete sine wave generating inverter circuit that can operate reliably within the permissible frequency range and obtain a sine wave with few harmonic components.

以上、この発明の一実施例について図面を参照して説明
する。
An embodiment of the present invention will be described above with reference to the drawings.

第4図において、インバータ回路41.42は周知の構
成のものであり、このインバータ回路41.42からは
求める正弦波の周波数をfo(Hz)とした場合、この
周波数の2倍の差を有する周波数f+fo  、f  
fo  (Hz)の矩形波信号がそれぞれ出力される。
In FIG. 4, inverter circuits 41 and 42 have a well-known configuration, and if the frequency of the sine wave to be obtained from these inverter circuits 41 and 42 is fo (Hz), the difference is twice this frequency. Frequency f+fo, f
A rectangular wave signal of fo (Hz) is output.

これらイン・ぐ−夕回路41.42よシ出力される矩形
波信号は変圧器43.44の一次巻線430,44.に
それぞれ供給される。この変圧器43.44の二次巻線
”’2+442は直列接続されておシ、前記−次巻線4
31  a 441に供給された矩形波信号はこれら二
次巻線4J2,44.によって合成される。この合成さ
れた信号、即ち、第5図(a)に示す2fo(Hz)の
ビート信号は前記直列接続された二次巻線43..44
2の両端間に並列接続された第1.第2の整流回路45
゜46に供給される。これら第1.第2の整流回路45
.46はそれぞれGTO()1に−)・ターン・オフ)
サイリスタ451〜454,461〜464からなるブ
リッジ整流回路であり、これら整流回路45.46は互
いに整流方向が逆向きとなされている。
The square wave signals output from these in/output circuits 41, 42 are transmitted to the primary windings 430, 44, . are supplied respectively. The secondary windings ``'2+442'' of this transformer 43 and 44 are connected in series, and the - secondary winding 442 is connected in series.
31a 441 is applied to these secondary windings 4J2, 44. is synthesized by This synthesized signal, ie, the 2fo (Hz) beat signal shown in FIG. 5(a), is transmitted to the secondary winding 43. .. 44
The first . Second rectifier circuit 45
46°. These first. Second rectifier circuit 45
.. 46 are respectively GTO ()1 to -) turn off)
This is a bridge rectifier circuit consisting of thyristors 451 to 454 and 461 to 464, and these rectifier circuits 45 and 46 have rectifying directions opposite to each other.

一方、前記インバータ回路41.42の出力信号はそれ
ぞれゼロビート検出回路47に供給される。この検出回
路47は例えばオペレーションアンプと論理回路からな
る比較器によって構成されておシ、各インバータ回路4
1 、42の出力電圧の差が@O#となる瞬間が検出さ
れ、このゼロビート検出毎に、第5図(b)(C)に示
す逆極性のパルス信号が出力される。このゼロビート検
出回路47の出力パルス信号は前記第1゜第2の整流回
路45.46に供給され、このパルス信号によって前記
GTOサイリスタ451〜454および461〜464
が交互にオン、オフされる。したがって、これら第1.
第2の整流回路45.46からは第5図(a)に示す如
く整流された信号が出力される。この整流された信号は
前記周波数f’に平滑するにたるコンデンサ48によっ
て平滑され、第5図(、)に示す如く、前記整流された
信号の実効値を軌跡とする周波数fo(Hz)の正弦波
とされる。
On the other hand, the output signals of the inverter circuits 41 and 42 are respectively supplied to a zero beat detection circuit 47. This detection circuit 47 is composed of, for example, a comparator consisting of an operational amplifier and a logic circuit, and each inverter circuit 4
The moment when the difference between the output voltages 1 and 42 becomes @O# is detected, and each time this zero beat is detected, a pulse signal of opposite polarity shown in FIGS. 5(b) and 5(c) is output. The output pulse signal of this zero beat detection circuit 47 is supplied to the first and second rectifier circuits 45 and 46, and this pulse signal causes the GTO thyristors 451 to 454 and 461 to 464 to
are turned on and off alternately. Therefore, these first.
The second rectifier circuits 45 and 46 output rectified signals as shown in FIG. 5(a). This rectified signal is smoothed by a capacitor 48 to smooth it to the frequency f', and as shown in FIG. considered to be waves.

上記構成によれば、2台のイン・々−タ回路47.42
より出力される矩形波信号の周波数を求める正弦波の周
波数の2倍の差を有する周波数としている。したがって
、この関係を保持していればインバータ回路41.42
の出力周波数を求める正弦波に関係無く設定することが
できる利点を有している。しかも、出力周波数をスイッ
チング素子の許容範囲内で高く設定すれば、インバータ
回路41.42f小型、軽量化することが可能である。
According to the above configuration, two interface circuits 47.42
The frequency of the rectangular wave signal outputted from the square wave signal is set to a frequency that is twice the frequency of the sine wave to be obtained. Therefore, if this relationship is maintained, the inverter circuits 41 and 42
This has the advantage that the output frequency can be set regardless of the sine wave to be determined. Moreover, by setting the output frequency high within the allowable range of the switching elements, the inverter circuits 41, 42f can be made smaller and lighter.

また、変圧器43.44によって合成された信号の包路
線はインバ〜り回路41.42の出力波形と無関係に正
弦波となる。したがって、ゼロビート毎に極性を反転し
て整流した後、コンデンサ48によって平滑すれば、従
来のように大容量のりアクドル、コンデンサからなる複
雑な構成のフィルタを用いることなく高調波成分の少な
固止弦波を得ることが可能である。
Furthermore, the envelope of the signals synthesized by the transformers 43, 44 becomes a sine wave regardless of the output waveform of the inverter circuits 41, 42. Therefore, if the polarity is reversed every zero beat and rectified, and then smoothed by the capacitor 48, a fixed string with few harmonic components can be produced without using a complicated filter consisting of a large capacitor and a capacitor as in the past. It is possible to get waves.

さらに、第1.第2の整流回路45.46を  4構成
するGTOサイリスク451〜454.4f〜464は
それぞれ求める正弦波と等しい周波数のパルス信号によ
って動作されている。したがって、許容周波数範囲内で
動作されるため、安定した動作を得ることが可能である
Furthermore, the first. The GTO Cyrisks 451 to 454.4f to 464 constituting the second rectifier circuits 45, 46 are each operated by a pulse signal having the same frequency as the desired sine wave. Therefore, since it is operated within the permissible frequency range, it is possible to obtain stable operation.

さらに、インバータ回路41.42の出力周波数は求め
る正弦波の周波数に比べて比較的高く設定され、しかも
、インバータ回路41゜42と出力端との間に第1.第
2の整流回路45.46が設けられているため、出力側
からの影響によってインバータ回路41.42に転流ミ
ス等を発生することがない。
Furthermore, the output frequencies of the inverter circuits 41 and 42 are set relatively high compared to the frequency of the desired sine wave, and the first . Since the second rectifier circuits 45 and 46 are provided, commutation errors and the like will not occur in the inverter circuits 41 and 42 due to influence from the output side.

以上、詳述したようにこの発明によれば、求める正弦波
に比べてインバータ回路の出力周波数を高く設定し得て
回路の小型、軽量化を図り得るとともに、スイッチング
素子を許容周波数範囲内において確実に動作でき、高調
波成分の少ない正弦波を得ることができる正弦波発生イ
ンバータ回路を提供できる。
As detailed above, according to the present invention, the output frequency of the inverter circuit can be set higher than the desired sine wave, the circuit can be made smaller and lighter, and the switching elements can be reliably maintained within the permissible frequency range. Accordingly, it is possible to provide a sine wave generating inverter circuit that can operate in a similar manner and can generate a sine wave with few harmonic components.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の正弦波発生インバータ回路の一例を示す
構成図、第2図は第1図の動作を説明するために示す波
形図、第3図は第1図と異なる正弦波発生インバータ回
路の動作を説明するために示す波形図、第4図はこの発
明に係わる正弦波発生インバータ回路の一実施例を示す
構成図、第5図は第4図の動作を説明するために示す波
形図である。 41.42・・・インバータ回路、43.44・・・変
圧器、45.46・・・第1.第2の整流回路、47・
・・ゼロビート検出回路、48・・・コンデンサ。
Fig. 1 is a configuration diagram showing an example of a conventional sine wave generating inverter circuit, Fig. 2 is a waveform diagram shown to explain the operation of Fig. 1, and Fig. 3 is a sine wave generating inverter circuit different from Fig. 1. 4 is a configuration diagram showing an embodiment of the sine wave generating inverter circuit according to the present invention, and FIG. 5 is a waveform diagram shown to explain the operation of FIG. 4. It is. 41.42... Inverter circuit, 43.44... Transformer, 45.46... 1st. second rectifier circuit, 47.
...Zero beat detection circuit, 48...capacitor.

Claims (1)

【特許請求の範囲】[Claims] 互いの周波数差が求める正弦波の2倍に設定された信号
をそれぞれ発生する2台のインバータ回路と、これらイ
ンバータ回路の出力信号を合成する手段と、この合成さ
れた信号が供給されそれぞれ異なる整流方向を有する第
1.第2の整流回路と、これら整流回路の出力信号を平
滑するコンデンサと、前記両インバータ回路の出力信号
よりゼロビートを検出し、このゼロビート毎に前記第1
.第2の整流回路を交互に駆動する手段とを具備したこ
とを特徴とする正弦波発生インバータ回路。
Two inverter circuits that each generate a signal set to twice the sine wave required by their frequency difference, a means for synthesizing the output signals of these inverter circuits, and a means to which the synthesized signal is supplied and rectified in different ways. The first one has a direction. A second rectifier circuit, a capacitor for smoothing the output signals of these rectifier circuits, and a zero beat are detected from the output signals of both the inverter circuits, and for each zero beat, the first
.. A sine wave generating inverter circuit comprising means for alternately driving the second rectifier circuit.
JP58071209A 1983-04-22 1983-04-22 Sinusoidal wave generating inverter circuit Pending JPS59198880A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58071209A JPS59198880A (en) 1983-04-22 1983-04-22 Sinusoidal wave generating inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58071209A JPS59198880A (en) 1983-04-22 1983-04-22 Sinusoidal wave generating inverter circuit

Publications (1)

Publication Number Publication Date
JPS59198880A true JPS59198880A (en) 1984-11-10

Family

ID=13454057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58071209A Pending JPS59198880A (en) 1983-04-22 1983-04-22 Sinusoidal wave generating inverter circuit

Country Status (1)

Country Link
JP (1) JPS59198880A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1039622A1 (en) * 1999-03-16 2000-09-27 Alstom Belgium S.A. Method for supplying equipment requiring galvanic isolation and corresponding generator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1039622A1 (en) * 1999-03-16 2000-09-27 Alstom Belgium S.A. Method for supplying equipment requiring galvanic isolation and corresponding generator

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