JPS59198766A - Ferrodielectric semiconductor device - Google Patents

Ferrodielectric semiconductor device

Info

Publication number
JPS59198766A
JPS59198766A JP7350983A JP7350983A JPS59198766A JP S59198766 A JPS59198766 A JP S59198766A JP 7350983 A JP7350983 A JP 7350983A JP 7350983 A JP7350983 A JP 7350983A JP S59198766 A JPS59198766 A JP S59198766A
Authority
JP
Japan
Prior art keywords
ferroelectric
critical temperature
substrate
doped region
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7350983A
Other languages
Japanese (ja)
Inventor
Kazushi Sugawara
菅原 和士
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP7350983A priority Critical patent/JPS59198766A/en
Publication of JPS59198766A publication Critical patent/JPS59198766A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/84Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of applied mechanical force, e.g. of pressure

Abstract

PURPOSE:To obtain the titled device of a wide range of application as various kind of sensors, etc. by enabling to vary the characteristic of signal conversion and the performance such as sensitivity by utilizing the variation of electric properties accompanying the phonon softening phenomenon of the ferrodielectric. CONSTITUTION:An Fe ion implanted doped region 2 is manufactured in the surface of an SrTiO2 substrate 1 that is ferrodielectric substance, electrodes 3 and 4 to input and output an electric signal are formed at both ends thereof, and lead wires 5 and 6 are connected. in this substrate structure, the ion implanted doped region 2 has the electric resistance reduced down to a value of the degree that a semiconductor substance has, thus facilitating the measurement and detection of the electric resistance. Both of the substrate 1 and the doped region 2 have each critical temperature at which abnormality is observed in the electric resistance. However, those values becomes different by the introduction of the impurity to the doped region 2. In other words, the electric resistance shown by the doped region 2 can be adjusted by controlling the kind of the impurity and its amount.

Description

【発明の詳細な説明】 く技術分野〉 本発明は、強誘電体の電気的性質を利用した新体に生じ
る物理的な変化を電気的信号によって検出し得る装置に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a device that utilizes the electrical properties of a ferroelectric material to detect physical changes occurring in a new body using electrical signals.

〈発明の背景〉 強誘電体としては、強誘電性物質1反強誘電性物質、常
誘電性物質及びフェリ誘電性物質が挙げられる。このよ
うな強誘電体はある特定の温度Tc(臨界物質)で結晶
構造の変化を伴う相転位を起こす。このような相転位を
伴う臨界現象は、格子振動の不安定性に起因する次のよ
うな原因によるものと考えられている。
<Background of the Invention> Examples of ferroelectric materials include ferroelectric substances, antiferroelectric substances, paraelectric substances, and ferrielectric substances. Such a ferroelectric material undergoes a phase transition accompanied by a change in crystal structure at a certain temperature Tc (critical substance). The critical phenomenon accompanied by such a phase dislocation is thought to be due to the following cause resulting from the instability of lattice vibration.

一般に物質の格子振動には音響型フォノンと光学フォノ
ンがあり、それぞれのフォノンのエネルギーは波動ベク
トルIKに依存する。上述の物質にみられる臨界現象は
、上記格子振動の内でも主に光学フォノンの不安定性に
由来する。即ち、ある特定の光学フォノンのエネルギー
(或いは振動数)か特定の温度の近傍で急激に減少する
ことによって上記臨界現象が起こる。
Generally, there are acoustic phonons and optical phonons in the lattice vibration of materials, and the energy of each phonon depends on the wave vector IK. The critical phenomenon observed in the above-mentioned materials mainly originates from the instability of optical phonons among the above-mentioned lattice vibrations. That is, the critical phenomenon occurs when the energy (or frequency) of a specific optical phonon suddenly decreases near a specific temperature.

上記のように一般にフォノンのエネルギーが小さくなる
現象は1′フオノンのソフト化”と呼ばれている。上記
強誘電体の中でも波動ベクトル1に空間で 1f12=
(ooo)で指定される光学フ鋪ノンがソフト化を起こ
す物質か強誘電性物質であり第1ブリユアンゾーンの境
界の波動ベクトル正値で指定される光学フォノンがソフ
ト化を起こす物質が反強誘電性物質である。波動ヘクト
ル1kが上のような値によって表わされる強誘電性物質
及び反強誘電性物質以外に、波動ベクトル旧か上記の値
以外で光学フォノンのソフト化を起こす物質もある。そ
の−例は110°に近傍に臨界温度をもつ5rTi03
があり、IP、=(7,7,7)F25のフォノンエネ
ルギーの温度依存性を第1図に示す。
As mentioned above, the phenomenon in which the energy of phonons decreases is generally called 1' phonon softening.In the above ferroelectric materials, the wave vector 1 has the following effect in space: 1f12=
The optical phonon specified by (ooo) is a substance that causes softening or a ferroelectric substance, and the optical phonon specified by the positive value of the wave vector at the boundary of the first Brillouin zone is a substance that causes softening. It is a ferroelectric substance. In addition to ferroelectric materials and antiferroelectric materials whose wave vector 1k is expressed by the above values, there are also materials that cause optical phonon softening when the wave vector is old or has a value other than the above values. An example of this is 5rTi03 with a critical temperature near 110°.
Figure 1 shows the temperature dependence of the phonon energy of IP, = (7,7,7)F25.

フォノンのソフト化が起ると、それに伴って物質の物理
的性質が変化する。例えば5rTi03にFe3+を不
純物として添加したサンプルに対して、Fe3+イオン
のスピン共鳴吸収の線幅の温度依存性を第2図に示す。
When phonons soften, the physical properties of matter change accordingly. For example, FIG. 2 shows the temperature dependence of the linewidth of spin resonance absorption of Fe3+ ions for a sample in which Fe3+ is added as an impurity to 5rTi03.

同図から明らかなようにフォノンのソフト化が起るとス
ピン共鳴吸収にも変化が現われ吸収線幅は115°に近
傍で異常に増加する。このようなフォノンソフト化に伴
う異常現象は電気抵抗にも現われ、電気抵抗の増加分△
Rは臨界温度Tcの近傍の温度Tでは定性的に次のよう
に表わされる。
As is clear from the figure, when the phonon softens, a change appears in the spin resonance absorption, and the absorption linewidth abnormally increases near 115°. This abnormal phenomenon accompanying phonon softening also appears in electrical resistance, and the increase in electrical resistance is △
At a temperature T near the critical temperature Tc, R can be qualitatively expressed as follows.

上記電気抵抗の増加分△Rは各物質によって異なるが、
△Rを温度Tに対してプロットすれば第3図に示す曲線
のようになり、臨界温度Tc近傍で電気抵抗が非常に増
加し、フォノンのソフト化が電気抵抗の変化として確認
することかできる。
The above increase in electrical resistance △R varies depending on each substance, but
If △R is plotted against temperature T, it will look like the curve shown in Figure 3, where the electrical resistance increases significantly near the critical temperature Tc, and the softening of phonons can be confirmed as a change in electrical resistance. .

処で上述のようなフォノンのソフト化を起す物質に外部
から電場を加えると、フォノンソフト化のエネルギーが
変化し、定性的には第4図の実線度か変化し、このよう
な臨界温度の変化は強誘電体における電気抵抗の変化を
ももたらす。
However, when an electric field is applied externally to a substance that causes phonon softening as described above, the energy of phonon softening changes, qualitatively changing the degree of the solid line in Figure 4, and increasing the critical temperature. The change also results in a change in electrical resistance in the ferroelectric.

上記のような強誘電体のフォノンソフト化現象に伴う電
気的性質の変化は、フォノンエネルギーに変化を生じさ
せ得る物理量と関連させることによって物理量の電気信
号変換手段として利用することができる。
The change in electrical properties associated with the phonon softening phenomenon of a ferroelectric as described above can be used as a means for converting a physical quantity into an electrical signal by relating it to a physical quantity that can cause a change in phonon energy.

〈発明の目的〉 本発明は、強誘電体のフォノンソフト化現象に伴う電気
的性質の変化を利用りて、新規有用な強誘電体半導体装
置を提供するものである。
<Objective of the Invention> The present invention provides a new and useful ferroelectric semiconductor device by utilizing changes in electrical properties accompanying the phonon softening phenomenon of ferroelectrics.

〈実施例1〉 強誘電性物質1反強誘電性物質、常誘電性物質及びフェ
リ誘電性物質に分類され得る強誘電体として例えばS 
rT i03 、 L 1Nb03 、 BaT i0
3 。
<Example 1> Ferroelectric substance 1 As a ferroelectric substance that can be classified into antiferroelectric substances, paraelectric substances, and ferrielectric substances, for example, S
rT i03 , L 1Nb03 , BaT i0
3.

)■03等の絶縁体や5nTe等の狭いエネルギー禁制
帯を有する半導体等があるが、それらの物質の内Sr′
Fi03を用いて実施する場合を挙げて説明する。
)■ There are insulators such as 03 and semiconductors with a narrow energy forbidden band such as 5nTe, but among these materials, Sr'
A case will be described using Fi03.

まずある温度で生じるフォノンソフト化に伴う電気抵抗
の異常現象を確認するための強誘電体半導体装置の構造
を説明する。第5図において、強誘電体である5rTi
03の基板1の表面にFeイオンを10/備 程度にイ
オン注入したドープ領域2を厚さ3μ〜5μ程度で作成
し、該ドープ領域2の一方の端と他方の端に電気信号人
出のための電極3.4を形成しリード線5.6を接続す
る。
First, we will explain the structure of a ferroelectric semiconductor device to confirm the abnormal phenomenon of electrical resistance caused by phonon softening that occurs at a certain temperature. In FIG. 5, 5rTi, which is a ferroelectric material,
A doped region 2 having a thickness of about 3 μm to 5 μm is created by implanting Fe ions at a concentration of about 10/min on the surface of the substrate 1 of 03, and an electrical signal is placed at one end and the other end of the doped region 2. An electrode 3.4 for this purpose is formed and a lead wire 5.6 is connected thereto.

上記強誘電体基板構造において、基板1の5iTi03
はそれ自体ではバンド幅が3eV程度で絶縁体であるが
、Feイオンを注入することによりイオン注入された。
In the above ferroelectric substrate structure, 5iTi03 of the substrate 1
Although by itself it is an insulator with a band width of about 3 eV, it was ion-implanted by implanting Fe ions.

ドープ領域2は電気抵抗が低減して半導体物質がもつ値
程度になり9、電気抵抗の測定及び検出が容易になる。
The doped region 2 has a reduced electrical resistance to a value similar to that of a semiconductor material 9, making it easier to measure and detect the electrical resistance.

基板1及びドープ領域2共に電気抵抗に異常がみられる
臨界温度T el 、 T c2をもつが、それらの値
はドープ領域2か不純物導入されることによって異なっ
た値になる。即ち不純物の種類及びその量を制御するこ
とによって、ドープ領域2が示す電気抵抗を調整するこ
とができる。
Both the substrate 1 and the doped region 2 have critical temperatures T el and T c2 at which an abnormality is observed in electrical resistance, but these values become different depending on whether impurities are introduced into the doped region 2 or the like. That is, by controlling the type and amount of impurities, the electrical resistance exhibited by the doped region 2 can be adjusted.

第6図は、−上記イオン注入領域での電気抵抗の温間依
存性を測定し、フォノンのリフト化番こよる抵抗の異常
変化分を示す。図から明らかなように103°に近傍で
電気抵抗か異常に増加する。鉄イオン以外のボロンを注
入した場合も類似の現象が起こる。尚第6図で臨界温度
が110°により多少低温側に寄った103°Kに表わ
されているのは、臨界温度Tcのキャリア濃度依存性に
よるものと考えられる。
FIG. 6 measures the warm dependence of the electrical resistance in the ion-implanted region and shows the abnormal change in resistance due to phonon lift. As is clear from the figure, the electrical resistance increases abnormally near 103°. A similar phenomenon occurs when boron other than iron ions is implanted. The reason why the critical temperature is shown as 103°K, which is slightly closer to the lower temperature side than 110° in FIG. 6, is considered to be due to the dependence of the critical temperature Tc on the carrier concentration.

フォノンのソフト化が起る強誘電体の臨界温度Tcはキ
ャリア濃度に対して依存性をもち、例えば濃度の依存性
は他の強誘電体について起る。例えばある強誘電体に不
純物が添加し、そのキャリア濃度を制御することによっ
てTcを室温近くにすることが可能であり、更には室温
以外の温度にすることもできる。上述のような不純物を
ドープした強誘電体の電気的性質を利用して新規な電気
信号人出素やセンサ等を構成することかてき、以。
The critical temperature Tc of a ferroelectric material at which phonon softening occurs has a dependence on carrier concentration; for example, concentration dependence occurs in other ferroelectric materials. For example, by adding impurities to a certain ferroelectric material and controlling its carrier concentration, it is possible to make Tc close to room temperature, or even to a temperature other than room temperature. The electrical properties of ferroelectric materials doped with impurities as described above can be used to construct new electrical signal output elements, sensors, etc.

下により具体的な実施例を説明する。More specific examples will be described below.

〈実施例2〉 本実施例は電気信号変換デバイスとして構成したもので
、第7図において、上述の強誘電体材料からなる基板1
1は温度Tc1てソフト化を起す絶縁体である。該基板
11の表面に、基板11と同じ結晶構造をもち且つ電気
伝導度の大きい薄い半導体層12を形成する。該半導体
層12の形成は、イオン注入や分子線エピタキシャル法
等を用いて作成し、導入する不純物の種類によりn型に
もp型にもでき、いずれの導電型であってもよい。
<Example 2> This example is configured as an electrical signal conversion device, and in FIG. 7, a substrate 1 made of the above-mentioned ferroelectric material
1 is an insulator that softens at temperature Tc1. A thin semiconductor layer 12 having the same crystal structure as the substrate 11 and high electrical conductivity is formed on the surface of the substrate 11. The semiconductor layer 12 is formed using ion implantation, molecular beam epitaxial method, etc., and can be either n-type or p-type depending on the type of impurity introduced, and may be of either conductivity type.

半導体層12もまたフォノンのソフト化を起すが基板1
1とキャリア濃度が異なるため、半導体層12の臨界温
度Tc2は通常上記Tel とは異なって現われる。半
導体層12のキャリア濃度は電気信号変換デバイスの性
能を考慮して決定され、電気信号変換デバイスを動作さ
せる環境下での外気温と臨界温度Tc2かなるへく近く
なるようにキャリア、の種類及び濃度を選ぶことがデバ
イス感度の上から望ましい。基板11には上記半導体層
12となるドーピング領域に連続して、電気的信号の入
出力部となる入力領域13及び出力領域14が、半導体
層12の作成と同時に或いは別の工程によって不純物を
導入して形成される。−り記入力領域13及び出力領域
14には夫々オーミック接触する金属電極15.16が
形成されリード線1、7 、18が導出されている。上
記半導体層12に電場を印加するため、半導体層12の
表面に薄い絶縁膜19を被着し、該絶縁膜19上に電極
20を形成して電界効果型トランジスタ構造とする。
The semiconductor layer 12 also causes phonon softening, but the substrate 1
Since the carrier concentration is different from Tel1, the critical temperature Tc2 of the semiconductor layer 12 usually appears different from the above Tel. The carrier concentration of the semiconductor layer 12 is determined in consideration of the performance of the electrical signal conversion device, and the type and type of carriers are determined so that the outside temperature and the critical temperature Tc2 in the environment in which the electrical signal conversion device is operated are close to each other. It is desirable to select the appropriate concentration from the viewpoint of device sensitivity. In the substrate 11, an input region 13 and an output region 14, which serve as input/output portions for electrical signals, are formed in succession to the doped region which becomes the semiconductor layer 12, and impurities are introduced at the same time as the formation of the semiconductor layer 12 or in a separate process. It is formed by - Metal electrodes 15 and 16 are formed in ohmic contact with the input region 13 and the output region 14, respectively, and lead wires 1, 7, and 18 are led out. In order to apply an electric field to the semiconductor layer 12, a thin insulating film 19 is deposited on the surface of the semiconductor layer 12, and an electrode 20 is formed on the insulating film 19 to form a field effect transistor structure.

上記構造からなるデバイスにおいて、電極20に電圧E
を印加すると半導体層12に電場か生し半導体層12の
電気抵抗が変化する。この電気抵抗の電場に対する感度
は半導体層12の臨界温度T c 1 の値が外気温に
近いほど高くなり、わずかな電場の変動を比較的大きな
抵抗値の変化として取り出すことができ、入出力リード
線17.18間の電流は、電極8に印加された電圧に制
御された値として出力される。
In a device having the above structure, a voltage E is applied to the electrode 20.
When applied, an electric field is generated in the semiconductor layer 12, and the electrical resistance of the semiconductor layer 12 changes. The sensitivity of this electrical resistance to the electric field increases as the value of the critical temperature T c 1 of the semiconductor layer 12 approaches the outside temperature, and a slight fluctuation in the electric field can be extracted as a relatively large change in the resistance value. The current between lines 17 and 18 is output as a value controlled by the voltage applied to electrode 8.

〈実施例3〉 第8図は本発明による他の実施例を示す断面図で、強誘
電体に不純物をドープして形成した半導体層の電気抵抗
を制御する手段として圧力を作1ηさせる構造の電気信
号変換デバイスである。
Embodiment 3 FIG. 8 is a cross-sectional view showing another embodiment of the present invention, in which a pressure is applied 1η as a means of controlling the electrical resistance of a semiconductor layer formed by doping a ferroelectric material with impurities. It is an electrical signal conversion device.

前記実施例2はフォノンソフI・化現象を示す強誘電体
、に電界を作用させて電気抵抗の変化を出力として取り
出(7たか、強誘電圧の)刈ツノソフト化現象は、結晶
格r・に電界と実質的に同じ作用を及C;Iす圧力をイ
′1川さぜることによっても得ることかできる3、 IX++こおいて、強誘電体層21に接して同し結品4
1’r 浩から1.しり、11つ不純物かドープされた
強誘電性′1′、曽休層2体か形成され、該半導体層2
2の表面を被って絶縁11う“二23か被r1されてい
る。半導体層22の絶isMIA 2 :3−C被われ
た領域を挾んで両端に電気イ+’iシ;を取り出すため
の入出力電極24.25が形成さノ1.ている3、 L、、+シJ1’11J5’iによ;いて、絶縁11莫
23上にEl−力Fをイ′1川さ刊ると、月力1”に対
応して半導体層22のフAノンソフト化エネルキーか変
化して電気抵抗の変化と/、Nす、入出力電極24.2
5間に取り出される電流、と1I−)で11力ISに対
応した電1]!Lイ11゛1か検出される13即し、圧
力1・を電気イ1□シじに変換し7Byるセン9−とし
て機ril−J−る5゜ ・、効果・ 以1一本発明によれII、強誘電体を用いて新規な電気
信シシ′変換テバイスを措成することかてき、q、1に
強誘電体にドープする不純物を選lN−1f−ること(
こまって、イ1.−′変換の4.5性及び感度′、う′
の’Ml: ii:;をんえることかてき、各種のセン
9−′;9としc4.1llLl範囲の広いデバイスを
得ることか−Cきる。
In Example 2, an electric field is applied to a ferroelectric material that exhibits the phonon softening phenomenon, and the change in electrical resistance is extracted as an output. It can also be obtained by applying a pressure that exerts substantially the same effect as an electric field on the ferroelectric layer 21.
1'r from Hiroshi 1. Finally, 11 impurities or doped ferroelectric layers 1 and 2 layers are formed, and the semiconductor layer 2
The insulation layer 22 is covered with an insulating layer 223 covering the surface of the semiconductor layer 22. An electric current is provided at both ends of the semiconductor layer 22 by sandwiching the covered area. The input/output electrodes 24.25 are formed by 3, L, , +J1'11J5'i; and when the El-force F is applied to the insulation 11 and 23, , In response to a monthly force of 1'', the phonon softening energy key of the semiconductor layer 22 changes, resulting in a change in electrical resistance and/or a change in the input/output electrode 24.2.
The current drawn between 5 and 1I-) corresponds to the 11 power IS 1]! Li 11゛1 is detected 13 Therefore, pressure 1 is converted into electric current 1 □ and 7By is set as sensor 9-, ril-J- is 5゜, effect, etc. According to the present invention Second, to construct a new electrical signal conversion device using a ferroelectric material, select an impurity to be doped into the ferroelectric material for q and 1 (1N-1f-).
Sorry, I1. -'4.5 Characteristics and Sensitivity of Conversion', U'
By reading the 'Ml: ii:;, it is possible to obtain devices with a wide range of c4.1lllLl by using various sensors.9-';9.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はS r ’I’ i 03における’:17/
’y工;(、/l/ 、」−のjA+’+度変化を不変
化、第2図Ii S r ’I’ i 03の〕Aノン
ソフト化に伴うスピン共11i:M吸収線幅の変化を示
す図、第3図はツメノンソフト化に伴う71J、気抵抗
の増加を示す図、第4図はフAノンソフト化に件う電気
抵抗の電界効果を示す図、第5図G、を本発明lこよる
一実施例を説明するための断面図、第6図は同実施例に
よる電気抵抗の1lllL度依存性を示す図、第7図及
び第8図は本発明による他の実施例を示す断面図である
。 1.11.21:基板、2.12.22ニド−ピングさ
れたゝV・導体層、3.4.15.](3,2’1.2
5二電極、19.23:絶縁1模、l(、電界、F:出
力。 濤 度 T− 1度− 湯 度 r(K) 第6図
Figure 1 shows ':17/ in S r 'I' i 03.
'y Tech; (, /l/, '- jA+'+ degree change unchanged, Fig. 2 Ii S r 'I' i 03) Spin co-11i due to A non-softening: M absorption linewidth Figure 3 is a diagram showing the increase in 71J and air resistance due to tumenon softening. Figure 4 is a diagram showing the electric field effect of electrical resistance due to phonon softening. Figure 5 is G. , is a cross-sectional view for explaining one embodiment according to the present invention, FIG. 6 is a diagram showing the 1llllL degree dependence of electrical resistance according to the same embodiment, and FIGS. 1.11.21: Substrate, 2.12.22 Ni-doped ゝV conductor layer, 3.4.15.] (3,2'1.2
5 two electrodes, 19.23: insulation 1 model, l (, electric field, F: output. Temperature T- 1 degree - Temperature r (K) Fig. 6

Claims (1)

【特許請求の範囲】 1)特定の格子振動エネル許が臨界温度Tcの近傍で減
少するソフト化現象を示す強誘電体層を備え、該強誘電
体層に電界或いは機械的圧力を作用させて電気抵抗を制
御する手段を設け、上記強誘電体層に電気的信号の導出
端子を設けてなり、上記強誘電体層からソフト化現象に
よる電気抵抗の変化に基く電気信号を取り出すことを特
徴とする強誘電体半導体装置。 2)前記強誘電体層は、第1の臨界温度Tc1を有する
基板面に第1の臨界温度T。Iとは異なる第2の臨界温
度TC2をもつ第2層を形成した2層構造からなり、第
2の臨界・温度T。2をもつ第2の強誘電体層から電気
信号を取り出してな 3゜ることを特徴とする特許請求
の範囲第1項記載  。 の強誘電体半導体装置。 酸化物であって、基板と同じ結晶構造からなる−ことを
特徴とする特許請求の範囲第2項記載の強誘電体半導体
装置。 4)前記第2の強誘電体層は、イオン注入1分子線ビー
ム或いは気相成長法によって形成されていることを特徴
とする特許請求の範囲第2項又は第3項記載の強誘電体
半導体装置。 5)前記第2の強誘電体層は、基板となる第1の強誘電
体層の表面にボロンをイオン注入して形成したことを特
徴とする特許請求の範囲第4項記載の強誘電体半導体装
置。 6)前記臨界温度Tc、Tcl又はTc2は室温に対し
て温度差が100°に以内であることを特徴とする特許
請求の範囲第1項、第2項、第3項、第4項又は第5項
記載の強誘電体半導体装置。
[Claims] 1) A ferroelectric layer exhibiting a softening phenomenon in which a specific lattice vibration energy decreases near a critical temperature Tc, and an electric field or mechanical pressure is applied to the ferroelectric layer. A means for controlling electrical resistance is provided, and an electrical signal deriving terminal is provided in the ferroelectric layer, and an electrical signal based on a change in electrical resistance due to a softening phenomenon is extracted from the ferroelectric layer. ferroelectric semiconductor device. 2) The ferroelectric layer has a first critical temperature T on a substrate surface having a first critical temperature Tc1. It has a two-layer structure with a second layer having a second critical temperature TC2 different from I, and has a second critical temperature T. 2. The electric signal is extracted from the second ferroelectric layer having 2.3°. ferroelectric semiconductor device. 3. The ferroelectric semiconductor device according to claim 2, wherein the ferroelectric semiconductor device is an oxide and has the same crystal structure as the substrate. 4) The ferroelectric semiconductor according to claim 2 or 3, wherein the second ferroelectric layer is formed by ion implantation with a single molecular beam or by vapor phase growth. Device. 5) The ferroelectric material according to claim 4, wherein the second ferroelectric layer is formed by implanting boron ions into the surface of the first ferroelectric layer serving as a substrate. Semiconductor equipment. 6) Claims 1, 2, 3, 4 or 6, wherein the critical temperature Tc, Tcl or Tc2 has a temperature difference within 100° with respect to room temperature. The ferroelectric semiconductor device according to item 5.
JP7350983A 1983-04-25 1983-04-25 Ferrodielectric semiconductor device Pending JPS59198766A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7350983A JPS59198766A (en) 1983-04-25 1983-04-25 Ferrodielectric semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7350983A JPS59198766A (en) 1983-04-25 1983-04-25 Ferrodielectric semiconductor device

Publications (1)

Publication Number Publication Date
JPS59198766A true JPS59198766A (en) 1984-11-10

Family

ID=13520286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7350983A Pending JPS59198766A (en) 1983-04-25 1983-04-25 Ferrodielectric semiconductor device

Country Status (1)

Country Link
JP (1) JPS59198766A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0441584A2 (en) * 1990-02-09 1991-08-14 Raytheon Company Ferroelectric memory structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0441584A2 (en) * 1990-02-09 1991-08-14 Raytheon Company Ferroelectric memory structure

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