JPS59194460A - Semiconductor device - Google Patents

Abstract

PURPOSE:To mount a plurality of semiconductor elements formed with electrode terminals at the end faces in a high density by laminating the elements, and forming connecting wirings between the terminals at the end face regions of the elements, thereby increasing the mounting elements per unit volume. CONSTITUTION:Electrode terminals 30 are formed of low melting point metal on the end faces of a plurality of semiconductor elements 30, which are superposed to each other to form a circuit block 32. The entire shape of the superposed elements 30 is formed in a rectangular prism, and a plurality of electrode terminals 31 are formed on the same surfaces of the four end faces of the elements 30. A connector for connecting between the electrode terminals 31 of a plurality of semiconductor elements is formed with an electrode region 34 at the positions corresponding to the terminals 31 formed at the four end faces of the elements 30, for example, on a flexible film 33.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to packaging of semiconductor integrated circuits, particularly to three-dimensional packaging.

Conventional configurations and their problems Regarding high-density packaging of semiconductor integrated circuits, conventional methods have been used to increase the packaging density in a two-dimensional manner, but this also has its limitations, so in recent years three-dimensional packaging has been adopted. It is now possible to consider expansion. A conventional example will be explained below with reference to FIGS. 1 and 2.

In Figure 1, 1 is a substrate, 2 is a conductor wiring, 3゜3' is a semiconductor element, and 4 is a first wire for connecting the upper and lower conductor wirings.
, 5 is a thermoplastic resin, 6 is a first vapor-deposited conductor wiring, 7 is a second stud, 8 is a semiconductor element, 9 is a second thermoplastic resin, and 1o is a second vapor-deposited conductor wiring. 1st
In order to explain the structure shown in the figure, the manufacturing method thereof will be described below. ! First, conductor wiring 2 is formed on an insulating substrate 1 made of alumina or the like by a thick film method. Next, place the semiconductor elements 3, 3' in a predetermined position.
and the first stud 4 is adhesively fixed. The stud 4 is for connecting the upper and lower conductor wiring, and is made of metal or a low-resistance semiconductor. Next, apply the polythermoplastic resin sheet 5 to the top surface.
After welding them under heat and pressure, contact holes are formed on the stand and on the electrodes of the semiconductor element. Finally, Cr--OH or the like is deposited to form conductive wiring 6, and the mounting of the first layer is completed.

Furthermore, a second layer is formed by repeating the same process as that for the first layer, and a third layer and a fourth layer are further formed thereon in the same manner.

Next, a second conventional example will be explained with reference to FIG.

In FIG. 2, 11 is a substrate, 12 is a first frame, 13
14 is a semiconductor element, 14 is a first insulating sheet, 15 is a first vapor-deposited conductor wiring, 16 is an adhesive, 17 is a second frame, 18
1 is a semiconductor element, 19 is a second insulating sheet, and 2o is a second vapor-deposited conductor wiring. In order to explain the structure shown in FIG. 2, a manufacturing method thereof will be described below. First, a frame 12 having a thin plate with a hole for inserting a semiconductor element in a predetermined portion is prepared. Insulating sheet 1 having a through hole on one main surface of its frame 12
4 is adhered to the insulating sheet 14, and then the electrodes of the semiconductor element are aligned with the through holes and then adhered to the insulating sheet 14. Next, vapor-deposited conductor wiring 15 is formed to obtain a first mounting structure. A second mounting structure made in a similar process is superposed and bonded to the first mounting structure.

In the structure thus obtained, the vapor-deposited conductor wirings are connected to each other by some method.

In both of the above two examples, substrates on which semiconductor elements are mounted are stacked one on top of the other, or have a similar structure. In particular, in the first conventional example, semiconductor elements are stacked one after another, but since sufficient operation tests cannot be performed in the state of the semiconductor elements, the overall yield is extremely low. For example, when 10 semiconductor devices with a semiconductor element yield of 95L% are mounted using this method, the final yield will be 60%, which is not practical.

On the other hand, although the second example can be inspected as the first structure, the same problems as the first conventional example remain when making the first structure, and the first. There is no way to connect the second structure. In both cases, semiconductor elements are handled individually, so from the point of view of high-density mounting, this technology is insufficient, and for full-scale three-dimensional mounting in the future, semiconductor elements will have to be stacked together in the form of a single stack. Measures are needed.

Purpose of the Invention In view of the above-mentioned conventional problems, the present invention provides a structure that can perform sufficient functional testing at the level of a single semiconductor element and is unprecedented in the past in which the semiconductor elements themselves are stacked three-dimensionally. The purpose is to provide.

Structure of the Invention The present invention enables three-dimensional high-density packaging, which has not been possible in the past, by stacking a plurality of semiconductor elements each having electrode terminals formed in the direction of the end face and connecting the electrode terminals.

DESCRIPTION OF EMBODIMENTS Examples related to the structure of the present invention, a configuration example of a semiconductor element in which electrode terminals are formed in the direction of the end face, a configuration example of electrode interconnection of a stacked structure, and a typical manufacturing method are described below. Let me give an example.

An embodiment of the structure according to the present invention will be explained with reference to FIGS. 3 and 4. FIG. Electrode terminals 31 are provided on the end faces of the plurality of semiconductor elements 30 using a low melting point metal, and the semiconductor elements 30 are stacked on top of each other to form one circuit block 32. The number of the semiconductor elements 3o to be stacked together is about 6 to 100 (5 in FIG. 3), and in order to reduce the overall thickness and weight after stacking, each semiconductor element is is polished to a thickness of around 100 μm. The overall shape of the stacked semiconductor elements 30 is a caramel-like rectangle, and a plurality of electrode terminals 31 are formed on the same west end face of the semiconductor element 3o. The connecting body connecting the electrode terminals 31 of the plurality of semiconductor elements includes, for example, an electrode region 34 formed on a flexible film 33 at a position corresponding to each electrode terminal 31 formed on the four end faces of the semiconductor element 30. The electrode regions 34 are formed from a pattern formed by etching a metal film on the flexible film 33, and have a structure in which the electrode regions 34 are electrically connected to each other by wiring. Furthermore, the electrode area 34
may be formed as a through hole that penetrates the flexible film 33. In this case, the electrode terminals 31 of each of the semiconductor elements are located in the through holes, or
Or formed to fit.

The overall shape of the flexible film 33 is the shape shown in FIG. 4, which encompasses the entire stacked semiconductor element 30 and matches the electrode area 34 provided on the flexible film 33. be.

The coat terminal 35 for connection to an external substrate is led out from the surface of the semiconductor element 30 on which no electrode terminal is formed, that is, the surface opposite to the main surface or back surface of the semiconductor element. In this case, a protrusion or pin-shaped terminal 35 serving as an electrode may be provided on the portion to be led out to facilitate connection with a mating external board. Furthermore, although the flexible film has been described as a member for connecting between stacked semiconductor elements, the present invention is not limited to this. For example, on thick wiring boards or ceramic boards,
Interwiring may be performed with the electrode regions corresponding to the electrode terminals of the stacked semiconductor elements described above. It may also be configured such that after the semiconductor element is covered with the flexible film 33 and the electrodes are connected to each other, the flexible film 33 is inserted into a frame 36 shown in FIG. 4 for mechanical protection.

Next, a configuration example of a semiconductor element used in the structure of the present invention will be described.

<Semiconductor element example 1> In the embodiment shown in FIG. 5, an electrode terminal 61 is formed on a heat-resistant resin 60, and a protruding electrode 63 of a semiconductor element 62 is bonded to one protruding end of the electrode terminal.
This uses mated bonding (hereinafter referred to as TAB). Normally, in the TAB method, after bonding, the electrode terminals 61 are cut from the semiconductor element 62 or the heat-resistant resin 60 and bonded to an external board, but in this example, the heat-resistant resin part is placed around the semiconductor element 62. By leaving the electrode terminals 61 and cutting them at the heat-resistant resin portion 60, the cut portions of the electrode terminals 61 appear on the end face, and furthermore, the heat-resistant resin 60 can prevent the electrode terminals from shorting when stacked together. FIG. 6 is a plan view of the semiconductor device shown in FIG. 5. The same parts as in Figure 5 are given the same numbers.

The same numbers are given to the cylinders 11 and 11 in FIG.

Example 2) The example in FIG. 7 shows an electrode terminal 61A extending from an electrode terminal 61.
The structure is formed by through-hole conductors provided in the heat-resistant resin 6o. By cutting the through-hole portion, the structure shown in FIG. 7 is obtained.

<Semiconductor floor 7 Example 3> The example shown in FIG. 8 also uses the TAB method, but has a structure in which the electrode terminal 61 is bent to the side surface of the heat-resistant resin 60. It is sufficient that the length of the electrode terminal 61B is such that the end surface is slightly bent.

<Semiconductor element example 4> In the example shown in FIG. Semiconductor element 6
2 short circuit is prevented.

In this case, a film carrier of one layer of metal was used.
゛TABTAB method can be used.

<Semiconductor device example 6> The example in FIG. 10 has the same structure as in FIG.
6 is bonded to serve as insulation.

In this example, a short circuit between the electrode terminal 61 and the semiconductor element 62 can be prevented without pre-caulking and insulating the side surface of the semiconductor element.

Semiconductor Element Example 6 In the example of FIG. 11, the electrode terminal 61 from the electrode 63 of the semiconductor element 62 is made of metal foil (for example, Mu/, Ou, Au).
This is the case when a tape carrier consisting of one layer is used.

In this example, a portion of the electrode terminal is thickened for connection to the outside, and this portion is bonded to the side surface of the semiconductor element with adhesive 65. The thickness of the electrode terminal is several tens of micrometers in the region bonded to the semiconductor element, and 100 micrometers to several tens of micrometers in other parts.
Approximately 0 μm is good.

Next, an example of stacking semiconductor elements and interconnecting electrodes will be described.

<Laminated structure example 1> Figures 12 and 13 are the above-mentioned <semiconductor element examples 1 to 6>
That is, the semiconductor element 9 has electrode terminals 93 formed in the end face direction.
1 is a schematic cross-sectional view showing a structure in which a plurality of 1 are stacked. That is,
A semiconductor element 91 having electrode terminals 93 in the direction of its end face is mounted on a substrate 96 using an insulating resin material via a spacer 94.
95 for adhesion and lamination. Finally, the lid 97 is glued on to form the shape shown in FIG. 14, and the overall shape is cubic.

Also, at that time, the shape of the cubic stacked structure is the first one.
As shown in the side view in FIG. 4, a structure is obtained in which the end cross-sections of the electrode terminals 93 are exposed in an aligned manner, surrounded by the insulating resin material 95 and the heat-resistant resin 92.

Next, an example of the treatment of the electrode terminal end is shown in FIGS. 15 and 1.
This will be explained along with Figure 6.

As shown in FIG. 14, by immersing a semiconductor element stack block in which the end cross sections of the electrode terminals 93 are exposed on each side in a molten solder bath for a short time, the end cross sections of the electrode materials 93 are soldered. Metals bond together. That is, as shown in FIG. 16, a semiconductor element stacked block is produced in which so-called solder bumps 98 having a thickness of several tens of micrometers to several hundreds of micrometers are formed on all electrode terminals 93.

Further, as another structure, the bump electrode described above may be formed by a plating method. That is, by selectively plating the exposed portions of the electrode terminals 93 of the semiconductor element stack block with a metal material having excellent electrical conductivity, bump electrodes are formed in the same portions by plating, as in the case described above. 98 is constructed, and a semiconductor laminated block having electrode bumps at its periphery as shown in FIG. 15 is constructed.

In addition, by etching the resin part of the laminated structure as shown in Fig. 14 (for example, oxygen plasma etching) and selectively cutting off the resin part at the end by several tens of micrometers to several hundred micrometers, the structure shown in Fig. 16 can be etched. The electrode terminal can be made to protrude as shown in FIG.

Next, an example of electrode interconnection will be described.

Electrode Interconnection Example 1 As shown in FIG. is formed to a thickness of several micrometers to several tens of micrometers by vapor deposition or plating, and then by photoprocessing, wiring (turns 9
It has a structure in which 9 is formed.

Electrode Interconnection Example 2 This example uses a wire as shown in FIG. Using a bonding method, a thin Au or Al wire 100 is connected between the electrode terminals 93.
The wires are connected depending on the

In addition, the connection between mutually connected electrodes or a single electrode and an electrode (not shown) on the external frame is achieved by laminating a layer 101 exclusively for electrode terminals at the same time when forming a stacked block of semiconductor elements, as shown in the same figure. Connection is made using the end cross section portion 102 of the electrode metal formed by the layer.

When laminated as described above, heat dissipation becomes a problem. In order to solve this problem, a structure in which a heat sink is inserted between the laminated structures is shown in FIG.

This example, shown in FIG. 19, is a structure in which the heat dissipation of a semiconductor element group constituted by stacking semiconductor elements with large power consumption is improved.

That is, when forming semiconductor elements in a layered manner, as shown in the perspective view of FIG. 19, a structure in which heat dissipating thin plates 103 made of thin metal plates or materials with good thermal conductivity are simultaneously laminated on the back side of the semiconductor element at several layer intervals. As shown in FIG. 19, one side of the heat dissipation thin plate extends to the outside of the laminated block, and the extended portion has a heat dissipation effect.

Next, an example of the manufacturing method of the present invention will be described.

Manufacturing method example 1> FIG. 20 is a schematic cross-sectional view, but if necessary, the same method can be used for all four sides at the same time.

The electrode terminals 31 of the stacked semiconductor elements 30 and the electrode regions 34 of the flexible film 33 are aligned, and heated and pressed in the direction of the four end faces 38.

As a result, the low melting point metal that is the electrode material of the semiconductor element 3o is melted, and mechanical and electrical connection is completed. In this case, the external terminals that come into contact with the external board are pre-swaged with solder bumps or pins (third
35) may be provided in advance, or may be formed at the time when the connection between the electrode terminals on the four end faces of the semiconductor element and the flexible film is completed. Furthermore, as shown in FIG. 21, the mutual wiring completed is inserted into the frame 36, and the electrode area 39 provided on the bottom surface of the flexible film 33 is inserted into the frame 36.
The electrode area 40 on the bottom surface of may be heated to bond. A pin 35 for connection to an external board is formed on the frame body 36. With such a configuration, a mechanically stable semiconductor device can be obtained and is easy to handle.

<Manufacturing method example 2> As shown in FIG. 22, the flexible film 33 is inserted into the frame 36, and then the stacked semiconductor elements are inserted (FIG. 22b), and the entire frame 36 is heated. The low melting point metal of the electrode terminal of the semiconductor element and the electrode area on the flexible film is melted 7, and the electrode terminal 30 formed on the end face of the semiconductor element and the electrode area 31 of the flexible/pull film 3.3 are connected. In such a manufacturing method, the frame 36 is used and the flexible film 33 is placed inside the frame 36.
Since the stacked semiconductor elements 30 and 30 are inserted and heat-treated all at once, the process is simple and alignment of the individual electrodes becomes easy.

Manufacturing method example 3> As shown in FIG.
1 (e.g. epoxy, glass.

(ceramic, etc.). That is, electrode regions 42 connecting the electrode terminals 31 of the caulking semiconductor element 3o and interconnections between the electrode regions (not shown in FIG. 23) are formed on the substrate in advance. In the case of a method in which each end face of the semiconductor element 30 in which the multilayer wiring board 41 is laminated is aligned and heated, the connection between the multilayer wiring boards attached to each end face is made in the multilayer wiring body. This is carried out using the electrode area 50 provided at the end.

Manufacturing method example 4> As a further improved method, as shown in FIG. 24, a rectangular frame is pre-swaged with the multilayer wiring board 41, and the electrode area in contact with the electrode terminal on the end face of the semiconductor element is on the inside. By placing the stacked semiconductor elements 30 (FIG. 24a) and heating them, the connection between the electrode terminals of the semiconductor elements and the electrode regions of the multilayer wiring board can be made extremely easy. (
Figure 24b) Effects of the Invention In the case of the present invention, semiconductor elements of 100 μm are stacked on top of each other to form a laminated structure, and electrode terminals are led out in the direction of the end face of the semiconductor element, and between the electrode terminals in the end face area. The wiring is connected to each other.

For this reason, (1) there are many semiconductor elements mounted per unit volume, and the structure allows for high-density mounting. For example, assuming that the thickness of a semiconductor element is 100 μm, even if 20 semiconductor elements are stacked, the thickness is only 2 mm, and even considering the adhesive resin between the layers of each semiconductor element, the thickness is at most 2.5 mm. It can be mounted thinly and with high density.

■The wiring length is extremely short because the electrode terminals of each semiconductor element are led out in the direction of the end face and connected to each other within the end face area. For example, even when 20 semiconductor elements are stacked as in the above-mentioned example, it can be processed with a wiring length of only 2.5 mm, so the wiring resistance is low, and there is no problem with increasing the speed of memory IC+ or high frequency IC.

(2) In the case of the present invention, since the structure is such that the electrode terminals from the semiconductor element are led out in the direction of the end face and are stacked on top of each other, there is no need for any unnecessary supports. This makes it possible to reduce the weight of the entire semiconductor device.

(2) Also, since the present invention has a structure in which semiconductor elements are stacked one on top of the other, the area is significantly smaller than in the conventional method of arranging them on a plane.

■As already mentioned, in the stage of forming the electrode terminals of a semiconductor element, for example, the semiconductor element is connected to the lead terminals of the film carrier through the inner leads, and then electrical measurement and inspection are carried out in advance on the fanned-out part of the lead terminals on the film. can do. Therefore, in the stage of stacking the semiconductor elements, only completely inspected non-defective products can be used, and the yield as a semiconductor device is significantly higher than that of conventional semiconductor elements that are simply inspected at the wafer stage. It is.

[Brief explanation of the drawing]

Core number 1. FIG. 2 is a cross-sectional view of a conventional structure in which substrates on which semiconductor elements are mounted are stacked together, FIG. 3 is a schematic structural view of a semiconductor device according to an embodiment of the present invention, and FIG. 4 is a flexible, η/
l/A,! : Schematic diagram of a frame body, chain pipe^2 A diagram showing an example of the manufacturing method of the present invention. 30... Semiconductor element, 31... Electrode terminal, 33... Flexible film, 35...
...Pin, 36...Frame, 41...
Multilayer board, 42... Electrode, 60... Heat resistant resin, 61... Electrode terminal, 62...
・Semiconductor element, 63... Projection electrode, 66...
...Adhesive, 91...Semiconductor element, 92...
...Heat-resistant resin, 93... Electrode terminal, 94.
... Spacer, 96 River... Insulating resin material,
96... Substrate, 9B... End surface electrode,
99...Interconnection wiring, 100...Metal thin wire, 103...Radiation plate. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 6
Figure X2 Figure 7 0 Figure 8 Figure 9 Figure 4- Figure 10 Figure 5

Claims (1)

Claims: (1) A semiconductor device characterized in that a plurality of semiconductor elements each having an electrode terminal formed on its end face are stacked, and a connection wiring between the electrode terminals is formed in the end face region of the element. (2) The semiconductor device according to claim 1, wherein the electrode terminals on the end faces of the stacked semiconductor element group are connected by thin metal wires. (3) The semiconductor device according to claim 1, wherein the electrode terminals on the end faces of the stacked semiconductor element group are connected by vapor-deposited wiring. (4) One end of an electrode terminal protrudes inward of the frame on one main surface of the frame whose surface is at least made of an insulating material, and the protruding electrode terminal and the electrode on the semiconductor element are joined, and 2. The semiconductor device according to claim 1, comprising a stack of structures in which the other end of the electrode terminal is adhesively fixed to the side wall of the frame body beyond the periphery of the frame body. (6) Laminating structures in which the other end of the electrode terminal, one end of which is joined to the electrode on the semiconductor element, is bent to the side beyond the periphery of the semiconductor element, and is bonded and fixed at the side surface. A semiconductor device according to claim 1, comprising: (6) A plurality of semiconductor elements each having an electrode terminal formed on the end face thereof are laminated, and a wiring board having a conductor wiring formed thereon having an electrode portion corresponding to the end face electrode terminal of the semiconductor element group is used to form the semiconductor element. A semiconductor device characterized in that predetermined end face electrode terminals are interconnected. (7) The semiconductor device according to claim 6, wherein the wiring board is a multilayer insulating board. (8) The semiconductor device according to claim 6, wherein the wiring board is a flexible film.