JPS59191941A - Automatic equalizing circuit - Google Patents

Abstract

PURPOSE:To simplify the equalization with an automatic equalizing circuit for a digital signal by detecting the error of a code word. CONSTITUTION:A reproduced signal is supplied to a transversal filter consisting of a delay line with tap, switches 1-3 and resistances R11-R3m. Thus the output of an equalizer is obtained at a load resistance R. For a reproduced code, the error is detected by a detecting circuit 3. Then the reproduced code is decided by a deciding circuit 2, and the coefficient of the transversal filter is controlled with selection of switches 1-3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to automatic equalization circuits, and more particularly to automatic equalization of digital reproduction signals used in devices such as digital magnetic recording and reproduction devices.

[Background of the invention]

In magnetic recording, since the tape itself has unique frequency characteristics, the reproduced signal waveform becomes a signal with amplitude and phase distortion called peak shift. In particular, P
In high-density magnetic recording devices such as digital tape recorders (VTJs) that record and play back OM-encoded television signals, amplitude distortion and phase distortion of the playback signal are fixed in the playback system because they cause extremely large code errors. Amplitude by equalizer.

Phase distortion is removed. However, at the same recording current as the head wears.

The magnetic flux during writing becomes stronger, and the playback frequency characteristics of the tape itself become different. Therefore, in order to correct this, the reproduction system is equipped with a variable equalizer in addition to the fixed equalizer.
It is necessary to use this variable equalizer to compensate for head wear.

In order to optimally correct the variable equalizer according to the wear of the head, an automatic equalization function used in the field of communication is required, but if you try to apply this as is to a digital VTR, it will be difficult to equalize it. basic signal settings, operating speed (several tens of Mbit/sec for digital VTRs),
There are various problems with circuit scale, etc.

[Purpose of the invention]

Therefore, one object of the present invention is to realize an automatic equalization circuit that is used in a high-speed digital signal reproducing device and operates effectively.

In particular, it is an object of the present invention to provide means for operating an automatic equalization circuit in an optimal state without adding a special reference signal to the signal for automatic equalization.

[Summary of the invention]

To achieve the above object, the present invention utilizes error correction and error detection codes already included for digital signal processing rather than for automatic equalization.

The automatic equalization function is activated by detecting code words containing errors using the error correction and error detection codes, and by controlling the variable equalization amount so that the number of detected code words is less than or equal to a tolerance value. It is characterized by having

When the present invention is implemented in a digital VTR or the like.

The above-mentioned change in frequency characteristics due to wear of the head is automatically equalized, and furthermore, it has the advantage that there is no need to specially insert a code or the like as a reference signal for driving the automatic equalization circuit.

[Embodiments of the invention]

The present invention will be explained in detail below with reference to the drawings.

FIG. 1 shows the relationship between the equalization amount and the number of code errors.

The solid line indicates the number of code errors, and the dotted line indicates the number of code words containing code errors. Regarding the relationship between the number of code errors and the amount of equalization, when the amount of 1 equalization is optimal, the number of code errors is the minimum, and as the amount of 1 equalization deviates from the optimal value, the number of code errors increases. On the other hand, the relationship between code words containing code errors and the equalization amount has a similar tendency.

That is, there is a strong correlation between the number of code errors and the amount of equalization, and the relationship between the number of code words containing code errors and the amount of equalization. Therefore, by controlling the variable equalizer so that the number of codewords containing errors is below or below the allowable value, the variable equalizer can be automatically brought into a state close to optimal equalization (
This can be set.

A variable equalizer is usually constructed of a transversal filter that calculates the sum of the tap coefficients multiplied by each tap output of a tapped delay line. In such a transversal filter, various characteristics can be realized by changing each tap coefficient. Therefore, controlling the variable equalizer means changing the tap coefficients in the transversal filter.

FIG. 2 is a diagram showing the configuration of an embodiment of an automatic equalization circuit according to the present invention. The output of tapped delay line 1 is connected to resistors "11~R11+"21 by switches 1 and 2.3, respectively.
˜R2°, each of which is connected to one of R31˜R3o. The determination circuit 2 controls which resistor the switch is connected to. In addition, 1 judgment circuit 3
Then, the connection state of each switch and the number of code words with errors included in a certain period, such as one field or several tens of scan lines, are measured and the number is memorized.
It is determined whether the number of code words containing errors is larger or smaller than a preset tolerance value.On the other hand, the error detection circuit 3 performs error correction on the reproduced code to determine whether the code words contain errors. This is done using the remainder after dividing by the generating polynomial of the detected code. Next, this operation will be explained. First, as an initial setting, switch 1 is R, and switch 2 is R.
20, the switch 3 is connected to R3□, and the 1 judgment circuit 2 judges whether the number of code words containing errors obtained from the error detection circuit 3 is larger or smaller than a tolerance value. If it is smaller than the allowable value, the switch is fixed in this state and the setting of the shift coefficient is completed.

If it is larger than the allowable value, switch 1 is 1t1□
, switch 2 is connected to R2□, switch 3 is connected to R31,
Similar operations are performed thereafter, and if the number of code words containing errors is smaller than the allowable value, the switch is fixed in that state.

Hereafter, the tap coefficients are set by sequentially switching the switches and performing similar operations. However, if the number of code words containing errors is larger than the allowable value for any combination, The switch is fixed to the one with the smallest number of stored code words (the one with the corresponding connection).

In the first embodiment, in the worst case, the time equivalent to +fi03 times is required to set the tap coefficients.

That is, it cannot be said that there is no problem that automatic setting takes too much time. However, if changes in frequency characteristics due to head wear can be predicted to some extent, the time required for automatic setting can be shortened. For example, suppose that the equalization amount to be corrected by the variable equalization amount changes with a monotonous increasing tendency as shown in FIG. 3 due to head wear. In this case, 1, for example, tap coefficients that realize characteristics in 100 hour increments such as 0 hour, 100 hour, 200 hour, 300 hour, and 0 hour, 10 hour
Prepare a tap coefficient that realizes your characteristics such as time, 20 hours, ...90 hours, and first
Settings can be made in a short time by making rough adjustments in 0-hour increments and then fine-tuning in 10-hour increments. FIG. 4 shows this embodiment. Each tap output of the tapped delay line 4 is connected to a resistor group R, , R2, R3, R that realizes a tap coefficient by a switch 81 to a switch S6.
4°R5,l (connected to +6.Resistance group R0-R3 is 0 hours.

100 hours, 200 hours, etc.
It realizes time-step characteristics, and resistor group R4~
R6 realizes characteristics in 10 hour increments such as 0 hour, 10 hour, and 20 hour. The determination circuit 5 has the functions of controlling switch selection, measuring the number of code words containing error codes and storing the value, and comparing the measured number with a tolerance value or the measured numbers with each other. Further, the error detection circuit 6 divides the reproduced code by the generation polynomial of the error correction and detection code, and checks the remainder, thereby detecting the presence or absence of an error contained in the code word. Next, this operation will be explained. First, as an initial setting, switch 81~
All S6 are connected to the resistors of the resistor group that realizes the zero time characteristic. In this situation, the example is contained within a certain period of time, such as one field, or several tens of scan edges. Counting the number of code words containing errors obtained from the error detection circuit 6,
Remember this. Next, switches 1 to 3 are used to switch to the resistors of the resistor group having a characteristic of 100 hours, and the number of code words containing erroneous codes is similarly measured and stored.

Then, the numbers measured at 0 hours and 100 hours are compared in magnitude. In this case, if the 0 hour is smaller, the switches 81 to S3 are fixed at 0 hour and the characteristics are set in 10 hour increments.

If 100 hours is smaller, then switch to the 200 hour characteristic, measure the number of code words that contain the wrong sign, and measure the number of codewords that are larger or smaller than the previous state of 100 hours. compare. In this case, if the value of 100 hours is small, the switches 81 to S3 are fixed to the characteristics of 100 hours, and the setting of the characteristics is performed in 5th and 10th hour increments. If 200 hours is smaller, then switch SEL S3 is connected fpML to set the characteristics for 300 hours, and then set the characteristics for 100 hours in the same manner.

Thereafter, custom settings are made in 10-hour increments using the following method. First, the switches 84 to s6 are set to the 0 time characteristic, the number of code words containing code errors is measured, and if this number is smaller than the allowable value, the switches 84 to s6 are fixed in that state. Setting of the tap coefficient is completed. if,
If it is thicker than the allowable value, the switches 84 to S6 are set to the 10 hour characteristic, and the tap coefficients are set in the same manner. If the allowable values are exceeded for all characteristics in 10-hour increments, switch switches 81 to s3 to those for the previous 100-hour characteristics, and thereafter set the tap coefficients by the same operation. . If this still exceeds the allowable value in all cases, the tap coefficient setting is completed by setting the switch S-86 to the smallest number measured so far. Here, 7 is a tapped delay line. In any of the embodiments, the structure can be easily constructed by using a microcomputer or the like as one determination circuit.

In addition, when measuring the number of codewords containing erroneous codes, in order to eliminate the influence of dropouts during playback, for example, information detected by a dropout sensor etc. can be used to prevent burst errors. By not measuring the number of tap coefficients, it is possible to set tap coefficients more reliably.

As described above, according to the present invention, it is possible to easily and automatically equalize changes in frequency characteristics due to head wear, and the obtained effects are significant.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the relationship between the amount of equalization, the number of code errors, and the number of code words containing code errors for explaining the principle of the present invention;
FIG. 2 and FIG. 4 are both block diagrams showing the configuration of an embodiment of the automatic equalization circuit according to the present invention, and FIG. 3 is a diagram showing the relationship between the equalization amount to be corrected and frequency. 1.4.7... Delay line with tap, 2.5... Judgment circuit. 3.6...Error detection circuit. Old 1 Zushou, quantity sound 2 boxes, all 3 diagrams frequency

Claims (1)

[Claims] 1. In a circuit that equalizes a digital signal including at least one of an error correction code or an error detection code,
It is characterized by comprising a circuit for detecting the number of code words of the code containing an error, and means for controlling variable parameters of the equalization circuit by the output of the detecting circuit so as to reduce this number. automatic equalization circuit. 2. In the automatic equalizer described in item 1, the equalization circuit includes a transversal filter. An automatic equalization circuit characterized in that the controlling means is configured to control tap coefficients of the transversal filter.