JPS59188251A - Fm tuner - Google Patents

Fm tuner

Info

Publication number
JPS59188251A
JPS59188251A JP6029984A JP6029984A JPS59188251A JP S59188251 A JPS59188251 A JP S59188251A JP 6029984 A JP6029984 A JP 6029984A JP 6029984 A JP6029984 A JP 6029984A JP S59188251 A JPS59188251 A JP S59188251A
Authority
JP
Japan
Prior art keywords
circuit
output
amplifier
signal
tuner
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6029984A
Other languages
Japanese (ja)
Other versions
JPS6229938B2 (en
Inventor
Tatsuo Numata
沼田 龍男
Koji Ishida
石田 弘二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP6029984A priority Critical patent/JPS59188251A/en
Publication of JPS59188251A publication Critical patent/JPS59188251A/en
Publication of JPS6229938B2 publication Critical patent/JPS6229938B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits
    • H03D1/2209Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/72Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Circuits Of Receivers In General (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To eliminate a hop noise by eliminating the variation in the DC potential of a signal output in tuning operation, etc. CONSTITUTION:An IF signal is detected and converted into a composite signal by an FM detecting circuit 1 having S curve characteristics, and the signal is inputted directly to a postamplifier 2. The output of the amplifier 2 is inputted directly to a multiplex demodulating circuit 3 to separate a left and a right audio signal, which are applied directly to a trailing stage. The left and right signals are summed up by resistances R3 and R4 and applied to the output line of the detecting circuit 1 through a DC negative feedback circuit 4. The circuit 4 has an operational amplifier OP2 which is applied with the left and right signal at the negative-phase terminal and with the earth potential at the in- phase input through a resistance R5, and capacitors C1 and C2, and the output of an amplifier OP2 is fed back to the postamplifier through a resistance R6. The amplifier OP2 and capacitors C1 and C2 constitute a Miller integration circuit and the integral time constant is controlled freely by turning on and off a switch SW.

Description

【発明の詳細な説明】 本発明はFMチューナに関し特にFM検波回路以降の低
周波信号部分のFMチューナ回路構成に関Jる。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM tuner, and particularly to the FM tuner circuit configuration of the low frequency signal portion after the FM detection circuit.

FMチューナにおいては中間周波信号をFM検波するF
M検波回路と、コンポジット検波出力を増幅するポスト
アンプと、更にはこのコンポジット信号から左右チャン
ネル信号にそれぞれ分+m復調づるMPX(マルチプレ
ックス)復調回路とを含んでおり、これら回路がいわゆ
る低周波信号処理回路となっている。
In an FM tuner, F is used for FM detection of intermediate frequency signals.
It includes an M detection circuit, a post amplifier that amplifies the composite detection output, and an MPX (multiplex) demodulation circuit that demodulates the composite signal into left and right channel signals, respectively. It is a processing circuit.

この低周波信号処理回路であるFM検波回路からMPX
復調回路までは、種々の要因によりFM検波出力の直流
変動が存在するために当該直流変動によるポツプノイズ
の発生のために途中にカップリングコンデンサ等を挿入
して直流カッ1−を行いいわゆる非直結型の回路構成を
とらざるを得ない。そのために音質が劣化していわゆる
ト1l−F1チューナを得ることは困難となっている。
From this low frequency signal processing circuit, FM detection circuit, to MPX
Up to the demodulation circuit, there are DC fluctuations in the FM detection output due to various factors, so in order to generate pop noise due to the DC fluctuations, a coupling capacitor etc. is inserted in the middle to cut the DC current, which is called a non-directly coupled type. The circuit configuration must be adopted. As a result, the sound quality deteriorates, making it difficult to obtain a so-called T1l-F1 tuner.

更には、FMヂューナにおいては同調操作時や離調時に
FM検波回路の検波特性であるSカーブをI「周波数が
スィーブするためにその検波出力には直流が発生し、ま
たDC変動が生じることになり大きなポツプノイズを招
来し、FMチューナ段の直結化を阻止する原因となって
いる。かかる同調操作時等のDC発生及び変動を阻止す
るために信号ラインにコンデンサ及び抵抗よりなるバイ
パスフィルタを挿入しているが、これまた音質の劣化の
一因となりl−1i−Fi化を阻止している。
Furthermore, in an FM tuner, when tuning or detuning, the S curve, which is the detection characteristic of the FM detection circuit, is swept, so DC is generated in the detection output, and DC fluctuations occur. This causes large pop noises and prevents direct connection of the FM tuner stage.In order to prevent DC generation and fluctuations during such tuning operations, a bypass filter consisting of a capacitor and a resistor is inserted in the signal line. However, this also contributes to the deterioration of sound quality and prevents the conversion to l-1i-Fi.

本発明の目的は、信号出力の直流電位を一定に抑圧して
直結化が可能なFMチューナを提供することである。
An object of the present invention is to provide an FM tuner that can be directly connected by suppressing the DC potential of the signal output to a constant value.

本発明の他の目的は、同調操作時等における信号出力の
直流電位変動を除去してポツプ音を除いた直結型FMチ
ューナを提供することである。
Another object of the present invention is to provide a direct-coupled FM tuner that eliminates pop noise by eliminating direct current potential fluctuations in signal output during tuning operations.

本発明のFMチューナはFM検波回路の検波出力から第
1及び第2のチャンネル信号をそれぞれ分離復調するマ
ルチプレックス復調回路と、この復調回路の復調出力を
積分する積分器を有しこの積分出力をFM検波回路の検
波出力ラインへ負帰還する負帰還回路とを含み、復調出
力の直流電位変動を抑圧するようにして直結化を可能と
したことを特徴としている。
The FM tuner of the present invention includes a multiplex demodulation circuit that separates and demodulates the first and second channel signals from the detection output of the FM detection circuit, and an integrator that integrates the demodulated output of this demodulation circuit. It is characterized in that it includes a negative feedback circuit that provides negative feedback to the detection output line of the FM detection circuit, and enables direct connection by suppressing DC potential fluctuations of the demodulated output.

更に、本発明のFMチューナにあっては、選局操作に応
答して積分器の積分時定数を小に制御する制御手段を含
み、回路系として等価的にバイパスフィルタ構成とする
ことにより、選局同調操作時にお(プるDC変動をオー
ディオアンプ段へ伝送しないようにしたことを特徴とし
ている。
Furthermore, the FM tuner of the present invention includes a control means for controlling the integration time constant of the integrator to a small value in response to a channel selection operation, and the circuit system is equivalently configured as a bypass filter. The system is characterized in that DC fluctuations that occur during station tuning are not transmitted to the audio amplifier stage.

以下本発明について図面を用いて説明づる。The present invention will be explained below with reference to the drawings.

第1図は本発明の実施例を示す回路図であり、IF(中
間周波)信号はSカーブ特性を有するFM検波回路1に
より検波されてコンポジット信号に変換される。この検
波出力はポストアンプ2に直結して入力され増幅される
。このポストアンプは図示する如く抵抗R1及びR2を
帰還抵抗として有する負帰還アンプOP1を有し、この
アンプの出力がマルチプレックス復調回路3へ直結して
入力される。この復調回路3によりそれぞれ第1及び第
2のチャンネル信号である左右オーディオ信号が分離さ
れて次段のオーディオアンプ(図示しない)へこれまた
直結して印加される。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which an IF (intermediate frequency) signal is detected by an FM detection circuit 1 having S-curve characteristics and converted into a composite signal. This detection output is directly connected and input to the post amplifier 2, where it is amplified. As shown in the figure, this post-amplifier has a negative feedback amplifier OP1 having resistors R1 and R2 as feedback resistors, and the output of this amplifier is directly connected and input to the multiplex demodulation circuit 3. The demodulation circuit 3 separates left and right audio signals, which are first and second channel signals, respectively, and directly connects and applies them to an audio amplifier (not shown) at the next stage.

更に、これら左右チャンネル信号はそれぞれ抵抗R3及
びR4により加算合成されて直流負帰還回路4を介して
検波回路1の出カラインタ゛なわちポストアンプ2の逆
相入力へ印加される。この負帰還回路4は逆相入力に先
の左右チャンネル信号が印加され、正相入力に抵抗R5
を介して接地電位が印加された演算増幅器OP2と、こ
の演算増幅器OP2の逆相入力と出力間に設けられた並
列接続構成のコンデンサC1及びC2を有し、この増幅
器OP2の出力が抵抗R6を介してボストノ′ンプの入
力へ帰還される。
Furthermore, these left and right channel signals are added and combined by resistors R3 and R4, respectively, and applied to the output line of the detection circuit 1, ie, the anti-phase input of the post amplifier 2, via the DC negative feedback circuit 4. In this negative feedback circuit 4, the previous left and right channel signals are applied to the negative phase input, and the resistor R5 is applied to the positive phase input.
It has an operational amplifier OP2 to which a ground potential is applied via a resistor R6, and capacitors C1 and C2 connected in parallel between the opposite-phase input and output of the operational amplifier OP2. is fed back to the input of the Boston amplifier.

ここで、演算増幅器OP2とコンデンサC1及びC2と
によりいわゆるミラー積分回路が構成され、その積分時
定数は抵抗R3とR4の並列抵抗とコンデンサC1とC
2の並列容量の積となるが、この積分時定数はスイッチ
SWをオンオフすることにより制御自在となっている。
Here, a so-called Miller integration circuit is configured by the operational amplifier OP2 and the capacitors C1 and C2, and its integration time constant is determined by the parallel resistances of the resistors R3 and R4 and the capacitors C1 and C2.
This is the product of two parallel capacitances, and this integration time constant can be freely controlled by turning on and off the switch SW.

このスイッチSWの制御は選局操作を検出してスイッチ
SWのオフ制御信号を発生するように構成されており、
通常はこのスイッチSWはオンとなっている。
The control of this switch SW is configured to detect a channel selection operation and generate an off control signal for the switch SW.
Normally, this switch SW is on.

第2図は第1図におけるMPX復調回路3の好ましい具
体例を示し、いわゆる周知のチョッパ型復調回路の例で
ある。すなわちコンポジット信号は抵抗R7及びR8に
分岐されてゲート用のスイッチングトランジスタQ1及
びC2によりオンオフゲートされる。このゲートトラン
ジスタQ1及びC2の制御は、コンポジブ1〜信号中の
パイロット信号から得られた38KHzサブキャリヤ信
号の正逆信号により行われ、交互にオンオフすることに
なる。ゲート出力は抵抗R9,R10を介してオペアン
プOP4及びOF2を右するローパス4゜イルタにそれ
ぞれ入力される。このフィルタは更にそれぞれコンデン
サC3、C4及び抵抗R11゜R12を有し、このオペ
アンプOP4及びOF2の出力から左右チャンネル信号
が分離される。
FIG. 2 shows a preferred specific example of the MPX demodulation circuit 3 in FIG. 1, and is an example of a so-called well-known chopper type demodulation circuit. That is, the composite signal is branched to resistors R7 and R8 and turned on and off by gate switching transistors Q1 and C2. The gate transistors Q1 and C2 are controlled by the forward and reverse signals of the 38 KHz subcarrier signal obtained from the pilot signal in the composite 1~ signal, and are turned on and off alternately. The gate outputs are inputted via resistors R9 and R10 to low-pass 4° filters that control operational amplifiers OP4 and OF2, respectively. This filter further includes capacitors C3 and C4 and resistors R11 and R12, respectively, to separate the left and right channel signals from the outputs of the operational amplifiers OP4 and OF2.

更には帰還抵抗R13及びR14を有する演算増幅器O
P3が設【プられており、抵抗R14の調整によってい
わゆる分離度の調節が可能となっている。
Furthermore, an operational amplifier O with feedback resistors R13 and R14
P3 is provided, and the degree of separation can be adjusted by adjusting the resistor R14.

叙述の回路構成において、通常の受信時には積分時定数
制御用スイッチSWは閉じており、よってこの時定数は
大に選定されている。かがる状態においてFM検波回路
1の出力ラインが何等かの原因で直流変動を生じると、
以後の段はすべて直結となっているから、復調出力もそ
れに応じて直流レベルが変動する。ここで、両ヂャンネ
ル出ツクは加算されてDC帰還アンプ4の逆相入力へ印
加され、積分されることになるから、そのDC変動に応
じた直流レベルがアンプ4から出力されてポストアンプ
2の入力へ帰還される。この場合、ポストアンプ2は逆
相アンプ、復調回路3も逆相アンプであり更にDC帰還
アンプ4も逆相アンプ構成であるから、帰還ループはい
わゆる負帰還構成となって、ポストアンプ2への負帰還
レベルを適当に選定することにより信号ラインのDC変
動分を打消すことが可能となる。その結果、検波回路1
から復調回路3の出力までのDC利得をほぼ零とするこ
とができ直結化が可能となるものである。
In the circuit configuration described above, the integration time constant control switch SW is closed during normal reception, and therefore this time constant is selected to be large. If the output line of the FM detection circuit 1 causes DC fluctuations for some reason in a darkening state,
Since all subsequent stages are directly connected, the DC level of the demodulated output varies accordingly. Here, the outputs of both channels are added together, applied to the negative phase input of the DC feedback amplifier 4, and integrated, so that a DC level corresponding to the DC fluctuation is output from the amplifier 4 and output to the post amplifier 2. It is fed back to the input. In this case, the post amplifier 2 is a negative phase amplifier, the demodulation circuit 3 is also a negative phase amplifier, and the DC feedback amplifier 4 is also a negative phase amplifier configuration, so the feedback loop becomes a so-called negative feedback configuration, and the feedback to the post amplifier 2 is By appropriately selecting the negative feedback level, it is possible to cancel DC fluctuations in the signal line. As a result, the detection circuit 1
The DC gain from the output of the demodulation circuit 3 to the output of the demodulation circuit 3 can be made almost zero, making direct connection possible.

次に選局操作時には、例えばチューニングっまみ等の操
作を検出回路5が検知してスイッチ制御信号を発生し、
スイッチSWが開状態となる。従って実質的に積分容量
はコンデンサC1のみとなって積分時定数は小となる。
Next, during a channel selection operation, the detection circuit 5 detects an operation such as turning the tuning knob, and generates a switch control signal.
Switch SW becomes open. Therefore, the only integral capacitance is substantially the capacitor C1, and the integral time constant becomes small.

尚、スイッチSWに並列に設けられた抵抗R7はスイッ
チのオンオフにより生ずるコンデンサC2の充放電によ
るDC変動を防ぐもので、高抵抗が用いられる。従って
、検波回路1の出力から復調回路3の出力までの回路系
は全体として等価的にローカットフィルタ構成として動
作し、いわゆる超低域がカットされlc周波数特性を有
することになる。この周波数特性は第3図において点線
に示すように数ザイクルの遮断周波数を有するから、選
局操作時にIF周波数がいわゆるSカーブをスイープす
る際のDC変動を十分に除去することができ、自動的に
選局によるポツプノイズが除去される。
Note that the resistor R7 provided in parallel with the switch SW prevents DC fluctuations due to charging and discharging of the capacitor C2 caused by turning the switch on and off, and is a high resistor. Therefore, the circuit system from the output of the detection circuit 1 to the output of the demodulation circuit 3 operates equivalently as a low-cut filter configuration as a whole, and has an LC frequency characteristic with the so-called ultra-low frequency band cut off. Since this frequency characteristic has a cutoff frequency of several cycles as shown by the dotted line in Figure 3, it is possible to sufficiently eliminate DC fluctuations when the IF frequency sweeps the so-called S curve during tuning operation, and automatically Pop noise caused by channel selection is removed.

また、第3図の実線は通常動作の時の上記回路系の周波
数特性を示すもので、カップリングコンデンサ等を使用
しないために超低域まで利得が延びていることが判る。
Further, the solid line in FIG. 3 shows the frequency characteristics of the above circuit system during normal operation, and it can be seen that the gain extends to very low frequencies because no coupling capacitor or the like is used.

この様に本発明によればFMチューナの検波段以降をす
べて直結することができ、ひいてはオーディオアンプ段
までの直結化が可能となってHl−Fiチューナが実現
される。また選局時等の離調時においてもバイパスフィ
ルタを信号ラインに挿入することなくポツプ音を除くこ
とができるのでより一層のHi−Hi化が可能となる。
As described above, according to the present invention, everything after the detection stage of the FM tuner can be directly connected, and even the audio amplifier stage can be directly connected, thereby realizing an Hl-Fi tuner. Furthermore, even when tuning is detuned such as when selecting a channel, pop sounds can be removed without inserting a bypass filter into the signal line, making it possible to achieve even higher levels of Hi-Hi.

尚、上記においては負帰還アンプへの入力を左右チャン
ネル信号の合成信号としたが、ステレオ復調回路3内の
左右チャンネル用のアンプOP4及びOR3の特性が均
一であれば左右チャンネル信号のうちいずれか一つを選
択して帰還アンプ人ツノとしてもよい。また、MPX復
調回路としてチョッパ型の回路例を示したが、直流レベ
ルに変化を及ぼさないタイプのものであれば本例に限ら
れることはない。
In the above, the input to the negative feedback amplifier is a composite signal of the left and right channel signals, but if the characteristics of the left and right channel amplifiers OP4 and OR3 in the stereo demodulation circuit 3 are uniform, either one of the left and right channel signals is input. You can select one as the feedback amplifier person horn. Furthermore, although a chopper-type circuit is shown as an example of the MPX demodulation circuit, it is not limited to this example as long as it is of a type that does not affect the DC level.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示す図、第2図は本発明に用
いて好適なMPX復調回路の例を示す図、第3図は本発
明の回路の特性を示す図である。 主要部分の符号の説明 1・・・・・・FM検波回路 2・・・・・・ポストアンプ 3・・・・・・MPX復調回路 4・・・・・・DC帰還アンプ 5・・・・・・選局操作検出回路 特許出願人 パイオニア株式会社 第1図 第2図 第3図
FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing an example of an MPX demodulation circuit suitable for use in the present invention, and FIG. 3 is a diagram showing characteristics of the circuit of the present invention. Explanation of symbols of main parts 1... FM detection circuit 2... Post amplifier 3... MPX demodulation circuit 4... DC feedback amplifier 5... ...Tuning operation detection circuit Patent applicant Pioneer Co., Ltd. Figure 1 Figure 2 Figure 3

Claims (2)

【特許請求の範囲】[Claims] (1)F、M検波回路の検波出力から第1及び第2のチ
ャンネル信号をそれぞれ分離するマルチプレックス復調
回路と、このマルチプレックス復調回路の復調出力を積
分すべくその積分時定数が制御可能な積分器を有しこの
積分比ノ〕を前記FM検波回路の出力ラインへ負帰還す
る負帰還回路と、選局操作に応答して前記積分時定数を
小に制御する制御手段とを含み、前記復調出力の直流電
位変動を抑圧するようにしたことを特徴とするFMヂュ
ーナ。
(1) A multiplex demodulation circuit that separates the first and second channel signals from the detection outputs of the F and M detection circuits, and whose integration time constant can be controlled to integrate the demodulated output of this multiplex demodulation circuit. a negative feedback circuit having an integrator and negative feedback of this integral ratio to the output line of the FM detection circuit; and control means for controlling the integration time constant to a small value in response to a channel selection operation; An FM tuner characterized in that DC potential fluctuations in demodulated output are suppressed.
(2)前記積分器は1人ノj端が接地された演算増幅器
と、その演算増幅器の仙入力端と出力端との間に接続さ
れたコンデンサとを含んでおり、前記制御手段により前
記コンデンサの容量値を制御することを特徴とする特許
請求の範囲第1項記載のFMチューナ。
(2) The integrator includes an operational amplifier whose j terminal is grounded, and a capacitor connected between the input terminal and the output terminal of the operational amplifier, and the control means controls the capacitor. 2. The FM tuner according to claim 1, wherein the FM tuner controls a capacitance value of the FM tuner.
JP6029984A 1984-03-28 1984-03-28 Fm tuner Granted JPS59188251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6029984A JPS59188251A (en) 1984-03-28 1984-03-28 Fm tuner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6029984A JPS59188251A (en) 1984-03-28 1984-03-28 Fm tuner

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP4136979A Division JPS55134553A (en) 1979-04-05 1979-04-05 Fm tuner

Publications (2)

Publication Number Publication Date
JPS59188251A true JPS59188251A (en) 1984-10-25
JPS6229938B2 JPS6229938B2 (en) 1987-06-29

Family

ID=13138149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6029984A Granted JPS59188251A (en) 1984-03-28 1984-03-28 Fm tuner

Country Status (1)

Country Link
JP (1) JPS59188251A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164037U (en) * 1987-04-16 1988-10-26

Also Published As

Publication number Publication date
JPS6229938B2 (en) 1987-06-29

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