JPS59187269U - Vertical output circuit - Google Patents

Vertical output circuit

Info

Publication number
JPS59187269U
JPS59187269U JP8190783U JP8190783U JPS59187269U JP S59187269 U JPS59187269 U JP S59187269U JP 8190783 U JP8190783 U JP 8190783U JP 8190783 U JP8190783 U JP 8190783U JP S59187269 U JPS59187269 U JP S59187269U
Authority
JP
Japan
Prior art keywords
output circuit
output
vertical output
vertical
power source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8190783U
Other languages
Japanese (ja)
Other versions
JPS6324698Y2 (en
Inventor
畑田 英夫
茂 高須
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP8190783U priority Critical patent/JPS59187269U/en
Publication of JPS59187269U publication Critical patent/JPS59187269U/en
Application granted granted Critical
Publication of JPS6324698Y2 publication Critical patent/JPS6324698Y2/ja
Granted legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の垂直出力回路の一例を示す結線図、第2
図及び第3図は従来の垂直出力回路の説明に供する波形
図、第4図は本考案垂直出力回路の一実施例を示す結線
図、第5図は本考案の実施例の説明に供する波形図であ
る。 4及び5は出力トランジスタ、6は垂直偏向コイル、7
はコンデンサ、11はサイリスタ、18はインダクタで
ある。
Figure 1 is a wiring diagram showing an example of a conventional vertical output circuit;
3 and 3 are waveform diagrams for explaining the conventional vertical output circuit, FIG. 4 is a wiring diagram showing an embodiment of the vertical output circuit of the present invention, and FIG. 5 is a waveform diagram for explaining the embodiment of the present invention. It is a diagram. 4 and 5 are output transistors, 6 is a vertical deflection coil, 7
is a capacitor, 11 is a thyristor, and 18 is an inductor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 出力トランジスタの第1の出力電極をコンデンサを介し
て第1の電源に接続するか又は接地すると共に、サイリ
スタを介して上記第1の電源の電圧より高い電圧の第2
の電源に接続し、上記出力トランジスタの第2の出力電
極を垂直偏向コイルの一端に接続して成り、上記垂直偏
向コイルに得られる帰線パルスによって上記サイリスタ
をオンさせるようにした垂直出力回路において、上記第
2の電源と上記サイリスクとの間にインダクタを挿入し
たことを特徴とする垂直出力回路。
A first output electrode of the output transistor is connected to a first power source via a capacitor or grounded, and a second output electrode of a voltage higher than the voltage of the first power source is connected via a thyristor.
in a vertical output circuit, wherein the second output electrode of the output transistor is connected to one end of a vertical deflection coil, and the thyristor is turned on by a retrace pulse obtained in the vertical deflection coil. , a vertical output circuit characterized in that an inductor is inserted between the second power source and the sirisk.
JP8190783U 1983-05-31 1983-05-31 Vertical output circuit Granted JPS59187269U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8190783U JPS59187269U (en) 1983-05-31 1983-05-31 Vertical output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8190783U JPS59187269U (en) 1983-05-31 1983-05-31 Vertical output circuit

Publications (2)

Publication Number Publication Date
JPS59187269U true JPS59187269U (en) 1984-12-12
JPS6324698Y2 JPS6324698Y2 (en) 1988-07-06

Family

ID=30211854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8190783U Granted JPS59187269U (en) 1983-05-31 1983-05-31 Vertical output circuit

Country Status (1)

Country Link
JP (1) JPS59187269U (en)

Also Published As

Publication number Publication date
JPS6324698Y2 (en) 1988-07-06

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