JPS59187258A - Automatic balancing circuit for eddy current test equipment - Google Patents

Abstract

PURPOSE:To obtain an automatic balancing circuit which can remove unwanted singals effectively without being affected by the speed of inspection by a follow- up control of the feedback gain of the automatic balancing circuit in proportion to the speed of material to be detected. CONSTITUTION:Output of an adder 13 is applied to a gain controller 14 and increased or decreased by a gain controlled by a control signal applied to a controller 14 from a speed counter 16 and then, applied to an adder 3 to cancel the output. A pulse encoder 15 outputs one pulse at each unit moving distance of material to be detected. The output is counted with the counter 16 in terms of a specified gate time and converted into a digital value continuously proportional to the speed. This digital value so acts to increase the gain of the controller 14 as the speed of the material being detected grows larger. Therefore, the feedback gain of the automatic balancing circuit in a cancelling signal generation circuit 5 is proportional to the moving speed of the material being detected thereby enabling a higher reliability eliminating effect of noises.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in an automatic balance circuit for an eddy current flaw detector, and more particularly to an improvement in an automatic balance circuit for an eddy current flaw detector that uses the output of a phase detection circuit to cancel out the output of an eddy current detector. It is something.

In eddy current flaw detection equipment, which is used as an online flaw inspection device, constant changes in measurement conditions 2. For example, material changes such as the loft of the test material, slow temperature changes, and gaps between the detection coil and the test material. The impedance of the detection coil changes due to a slow change in the detection coil, and an unbalanced voltage appears in the balancer in which the detection coil is one piece, or in the differential output of the two detection coils. This signal is also larger than the unbalanced voltage generated by the change in impedance of the detection coil due to a flaw, making it difficult to detect flaws. An automatic balance circuit is provided in ordinary eddy current flaw detection equipment in order to suppress such unnecessary unbalanced signals as much as possible.

Conventionally, the automatic balance circuit of eddy current flaw detection equipment has used a system as shown in Fig. 1. In the figure, (11 is an oscillator that excites the detection coil in the balancer, (2) is a balancer in which the detection coil is one or two pieces of the balancer, and (3) is the output of the cancellation signal generation circuit (5). Balancer (2)
a first adder, which acts to cancel the unbalanced signal of (
4) is an amplifier that amplifies the output of the first adder by the required amount, and (5) is a cancellation signal generator that generates a signal that cancels the unbalanced signal output of the balancer (2) using the output of the amplifier (4). circuits, (6) and (11 are phase detectors that output components with a phase difference of 90 degrees from each other, (7) and αυ are integration circuits,
(8) and C2 are modulators, 03 is the above two modulators (8
), a second adder that vectorially adds the outputs of C2, (9
) is a 90° phase shifter.

Next, the operation will be explained. The output signal of the oscillator (1) is applied to the detection coil of the balancer (2). Balancer (2)
The unbalanced signal output of is input to the first adder (3) and
The output signal of the adder (3) is amplified by the required amount by the amplifier (4). A part of the output signal of the amplifier (4) is outputted to an output circuit (not shown) and used for defect determination, and the other part is inputted to the phase detector (6) and the like.

The phase detector (6) and α [are respectively the above oscillator (1)
The phase of the other reference signal and the reference signal obtained by shifting the output of the oscillator (1) by 90 degrees by a 90 degree phase shifter (9) are detected, and components having phases different by 90 degrees from each other are output.

The output signals of the phase detector (6) and α[ are input to the integrator (7) and αυ, respectively, and are converted into integrated DC signals. The output signals of the integrator (force and C1υ are input to modulators (8) and α, respectively. Modulators (8) and C
The output of No. 2 is modulated by the DC signals input from the integrator (7) and αυ, respectively, to the output signals of the oscillator (1) and the 90 degree phase shifter (9), and the DC signal voltage of the integrator is modulated. The modulated output has a proportional amplitude and the phase is reversed by 180 degrees when the polarity of the DC signal of the integrator is reversed, and the outputs of the modulator (8) and C12 are outputs of vector components orthogonal to each other. The second adder performs vector addition of the outputs of the modulators (8) and (J2) and sends it to the first adder (3), where the output signal of the first adder (3) is canceled. It is added as follows.

The transfer function G(ω) from the input of the adder (3) to which the output of the balancer (2) of the conventional automatic balance circuit as described above is added to the output of the amplifier (4) is determined as follows. The sum of the gain of the first adder (3) and the gain of the amplifier (4) is G
I, the sum of the detection gain of the phase detector (6) or al in the cancellation signal generation circuit (5), the modulation gain of the modulator (8) or C2, and the gain of the second adder, that is, the feedback gain. 02. CR the integral constant of the integrator.

Let ω be the changing angular velocity of the signal input from the balancer (2) to the adder (3).

The transfer function G(ω) is G(ω)=Gt/T 1+(GI02/ωCR))
(If the angular velocity of 11 is ωC, then ωC=GIG2/CR(2).

Also, if the response time or time constant is τ, then τ=1/ωC
== CR/Gl~ (3) Given.

Figure 2 shows the frequency characteristics of equation (1) above.
The g-axis G is the gain, and the horizontal axis ω is the balancer (2) to adder (3).
The changing angular velocity of the signal input to ωC is the above (2)
The n Rush wave number given by the formula, and G1 is the adder (3)
is the sum of the gain of the amplifier (4) and the gain of the amplifier (4). As can be fully understood from the frequency characteristics shown in Figure 2, the automatic balance circuit is caused by changes in the material of the test material as a lot, slow temperature changes, slow changes in the gap between the detection coil and the test material, etc. If, like the input signal, the angular velocity ω at which the signal changes is sufficiently lower than the interruption angular velocity ωC, the output signal will be sufficiently attenuated.

When the changing angular velocity ω is high like a defect signal, G
It is amplified with a gain of l and appears as a signal at the output.

By the way, in the conventional automatic balance circuit, the integration constant CR of the integrator is selected by a switch and the test is carried out using a fixed response time, which has the following problems. In other words, (1) If the response time is set to a small value, the defect output will be large if the inspection speed is fast, and small if the inspection speed is slow, even for the same defect, depending on the speed of the inspected material (2)
Therefore, in online defect inspection with a wide range of inspection speeds, the response time must be selected to be large.

(3) If the response time is selected to be large, signal changes due to changes in the gap between the detection coil and the material being tested will become faster due to the faster inspection speed, and when signal changes due to changes in the material etc. also become faster, it will not be possible to remove them sufficiently.

This invention was made in order to solve the problems of the conventional automatic balance circuit as described above, and provides an automatic balance circuit that is not affected by inspection speed and effectively removes unnecessary signals. .

An embodiment of the present invention shown in FIG. 3 will be described below. In FIG. 3, the first adder (3).

Amplifier (4) 9-phase detector (6) and H, integrator (7)
and αυ, the modulator (8) and the second adder 03 of α are similar to those shown in FIG. α4 is a gain controller using, for example, a digital attenuator.

α9 is a pulse encoder that contacts the material to be inspected with a roller or the like and generates a pulse every time the material to be inspected moves a unit distance, and a counter that counts the encoder output at regular intervals.Next, this invention Detailed explanation of.

In FIG. 3, a first adder (3) and an amplifier (4).

The phase detector (6) and a[, the integrator (7) and aυ, the modulator (8) and α side, and the second adder are the same as those shown in FIG. The output of the second adder (131) is applied to the gain controller α4, where it is amplified or attenuated by the gain controlled by the control signal applied from the speed counter aQ to the gain controller α4, and then sent to the first adder (3). , are added so that the output signals of the first adder (3) are canceled.

Pulse encoder a! 9rrz Contacts the test material via a roller or the like, and outputs one pulse for each unit movement distance of the test material. This output is counted by a speed counter Q51 at a predetermined gate time, and is converted into a digital value proportional to the speed every moment. This digital value is applied to, for example, a digitally controlled subtenator, and as a result, as the speed of the specimen increases, the gain of the gain controller 04 increases.

Therefore, the phase detection in the cancellation signal generation circuit f5): 5
(6) or special detection gain, modulator 18) or modulation gain of a2, second adder (gain of L, sum of gains of gain controller I, i.e. feedback gain G2 of the automatic balance circuit
is given by G, =KV (41), where K is the proportional coefficient to the moving speed V of the test material.

The sum of the gain of the adder (3) and the gain of the amplifier (4) is GI,
If the time constant of the integrator (7) and αD is CR, the transfer function G(ω) of this automatic balance circuit is expressed by the above equation (1), and therefore, the above equation (1) is added to the above equation (4). ), we get ()(ω)=Gl/(1+(Gl/?ucR)
)KV) (It becomes 51.

Therefore, if the breaking angular velocity is ωC, ωc = (G
l /CR) Kv (becomes 61.

Long response time τbar = l /ωC = CR/GI KV
(7) becomes.

The frequency characteristic of Equation 15) above is similar to the characteristic shown in Fig. 2, but as shown in Equation (6), the velocity V
If the velocity V becomes faster, the breaking angular velocity ωC increases in proportion to that, and if the moving velocity V of the specimen becomes slower, it decreases in proportion.

The frequency component of the flaw signal is approximately determined by the size of the flaw and the speed of the material to be inspected, and the frequency component is proportional to the moving speed of the material to be inspected. Therefore, by setting the proportionality coefficient K so that the breakage angular velocity ωC is equal to or slightly lower than the angular velocity ωS of the target flaw signal.

The flaw signal frequency is always at the breaking angular velocity ωC or a slightly higher angular velocity, regardless of the inspection speed.

As described above, according to the present invention, f'L is controlled to follow the feedback gain of the automatic balance circuit in proportion to the speed of the test material, thereby increasing the response time τ of the automatic balance circuit, or in other words, the breaking angular velocity ωC. Since the output follows the moving speed of the inspected material, it is possible to solve the conventional problem of outputting a large amount when the moving speed of the inspected material is fast and small when the moving speed of the inspected material is low, even if there is a defect. This eliminates the conventional problem that when the moving speed is high, the gap between the detection coil and the material to be inspected changes quickly, causing the automatic balance circuit to fail to respond and output unnecessary signals. We can provide high quality eddy current flaw detection equipment.

In the embodiment shown in Fig. 3, the gain controller is provided on the output side of the second adder 0, but it can be placed anywhere within the feedback circuit from the output of the amplifier (4) to the input of the adder (3). Phase detector (6) and (II), integrator (7) and a
A similar function may be provided in the modulator (8) and the second adder (H). Also, although a pulse encoder is used as a speed detector for the material to be inspected, other detectors may also be used.Although the speed counter aI19 is used as a control signal for the gain controller 04, it may also be controlled by a digital calculator. Various modifications may be made without departing from the above.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an automatic balance circuit of a conventional eddy current flaw detection device, FIG. 2 is a diagram showing the frequency characteristics of FIG. 1, and FIG. 3 is a diagram showing an embodiment of the present invention. In the figure, (1) is an oscillator, (2) is a balancer, (3) is a first adder, (4) is an amplifier, (5) is a cancellation signal generation circuit, (6) and a [are phase detection (force and aυ are integrators, (8) and a are modulators, (9) is a 90 degree phaser, α rise is a second adder,
(I4) is a gain controller, α9 is a pulse encoder, α
e is a speed counter. In the drawings, the same or corresponding parts are designated by the same reference numerals. Agent Masuo Oiwa = 35';

Claims (1)

[Claims] a first adder that receives an unbalanced signal as one of its inputs, an amplifier that amplifies the output of the first adder by a required amount, and phase-detects the output of the amplifier using a reference signal that differs by 90 degrees;
Two phase detectors that output mutually orthogonal vector components, two integrators that integrate the outputs of the respective phase detectors, and an alternation of mutually orthogonal vector components by the outputs of the above-mentioned integrators. It is equipped with two modulators that generate signals, and a second adder that performs vector addition of the outputs of the respective modulators and provides the vector addition to the first adder, and according to the output of the second adder. In an automatic 7272 circuit for an eddy current flaw detector designed to cancel unbalanced signals, a variable feedback gain is provided in the feedback circuit of the automatic balance circuit consisting of the phase detector, integrator, modulator, and second adder. and a speed detection means for detecting the moving speed of the material to be inspected, the gain of the variable feedback gain means being varied in accordance with the speed detected by the speed detection means to adjust the response time of the automatic balance circuit to the material to be inspected. An automatic balance circuit for an eddy current flaw detection device, characterized in that the circuit follows the speed in inverse proportion to the speed of the eddy current flaw detection device.