JPS5918590U

JPS5918590U - Two-phase DC brushless motor drive circuit

Info

Publication number: JPS5918590U
Application number: JP1982111811U
Authority: JP
Inventors: 秀夫高橋
Original assignee: 日本電気株式会社
Priority date: 1982-07-23
Filing date: 1982-07-23
Publication date: 1984-02-04

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図はホール素子の動作原理を説明するためのモータ
ロータおよびホール素子の斜視図、第２図は第１・図の
ホール素子の出力波形図、第３図は従来の二相直流ブラ
シレスモータ駆動回路のブロック回路図、第４図は本考
案の一実施例のブロック回路図、第５図ａ　”−ｃは第
４図の回路動作を説明するための動作波形図である。】・・・・・・ホール素子、２・・曲パルス発生回路、
３・・・・・・差動アンプ、４・・・・・・バッファ、
６・・曲プリドライバ、７・・・・・・パワードライバ
、ａ、ｉａ・・・・・・モータ、１１・・・・・・カウ
ンタ、１２・・・・・・・分割回路、１３・・・・・・
位相制御信号発生回路、１４・・・・・・クロックパル
ス発生回路、１５・・・・・・遅延回路。Figure 1 is a perspective view of the motor rotor and Hall element to explain the operating principle of the Hall element, Figure 2 is an output waveform diagram of the Hall element in Figures 1 and 3, and Figure 3 is a conventional two-phase DC brushless motor drive. FIG. 4 is a block circuit diagram of an embodiment of the present invention, and FIGS. 5a-c are operation waveform diagrams for explaining the circuit operation of FIG. 4.]... ... Hall element, 2... Curved pulse generation circuit,
3...Differential amplifier, 4...Buffer,
6... Song predriver, 7... Power driver, a, ia... Motor, 11... Counter, 12... Division circuit, 13...・・・・・・
Phase control signal generation circuit, 14... Clock pulse generation circuit, 15... Delay circuit.

Claims

[Scope of utility model registration request]

A Hall element for rotor rotational position detection, a pulse output circuit that receives the output of this Hall element and outputs pulses, a clock pulse generation circuit that generates clock pulses, and an output pulse (, original output pulse) is input, and the number of clock pulses during the period T of the original output pulse is N, then 174N
a phase control signal generating circuit for generating a phase control signal for delaying the original output pulse phase by 1/4T time obtained by multiplying this 174N by the period of the clock pulse; A delay circuit that delays the original output pulse phase by 174T time using an output signal of the circuit, and an amplifier circuit that amplifies the original output pulse and the output of the delay circuit and supplies a winding current to the motor windings. A two-phase DC brushless morph drive circuit featuring: