JPS5918582U - Control device for inverter - Google Patents

Control device for inverter

Info

Publication number
JPS5918582U
JPS5918582U JP7499583U JP7499583U JPS5918582U JP S5918582 U JPS5918582 U JP S5918582U JP 7499583 U JP7499583 U JP 7499583U JP 7499583 U JP7499583 U JP 7499583U JP S5918582 U JPS5918582 U JP S5918582U
Authority
JP
Japan
Prior art keywords
conversion device
detection circuit
inverter
control device
inverse conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7499583U
Other languages
Japanese (ja)
Other versions
JPS6019516Y2 (en
Inventor
渋谷　忠士
Original Assignee
株式会社明電舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社明電舎 filed Critical 株式会社明電舎
Priority to JP7499583U priority Critical patent/JPS6019516Y2/en
Publication of JPS5918582U publication Critical patent/JPS5918582U/en
Application granted granted Critical
Publication of JPS6019516Y2 publication Critical patent/JPS6019516Y2/en
Expired legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は逆変換装置により電気炉を制御したときの負可
電流と電圧および逆電圧の関係を示す波形図１．第２図
は本考案の一実施例を示す一部をブロックで表示した構
成説明図、第３図はパルス発生時間検出回路の具体的な
回路図、第４図は第３図の動作を説明するための波形図
である。 １・・・順変換装置、４・・・逆変換装置、６・・・負
荷、７・・・転流余裕時間検出回路、８・・・点弧信号
発生装置、９・・・ゲート制御回路。Figure 1 is a waveform diagram showing the relationship between negative current, voltage, and reverse voltage when an electric furnace is controlled by an inverter. Fig. 2 is an explanatory block diagram showing a part of an embodiment of the present invention, Fig. 3 is a specific circuit diagram of a pulse generation time detection circuit, and Fig. 4 explains the operation of Fig. 3. FIG. DESCRIPTION OF SYMBOLS 1... Forward conversion device, 4... Inverse conversion device, 6... Load, 7... Commutation margin time detection circuit, 8... Firing signal generation device, 9... Gate control circuit .

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 順変換装置と、この装置の出力を負荷に適する電力に変
換して与える逆変換装置と、この装置に並列接続され逆
変換装置の転流余裕時間検出回路と、この検出回路に接
続されこの検出々力がなくなると前記順変換装置の出力
を低減させるゲート制御回路とよりなる逆変換装置の制
御装置。A forward conversion device, an inverse conversion device that converts the output of this device into power suitable for the load and provides it, a commutation margin time detection circuit of the inverse conversion device that is connected in parallel to this device, and a commutation margin time detection circuit that is connected to this detection circuit and that detects this. A control device for an inverse conversion device comprising a gate control circuit that reduces the output of the forward conversion device when power is exhausted.
JP7499583U 1983-05-19 1983-05-19 Control device for inverter Expired JPS6019516Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7499583U JPS6019516Y2 (en) 1983-05-19 1983-05-19 Control device for inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7499583U JPS6019516Y2 (en) 1983-05-19 1983-05-19 Control device for inverter

Publications (2)

Publication Number Publication Date
JPS5918582U true JPS5918582U (en) 1984-02-04
JPS6019516Y2 JPS6019516Y2 (en) 1985-06-12

Family

ID=30205077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7499583U Expired JPS6019516Y2 (en) 1983-05-19 1983-05-19 Control device for inverter

Country Status (1)

Country Link
JP (1) JPS6019516Y2 (en)

Also Published As

Publication number Publication date
JPS6019516Y2 (en) 1985-06-12

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