JPS59183530A - Superconductive gate circuit - Google Patents

Abstract

PURPOSE:To bring a value of an output current to a desired amplitude by making an output current of a superconductive gate circuit to an input current of the other superconductive gate circuit. CONSTITUTION:One superconductive gate circuit G1 has input terminals TA, TA', a bias source H1 and an output terminal B1. The other superconductive gate circuit G2 has an input terminal A3, a bias source H2 and an output terminal B2 and the input terminal A3 is connected to the output terminal B1 of the superconductive gate circuit G1 via a resistor R3. An output current D of the superconductive gate G2 becomes superimposed between an output current C of the superconductive gate circuit G1 and a bias current F from the bias source H2. Thus, the current to a load M is made to plural number of times the input current value.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a superconducting gate circuit having a superconducting gate circuit including a Josephson junction.

Conventionally, in such a superconducting gate circuit, a superconducting gate circuit including the Josephson junction has a pair of input terminals, a bias terminal, and an output terminal, and an input terminal leading to the pair of input terminals. A magnetic coupling type structure has been proposed in which a bias current passing through a bias end is derived as an output current through an output end in response to current supply.

In the case of a magnetically coupled superconducting gate circuit that includes such a Josephson junction, the bias current is input to the
If it has a value that is multiple times the value of the current or more,
An output current can be drawn through the output having a value that is multiple times the value of the input current. Therefore,
Multiple superconducting logic circuits can be driven in parallel using the output current from the superconducting gate circuit.

In this case, if we assume that the Josephson junction has a large Josephson current value, then if only bias current is supplied to the superconducting gate circuit, the superconducting gate circuit must be in a zero voltage state. Since the value of the bias current can be made larger than its Josephson current value, in this way, a Josephson junction can be If the value of the bias current is set accordingly, then when deriving the output current as having a value that is multiple times the value of the input current, it is possible to calculate the multiple values. Therefore, when multiple superconducting logic circuits are driven in parallel with the output current from the superconducting gate circuit, the values of the multiple superconducting logic circuits can be increased.

However, increasing the Josephson current value in this way means that the product of the Josephson current value and the inductance due to the inductor included in the superconducting gate circuit and the superconducting wiring related thereto is the magnetic flux quantum. Therefore, the inductance of the inductor and related superconducting wiring must be kept small, but there is a certain limit to how small the inductance can be.

Therefore, in the case of a conventional magnetically coupled superconducting gate circuit including a Josephson junction, when multiple superconducting logic circuits are driven in parallel with the output current from the superconducting gate circuit, the It had the disadvantage that there was a certain limit to increasing the value of .

Therefore, although the present invention has a magnetically coupled superconducting gate circuit that includes a Josephson junction, it is an object of the present invention to propose a novel superconducting gate circuit that does not have the above-mentioned drawbacks. .

First, an example of a superconducting gate circuit according to the first invention of the present application will be described with reference to FIG.

An example of a superconducting gate circuit according to the first invention of the present application is
It has the following configuration.

That is, an example of the superconducting gate circuit according to the first invention of the present application includes a pair of first and second input terminals A1 and A2,
a first bias end E1, a first output end B1;
Depending on the supply of input current through input terminals △1 and A2,
It has a magnetically coupled gate circuit G1 including a Josephson junction, which derives the bias current passing through the bias end E1 as an output current through the output end B1.

This superconducting gate circuit G1 has, by way of example, the following configuration which is known per se.

That is, it has a Josephson junction J1, an inductor L1, and a Josephson junction J2, which are connected in this order to form a closed loop, while the midpoint of the inductor L1 is connected to the bias end through the resistor RO. E
1, and the connection midpoint of Josephson junctions J1 and J2 is connected to ground.

≠It is magnetically coupled to the inductor L1, and both ends are connected to the input terminal A1.
and A2, respectively.

The above is an example of the configuration of the circuit G1 to the superconducting gate 1.

Further, an example of the superconducting gate circuit according to the first invention of the present application includes, in addition to the superconducting gate circuit G1 described above, a third input terminal A3, a second bias terminal E2, and a second output terminal B2.
and a second superconducting gate circuit G2.

This superconducting gate circuit G2 includes, for example, a Josephson junction J3 connected between a bias end E2 and ground through a first resistor R1, and an input end A2 and an output end B.
2 is connected to the midpoint between the resistor R1 and the Josephson junction J3.

Thus, the bias terminal E1 of the superconducting gate circuit G1 is connected to the bias power supply terminal ]1, and the output @B1 is connected to the input OWA3 of the superconducting gate circuit G2.

In addition, the bias terminal E2 of the superconducting gate circuit G2 is connected to the bias power supply terminal H1 or the second bias power supply terminal (bias power supply terminal 1''2 in the figure), and the output terminal B1 is connected to the superconducting gate via the resistor R3 as necessary. Input terminal A3 of circuit G2
are connected to each.

Further, input terminals A1 and A2 of the superconducting gate circuit G1 are connected to first and second signal input terminals TA and TA', respectively.
has been derived.

Furthermore, a signal output end TD is led out from the output end B2 of the superconducting gate circuit G2.

The above is an example of the configuration of the superconducting gate circuit according to the first invention of the present application.

According to one example of the structure of the superconducting gate circuit according to the first invention of the present application, the following operation can be obtained.

That is, if a bias current B is supplied to the bias power supply terminal H1, the bias current B is supplied to the superconducting gate circuit G1 as a bias current passing through the bias terminal E1 of the superconducting gate circuit G1.

In addition, if input type mA is supplied between the signal input terminals TA and TA' between the signal input terminals TA and TA', the input current A will be the input terminal A1 of the superconducting goo 1 to circuit G1.
and as the input current through A2, the superconducting gate circuit G1
supplied to

For this reason, as mentioned above, at the bias power supply terminal) 1,
If input current A is supplied between signal input terminals TA and TA' while bias current B is supplied, superconducting gate circuit G1 has a configuration that is known per se, so detailed explanation will be omitted. transitions from a zero voltage state to a voltage state.

As a result, the bias current B is led out as the output current C through the resistor BO of the superconducting gate circuit G1 to the output terminal B1.

The output current C is then supplied to the Josephson junction J3 of the superconducting gate circuit G2 through the resistor R2, through the input terminal A3 of the superconducting gate circuit G2.

On the other hand, if a bias current F is supplied to the bias power supply terminal H2, the bias current F is supplied to the superconducting gate circuit G2 as a bias current passing through the bias @tE2 of the superconducting gate circuit G2.

Therefore, if the output current C is supplied to the Josephson junction J3 of the superconducting gate circuit G2 as described above while the bias current F is supplied to the bias power supply terminal H2, the superconducting gate circuit G2 Josephson junction J3 transitions from zero voltage state to voltage applied state.

As a result, if a load M is connected in advance between the signal output terminal TD and the ground, the superconducting gate circuit receives a superimposed current of the output current C and the bias current F to the load M as the output current. It passes through the output faB2 of G2, and then the signal output [
It is fed through TD.

Therefore, the present application shown in FIG. If you apply the superconducting gate circuit according to the first invention, the bias power supply end 1'1 and H
By supplying the input current A between the signal input terminals TA and TA' while supplying the bias currents B and F to the terminals 2 and 2, respectively, the output current is passed through the signal output terminal TD. It can be supplied to load M.

By the way, in the case of the superconducting gate circuit according to the first invention of the present application shown in FIG. 1, the value of the output current supplied to the load M is equal to the output current C output from the superconducting gate circuit G1.
and the bias current F supplied to the bias power supply terminal:
The value of the bias current F (which is called If) is the Josephson current value I of the Josephson junction J3, and the value of the output current C is I. When, If+Ic >I+ >Ir・・・・・・・・・・・・
...It can be increased as needed while satisfying the relationship (1). Note that this equation (1) is a conditional expression that guarantees that the Josephson junction J3 changes from a zero-voltage state to a voltage-carrying state when the output current C is supplied.

Therefore, according to the superconducting gate circuit according to the first invention of the present application shown in FIG. It is possible to output a value that is a plurality of n times the value of (this is referred to as I8).

In this case, in the superconducting gate circuit G1, as mentioned above, the Josephson junctions J1 and J2 are
Even without changing the Josephson current value or increasing the value of bias current B accordingly,
When the output current is derived as having a value that is a plurality of n times the value of the input current A, the value of the plurality n can be made large as desired, so that the output current is A feature of the present invention is that when a plurality of superconducting logic circuits are driven in parallel, the plurality of values can be increased as desired.

Next, with reference to FIG. 2, an example of a super hidden gate buried circuit according to the second invention of the present application will be described.

In FIG. 2, parts corresponding to those in FIG. 1 are designated by the same reference numerals.

An example of the superconducting gate circuit according to the second invention of the present application shown in FIG. 2 has the same configuration as the superconducting gate circuit according to the first invention of the present application described above in FIG. 1, except for the following matters. has.

That is, in addition to the superconducting gate circuits G1 and G2, the fourth and fifth input terminals A4 and A5, and the third bias terminal E3
and a third output terminal B3.

Also, the bias terminal E3 of the superconducting gate circuit G3 is the bias power supply Q'1 if H1 or H2, or the third bias power supply terminal]3 (in the figure, the bias power supply terminal H3)
and is also connected to the output terminal B3 of the superconducting gate circuit G3.
is connected to the input terminal E3 of the superconducting gate circuit G2 via a resistor R4 as necessary.

Further, the input terminal A2 of the superconducting gate circuit G1 is connected to the input terminal A4 of the superconducting gate circuit G3 instead of being connected to the signal manipulator terminal TA'.

Furthermore, the input terminal A5 of the superconducting gate circuit G3 is connected to the signal input fm TA'.

The above is an example of the configuration of a superconducting gate circuit according to the second invention of the present application.

According to the superconducting gate circuit according to the second invention of the present application having such a configuration, except for the above-mentioned matters,
It has the same configuration as the superconducting gate circuit according to the first invention of the present application, which is shown in FIG.

Therefore, although a detailed explanation will be omitted, as in the case of the superconducting gate circuit according to the first invention of the present application described above in FIG. , while the bias current K is being supplied to the bias power supply terminal 1''3, the bias power supply terminal T
If an input current A is supplied to A and TA', an output current can be outputted from the signal output terminal TD based on the input current A.

However, in the case of the superconducting gate circuit according to the second invention of the present application shown in FIG. 2, from the superconducting gate circuit G3,
Since an output current P corresponding to the output current C of the superconducting gate circuit G1 is output, the output current is equal to the bias current F supplied to the bias power supply terminal)2 and the superconducting gate circuit G1. It is obtained as a superposition of the output current C from G1 and the output current P from the superconducting gate circuit G2.

Therefore, compared to the case of the superconducting gate circuit according to the first invention of the present application described above in FIG. has.

In addition, in the case of the superconducting gate circuit according to the first invention of the present application described above in FIG. The ratio of the output current C to the value IC is I+/
If Io is large, then Il in equation 1) as mentioned above becomes I
lN! Iv, and thus the Josephson junction J3
There is a risk that the voltage may erroneously transition from a zero voltage state to a voltage state.

However, in the case of the superconducting gate circuit according to the second invention of the present application shown in FIG. 2, when the value of the output current P is ■, Ir +Ic +IF'>Is...
...(2a) It>If+Ic ...
・・・・・・・・・・・・(2b) 11>If+Ip
・・・・・・・・・・・・・・・ Since it is sufficient to satisfy the relationship (2a), there is no possibility that the Josephson junction J3 will transition from the zero voltage state to the voltage state due to the bias current F alone. It has the characteristic of not having

Next, with reference to FIG. 3, an example of a super low gate logic circuit according to the third invention of the present application will be described.

At d3 in FIG. 3, corresponding parts to those in FIG. 2 are designated by the same reference numerals.

An example of the superconducting gate circuit according to the third invention of the present application shown in FIG. 3 has the same configuration as the superconducting gate circuit according to the first invention of the present application described above in FIG. 1, except for the following matters. has.

That is, the output terminal B1 of the superconducting gate circuit G1 is connected to the resistor R.
In addition to 3, the superconducting gate circuit G is connected via the second resistor R2.
2 input @A3, and also superconducting gate circuit G
The output terminal 83 of the superconducting gate circuit G2 is connected to the input GEf A 3 of the superconducting gate circuit G2 via the resistor R2 mentioned above.

The above is an example of the configuration of a superconducting gate circuit according to the third invention of the present application.

According to the superconducting gate circuit according to the third invention of the present application having such a configuration, it is the same as the superconducting gate circuit according to the second invention of the present application described above in FIG. It has a similar configuration.

Therefore, in the case of the superconducting gate circuit according to the third invention of the present application shown in FIG. Effects can be obtained.

However, in the case of the superconducting gate circuit according to the third invention of the present application shown in FIG. 3, since it has a resistor R2,
When supplying input current A between signal input terminals TA and TA' to output an output current, superconducting gate circuit G
1 transitions from a zero voltage state to a voltage state faster than the superconducting gate circuit G2, then the output current C output from the superconducting gate circuit G1 changes from superconducting gate circuit G1 to circuit G2. and G3.

Therefore, the superconducting gate circuit 3 immediately transitions from the zero voltage state to the voltage state after the superconducting gate circuit G1 transitions from the zero voltage state to the voltage state.

Therefore, the superconducting gate circuit according to the third invention of the present application, which is not shown in FIG. 3, operates at a higher speed than the superconducting gate circuit according to the first invention of the present application, shown in FIG. , and (X).

Incidentally, in "Above">IIS, only one example was shown for each of the superconducting gate circuits according to the present invention box 1, the second invention, and the third invention, and without departing from the spirit of the present invention. , various modifications and changes may be made.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram showing an example of a superconducting gate circuit according to the first invention of the present application. FIG. 2 is a connection diagram showing an example of a superconducting gate circuit according to the second invention of the present application. FIG. 3 is a connection diagram showing an example of a superconducting gate circuit according to the third invention of the present application. Gl, G2. G3 ・・・・・・・・・・・・Superconducting gate circuit A1
~A5...Input terminal E1-E3...Bias terminal 81-B3...Output terminal Ll, L2...Inductor TA, TΔ'...Signal Input terminal H1-H3...Bias power supply terminal TD...
・・・・・・・・・Signal output terminal M・・・・・・・・・
......Load RO-R4...Resistance applicant Nippon Telegraph and Telephone Public Corporation

Claims (1)

[Claims] 1. having a pair of first and second input terminals, a first bias terminal, and a first output terminal, an input current passing through the first and second input terminals; a magnetically coupled first superconductor including a Josephson junction, the bias current passing through the first bias end being outputted as an output current through the first output end in response to the supply of the first superconductor; It has a gate circuit, a third input terminal, a second bias terminal, and a second output terminal, and a Josephson junction is connected between the second bias terminal and ground through a first resistor. a second superconducting gate circuit, the third input terminal and the second output terminal being connected to a connection midpoint of the resistor and the Josephson junction; The first bias terminal of the conduction gate circuit is connected to the first bias power supply terminal, and the first output terminal is connected to the second bias terminal.
are respectively connected to the third input terminals of the superconducting gate circuits, and the second bias terminal of the second superconducting gate circuit is connected to the first bias voltage #A terminal or the second bias power supply terminal. connected, first and second signal input terminals are led out from the first and second input ends of the first superconducting gate circuit, respectively, and a second output terminal J of the second superconducting gate circuit is connected. A superconducting gate circuit characterized in that a signal output end is derived from the end. 2. having a pair of first and second input terminals, a first bias terminal, and a first output terminal, in response to supply of an input current through the first and second input terminals; The bias current passing through the first bias end is used as the output current]
A magnetically coupled first superconducting gate circuit including a Josephson junction and a third input terminal, a second bias terminal, and a second output terminal. A Josephson junction is connected between the second bias terminal and ground through a first resistor, and the third input terminal and the second output terminal are connected to the Josephson junction between the resistor and the ground. a second superconducting gate circuit connected to the connection midpoint of the junction; a pair of fourth and fifth input terminals; a third bias terminal; and a third output terminal; and a Josephson junction that, in response to supply of an input current through the fourth and fifth input terminals, derives a bias current passing through the third bias terminal as an output current through the third output terminal. and a magnetically coupled third superconducting gate circuit, wherein the first bias end of the first superconducting gate circuit is connected to the first bias power supply end, and the first output end of the first superconducting gate circuit is connected to the first bias power source end. Second
a second bias end of the second superconducting gate circuit is connected to the first bias power supply end or the second bias power supply end; The third bias terminal of the third superconducting gate circuit is connected to the first or second bias power terminal or the third bias power terminal, and the third output terminal is connected to the third bias terminal of the second superconducting gate circuit. A first signal input terminal is connected to the first input terminal of the first superconducting gate circuit, and a first signal input terminal is connected to the fifth input terminal of the third superconducting gate circuit. A superconducting game 1 characterized in that signal input terminals are respectively led out, and a signal node J terminal is led out from a second output terminal of the second superconducting gate circuit.
circuit to. 3. having a pair of first and second input terminals, a first bias terminal, and a first output terminal, and responsive to the supply of input current through the first and second input terminals; a magnetically coupled first superconducting gate circuit including a Josephson junction, which derives the bias current passing through the first bias end as an output current through the first output Di1; a third input terminal, a second bias terminal, and a second output terminal; a Josephson junction is connected between the second bias terminal and ground through a first resistor; a second superconducting gate circuit in which a third input terminal and a second output terminal are connected to a connection midpoint between the resistor and the Josephson junction; a pair of fourth and fifth input terminals; a third bias terminal and a third output terminal, and in response to supply of input current passing through the fourth and fifth input terminals, the bias current passing through the third bias terminal is set as an output current. and a magnetically coupled third superconducting gate circuit including a Josephson junction, which is led out through the third output terminal, and the third superconducting gate circuit of the first superconducting gate circuit The first bias terminal is connected to a first bias power supply terminal, the first output terminal is connected to a third input terminal of the second superconducting gate circuit through a second resistor, and the second superconducting gate circuit is connected to the second superconducting gate circuit. A second bias end of the gate circuit is connected to the first bias power supply terminal or the second bias power supply terminal, and a third bias end of the third superconducting gate circuit is connected to the first bias power supply terminal or the second bias power supply terminal. The third output terminal is connected to a power supply terminal or a third bias power supply @ through the second resistor to a third input terminal of the second superconducting gate circuit, and the first superconducting gate A first signal input terminal is derived from the first input terminal of the circuit, a second signal input terminal is derived from the fifth input terminal of the third superconducting group 1 to the circuit, and the third superconducting A superconducting gate circuit characterized in that a signal output terminal is derived from a second output terminal of the gate circuit.