JPS59181082A - Semiconductor laser and manufacture thereof - Google Patents

Semiconductor laser and manufacture thereof

Info

Publication number
JPS59181082A
JPS59181082A JP5412583A JP5412583A JPS59181082A JP S59181082 A JPS59181082 A JP S59181082A JP 5412583 A JP5412583 A JP 5412583A JP 5412583 A JP5412583 A JP 5412583A JP S59181082 A JPS59181082 A JP S59181082A
Authority
JP
Japan
Prior art keywords
electrode layer
melting point
layer
high melting
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5412583A
Other languages
Japanese (ja)
Inventor
Shohei Matsumoto
松本 尚平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5412583A priority Critical patent/JPS59181082A/en
Publication of JPS59181082A publication Critical patent/JPS59181082A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0201Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
    • H01S5/0202Cleaving

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To improve the positioning accuracy of a reflecting surface by mesa etching the side face of a mount of a semiconductor, forming the opposite surface of a high melting point barrier electrode layer in the same surfce as the reflecting surface of a resonator, and forming the peripheral edge of the heat sink electrode layer inside the high melting point barrier electrode layer. CONSTITUTION:A contacting electrode layer 6 and a high melting point barrier electrode layer 7' are formed on a semiconductor wafer of InGaAsP/InP, a striped window perpendicularly crossing the layer 7' is formed. Au is selectively plated by a mask for covering completely the striped window, and a rectangular heat sink Au electrode layer 2 is formed. After an ohmic electrode 8 is formed on the back surface of the wafer, the layer 6 is etched through the window in the same shape as the layer 7', with the layer 7' as a mask InGaAsP and InP are selectively etched to form a slot 14. An element is isolated along the slot 14, and the layer 2 is mounted on the heat sink with the layer 2 underneath.

Description

【発明の詳細な説明】 本発明は半導体レーザ及びその製造方法に関する。[Detailed description of the invention] The present invention relates to a semiconductor laser and a method for manufacturing the same.

光フアイバー通信用及び情報処理用光源として用いられ
る半導体レーザは、高い電流密度で使用されるから、信
頼性の高い電極を用い、放熱を効果的に行々うことか重
要となる。
Semiconductor lasers used as light sources for optical fiber communications and information processing are used at high current densities, so it is important to use highly reliable electrodes and to dissipate heat effectively.

この様に放熱効果が大きく信頼性の高い電極として、従
来、活性層のp−n接合に近い側の半導体表面上にTi
/Pt/Au電極を形成したものが多く用いられている
。このT i/P t/Au電極のAu電極層はヒート
シンクを兼ねて10〜20μmの厚い層となっているこ
とが多い。仁の厚いAu tit極層は共振器の反射面
を形成する際に行なう弁開によっては分断しにくいから
、従来、選択エツチングもしくは選択メッキによ、9A
u電極層のみ、矩形状に電極分離し、Au電極層のない
巾20〜30μmのストライプ溝部の中央を弁開する様
にしていた。
Conventionally, Ti has been used as a highly reliable electrode with a large heat dissipation effect on the semiconductor surface of the active layer near the p-n junction.
/Pt/Au electrodes are often used. The Au electrode layer of this Ti/Pt/Au electrode often serves as a heat sink and is a thick layer of 10 to 20 μm. Since the thick Au tit pole layer is difficult to separate by opening the valve when forming the reflective surface of the resonator, conventionally, selective etching or selective plating has been used to
Only the U electrode layer was separated into rectangular electrodes, and the valve was opened at the center of a striped groove portion with a width of 20 to 30 μm where there was no Au electrode layer.

しかしながらこの電極構造では、Au電極層のないスト
ライプ溝部の中央を弁開しようとしても弁開縁が真直ぐ
走らず、屈曲し、片方のレーザ素子側に片寄ることが多
い。このため、反射面近傍の活性領域上の電極層でAu
電極層がない領域が増した側のレーザ素子では、反射面
近傍で発生する熱の放散が悪くなる。また、弁開がAu
電極層の端面に沿っておこっだ側のレーザ素子では、S
n。
However, with this electrode structure, even if an attempt is made to open the center of a striped groove where there is no Au electrode layer, the valve opening edge does not run straight, but is often bent and biased toward one laser element side. Therefore, in the electrode layer on the active region near the reflective surface, Au
In the laser element on the side where the area without the electrode layer is increased, the dissipation of heat generated near the reflective surface becomes worse. Also, the valve opening is made of Au.
In the laser element on the side along the end face of the electrode layer, S
n.

A u + 8 r等の融着材によるダイヤモンドもし
くはSl等のヒートシンクへのレーザ素子の、いわゆる
アップサイドダウン型のマウントの際、Au電極側面を
はい上がった上記融着材がPt、Ti電極側面を越えて
半導体と接触しゃすくなム素子特性の劣化を早めるとい
う欠点があった。また、弁開面と垂直方向の素子分離の
際のカミソリ刃、及びレーザ素子を掴むピンセットによ
り素子側面のp−n接合露出部をキズつけることによっ
てもp−n接合のリーク電流の増大という特性劣化が見
られた。
When a laser element is mounted in a so-called upside-down type on a heat sink such as diamond or Sl using a fusing material such as Au+8R, the fusing material that crawls up the side surface of the Au electrode is attached to the side surface of the Pt or Ti electrode. This has the disadvantage of accelerating the deterioration of the characteristics of the element, which does not come into contact with the semiconductor beyond this point. In addition, the leakage current of the p-n junction increases when the exposed p-n junction on the side surface of the device is scratched with a razor blade when separating the device in a direction perpendicular to the valve opening plane, or with tweezers that grip the laser device. Deterioration was observed.

第1図は、ヒートシンク用Au電極層を具備しり従来の
InGaAsP/InP系プレーナストライプ構造の半
導体レーザとその製造方法を示すだめの図であシ、同図
(a)は弁開による素子分離前のウェハの上面図、同図
(b)は同図(a)の一点鎖線1における矢視断面図、
同図(c)は同図<a)、 (b)のウエノ1から分離
後のレーザ素子の見取り図である。本図(a)及層13
からp型InPクラッド層12までZn選択拡散より形
成されたストライブ状の活性領域が位置することを示す
。また、この一点鎖線1の真下にレーザ共振器の軸があ
る。n聾InP基板9上に順にn型InPクラッド層1
05発振波長1.3μmに対応した組成からなるInG
aAsP活性層11゜p型InPクラッド層12.及び
一点鎖線に沿いストライブ状にZn選択拡散されたp型
InGaAsPキャップ層13が形成され、その上にT
iからなシショットキ型オーミック電極である接触電極
層6、Ptからなる高融点バリア電極層7及び矩形状に
電極分離された厚さ10〜20μmのヒートシンク用A
u電極層2が形成され、またn型InP基板9の裏面に
はAuGe N iのn Iqオーミック電極層8が形
成されている。
Figure 1 is a schematic diagram showing a conventional InGaAsP/InP-based planar stripe structure semiconductor laser equipped with an Au electrode layer for a heat sink and its manufacturing method. A top view of the wafer in FIG.
FIG. 4(c) is a sketch of the laser element after being separated from the wafer 1 shown in FIGS. This figure (a) and layer 13
This shows that a stripe-shaped active region formed by selective Zn diffusion is located from 1 to 12 to the p-type InP cladding layer 12. Furthermore, the axis of the laser resonator is located directly below this dashed line 1. An n-type InP cladding layer 1 is sequentially formed on an n-deaf InP substrate 9.
05 InG with a composition corresponding to the oscillation wavelength of 1.3 μm
aAsP active layer 11° p-type InP cladding layer 12. A p-type InGaAsP cap layer 13 in which Zn is selectively diffused in stripes is formed along the dashed line, and T
A contact electrode layer 6 which is a Schottky-type ohmic electrode made of i, a high melting point barrier electrode layer 7 made of Pt, and a heat sink A with a thickness of 10 to 20 μm with electrodes separated into rectangular shapes.
A u electrode layer 2 is formed, and an n Iq ohmic electrode layer 8 of AuGeNi is formed on the back surface of the n-type InP substrate 9.

従来、上述のウェハ状態から、矩形状に分離されたヒー
トシンク用Au電極層2の間のストライプ溝部3の中央
を弁開する際、弁開縁が破線4−4′の如く曲折し、A
uti極層2の端面に沿って弁開面ができることもあり
、対称性の悪い、形状のばらついたレーザ素子が多く生
じた。上記ストライプ溝部3の幅は弁開刃を入れられる
程度に広くしてあり、通常20〜30μである。従って
上述の如く勇開面がストライブ溝部3の中央からそれる
と、片側のレーザ素子では、共振器反射面の位置から2
0〜30μmnにもわたってヒートシンク用Au電極層
2のない部分が生じ、共振器反射面近傍で発生する熱の
放散が悪くな9、反射面劣化を誘引する原因となった。
Conventionally, when opening the center of the stripe groove 3 between the heat sink Au electrode layers 2 separated into rectangular shapes from the above-mentioned wafer state, the opening edge of the valve is bent as shown by the broken line 4-4',
A valve opening surface was sometimes formed along the end face of the UTI pole layer 2, resulting in many laser elements having poor symmetry and varying shapes. The width of the stripe groove 3 is wide enough to accommodate a valve opening blade, and is usually 20 to 30 microns. Therefore, as mentioned above, if the opening plane deviates from the center of the stripe groove 3, the laser element on one side will be 2 degrees from the position of the cavity reflecting surface.
A portion where the Au electrode layer 2 for a heat sink was not formed was formed over a range of 0 to 30 μm, which resulted in poor dissipation of heat generated near the resonator reflective surface 9 and induced deterioration of the reflective surface.

また、弁開面がAu電極層2の端面と一致する側では、
SrもしくはAuSn等の融着材でレーザ素子のヒート
シンク用Au電極2を、Si もしくはダイヤモンド等
のヒートシンク側にマウントする際、融着材が71u、
Pt及びTi電極層の側面を伝って半導体5と接触し易
くなりレーザ素子特性の劣化を早めるという欠点があっ
た。また、弁開面と垂直方向の素子分離の際のカミソリ
刃及びレーザ素子を屑むピンセットにより、素子側面の
p−n接合露出部をキズつけることによってもp−n接
合のリーク電流の増大という特性劣化が見られた。
In addition, on the side where the valve opening surface coincides with the end surface of the Au electrode layer 2,
When mounting the Au electrode 2 for the heat sink of the laser element on the heat sink side of Si or diamond using a fusing material such as Sr or AuSn, the fusing material is 71u,
This has the disadvantage that it tends to come into contact with the semiconductor 5 through the side surfaces of the Pt and Ti electrode layers, accelerating the deterioration of the laser device characteristics. In addition, when the device is separated in the direction perpendicular to the valve opening plane, the exposed p-n junction on the side of the device may be scratched with a razor blade or tweezers used to scrap the laser device, causing an increase in the leakage current of the p-n junction. Deterioration of characteristics was observed.

不発明の目的は、共振器反射面が弁開により位置制御性
よく形成でき、製造歩留りのよい半導体レーザ及びその
製造方法の提供にある。
An object of the invention is to provide a semiconductor laser and a method for manufacturing the same, in which a resonator reflecting surface can be formed with good position control by opening a valve, and the manufacturing yield is high.

本発明による半導体レーザの構成は、ヒートシンク用A
u電極層ととのAu電極層の下に形成された高融点バリ
ヤ電極層とを含むオーミック電極層が半導体のマウント
側の表面に彫成しである半導体レーザに於いて、共振器
の反射面近傍を除き前記半導体の前記マウント側の側面
がメサエッチングされていることと、前記共振器の軸方
向における前記高融点バリヤ電極層の端面は前記反射面
とほぼ同一面内にあることと、前記ヒートシンク用Au
電極層の周縁は前記高融点バリヤ電極層の周縁より内側
にあることとを%徴とする。
The structure of the semiconductor laser according to the present invention is as follows:
In a semiconductor laser in which an ohmic electrode layer including a U electrode layer and a high melting point barrier electrode layer formed under an Au electrode layer is carved on the surface of the semiconductor mount side, the reflective surface of the resonator The side surface of the semiconductor on the mount side except for the vicinity thereof is mesa-etched; the end face of the high melting point barrier electrode layer in the axial direction of the resonator is substantially in the same plane as the reflective surface; Au for heat sink
It is assumed that the periphery of the electrode layer is located inside the periphery of the high melting point barrier electrode layer.

本発明による半導体レーザの製造方法の構成は、半導体
のウェハのマウント側表面に順に接触電極層及び高融点
バリヤ電極、@を形成する第1の工程、互いに平行な隣
り合う共振器の軸の間に位置する第1のストライプ状窓
と、前記共振器の軸長をく  ・9返しピッチとしてく
り返され第1のストライプ状窓と直角に交叉し前記共振
器軸の上方でのみ途切れた第2のストライプ状窓とを前
記高融点バリヤ電極層に設ける第2の工程、前記第1及
び第2のストライプ状窓を完全に覆いかつ前記第2のス
トライプ状窓の前記途切れた部分も狭い幅のストライプ
で連絡して覆った格子状のフォトレジストマスクをメッ
キマスクとしてAuの選択メッキを行ない擬矩形状のA
u 電極層を形成する第3の工程、前記第1及び第2の
ストライプ状窓を通して前記接触電極層を前記高融点バ
リヤ層と同じ形状にエツチングし更にこの高融点バリヤ
層をマスクとして前記半導体を深くメサエッチングする
第4の工程、前記第2のストライプ状窓を通してメサエ
ッチングされて生じた溝に沿って襞間し前記共振器の反
射面を形成する第5の工程、及び前記第1のストライプ
状窓を通してメサエッチングされて生じた溝に沿って素
子分帥する第6の工程からなることを特徴とする。
The structure of the method for manufacturing a semiconductor laser according to the present invention includes a first step of sequentially forming a contact electrode layer and a high melting point barrier electrode on the mount side surface of a semiconductor wafer; A first striped window located at the axial length of the resonator and a second striped window that is repeated at a pitch of 9 and intersects at right angles to the first striped window and is interrupted only above the resonator axis. a second step of providing a striped window in the high melting point barrier electrode layer, completely covering the first and second striped windows and also forming a narrow width striped window in the second striped window; Selective plating of Au was performed using a grid-like photoresist mask covered with connected stripes as a plating mask to form a pseudo-rectangular A.
u. A third step of forming an electrode layer, etching the contact electrode layer into the same shape as the high melting point barrier layer through the first and second striped windows, and further etching the semiconductor using the high melting point barrier layer as a mask. a fourth step of performing deep mesa etching; a fifth step of forming a reflective surface of the resonator by forming folds along the grooves formed by mesa etching through the second striped window; and a fifth step of forming a reflective surface of the resonator. The method is characterized by comprising a sixth step of separating the elements along the grooves formed by mesa etching through the shaped windows.

次に図面を参照して本発明の詳細な説明する。Next, the present invention will be described in detail with reference to the drawings.

第2図は本発明による半導体レーザとその製造方法の実
施例を説明するための図であシ、同図(a)は弁開によ
る素子分離前のウェハの上面図、同図(b)は同図(a
)の二点鎖線A−A’における矢視断面図、同図(C)
は同図(a)のウエノ・から素子分離後のレーザ構造の
見取り図である。半導体5の層構造は第1図と同様であ
り、第2図(c)では活性層に付随したp−n接合面1
6のみを簡単化して太線で示しだ。
FIG. 2 is a diagram for explaining an embodiment of a semiconductor laser and its manufacturing method according to the present invention. FIG. 2(a) is a top view of a wafer before element separation by opening a valve, and FIG. The same figure (a
) is a sectional view taken along the two-dot chain line A-A', the same figure (C)
2 is a sketch of the laser structure after element separation from Ueno shown in FIG. The layer structure of the semiconductor 5 is the same as that in FIG. 1, and in FIG. 2(c), the p-n junction surface 1 attached to the active layer is
Only 6 is simplified and shown with a thick line.

第1図と同様の半導体ウェハ上に、まずTi又はOrか
らなるショットキ型オーミック電極の接触電極層6.W
又はMoからなる高融点バリヤ電極層7′を真空蒸着も
しくは高周波スパッタ蒸着によυ形成する。次に高融点
バリヤ゛電極層7′に、共振器軸に平行で隣り合う共振
器軸間に位置する第1のストライプ状窓と、共振器長を
繰り返しピッチとして繰り返され上記第1のストライプ
状窓と直角に交叉し、共振器軸上方でのみとぎれた第2
のストライプ状窓とをフォトレジスト法及びWもしくは
MOのx7チング液4 HN40ET+ I I(20
!による選択エツチングにより− 7、    1 ゛
←設ける。続いて、上記第1及び第2のストライプ状窓
を完全に覆い、かつ第2のストライブ状窓のとぎれた部
分も狭い幅(約5〜10μm)のストライプで連絡して
覆った格子状のフォトレジストマスクをメッキマスクと
してAuの選択メッキを行ない、反射面近傍の活性領域
部15で反射面側に突起形状を有する擬矩形状のヒート
シンク用Au電極層2を形成する。
First, a contact electrode layer 6 of a Schottky type ohmic electrode made of Ti or Or is formed on a semiconductor wafer similar to that shown in FIG. W
Alternatively, a high melting point barrier electrode layer 7' made of Mo is formed by vacuum deposition or high frequency sputter deposition. Next, the high melting point barrier electrode layer 7' is provided with a first striped window parallel to the resonator axis and located between adjacent resonator axes, and a first striped window that is repeated with the resonator length as a repeating pitch. The second section intersects the window at right angles and is interrupted above the resonator axis.
striped windows and photoresist method and W or MO x7 coating solution 4 HN40ET+II (20
! -7, 1゛← is provided by selective etching. Next, a lattice-like structure was formed, which completely covered the first and second striped windows and also covered the broken portions of the second striped windows by connecting stripes with a narrow width (approximately 5 to 10 μm). Selective plating of Au is performed using a photoresist mask as a plating mask, and a quasi-rectangular Au electrode layer 2 for a heat sink having a protrusion shape on the reflective surface side is formed in the active region 15 near the reflective surface.

次にn型InP基板の裏面を研磨しウェハ厚を約100
11m K薄くした後AuGeNi のn型オーミック
電極8を形成する。続いて高融点バリヤ電極層7′に設
けられた前記第1及び第2のストライブ状窓を通して、
TiもしくはOrの接触電極層6を、高融点バリヤ電極
層7′と同じ形状即ち活性領域近傍上のみストライブ状
窓のとぎれた格子状窓にエツチングし、更に高融点バリ
ヤ層7′をマスクとして、硫酸+過酸化水素系もしくは
塩酸十過酸化水素系のエツチング液によt)InGaA
sP及びInPを選択エツチングし深さ20〜3074
mの溝部14を半導体5に形成する。その後前記第2の
ストライブ状窓を通してメサエッチされた溝に沿って骨
間し、共振器の反射面を形成することにより溝のない活
性領域近傍の反射面を弁開面で構成できる。最後に前記
第1のストライブ状窓を通してメサエッチされた溝に沿
って素子分離を完成させ、得られたレーザ素子をSnも
しくはAuSn等の融着材を用いて、Siもしくはダイ
ヤモンド等のヒートシンク上にレーザ素子のヒートシン
ク用Au電極層2を下にしてマウントする。
Next, polish the back side of the n-type InP substrate to reduce the wafer thickness to approximately 100 mm.
After thinning by 11 mK, an n-type ohmic electrode 8 of AuGeNi is formed. Subsequently, through the first and second striped windows provided in the high melting point barrier electrode layer 7',
A contact electrode layer 6 of Ti or Or is etched in the same shape as the high melting point barrier electrode layer 7', that is, into a lattice window with striped windows interrupted only in the vicinity of the active region, and further using the high melting point barrier layer 7' as a mask. , t) InGaA with an etching solution of sulfuric acid + hydrogen peroxide type or hydrochloric acid/deca hydrogen peroxide type.
Selective etching of sP and InP to depth 20-3074
A groove portion 14 of m is formed in the semiconductor 5. Thereafter, the second stripe-shaped window is passed through the mesa-etched groove to form a reflective surface of the resonator, thereby making it possible to configure the reflective surface in the vicinity of the active region without the groove as a valve open surface. Finally, device isolation is completed along the mesa-etched groove through the first striped window, and the obtained laser device is placed on a heat sink of Si or diamond using a bonding material such as Sn or AuSn. The laser device is mounted with the heat sink Au electrode layer 2 facing down.

この様な本発明の製造方法によれば、共振器軸に垂直で
活性領域近傍(共振器軸の上部)でとぎれたストライプ
状の溝に沿って確実にsrj!Jmが走り、溝のない活
・踵領域近傍の反射面は弁開面で構成され、該骨間面の
位置の制御性も高くなり、その結果ヒートシンク用Au
電極層間の幅を5〜10μmと狭くしてもその間隙の中
央を骨間でき活性領域の反射面近傍での熱放散を有効に
行なえる。
According to the manufacturing method of the present invention, the srj! The reflective surface near the active/heel region where Jm runs and has no grooves is composed of a valve-open surface, and the position of the interosseous surface is highly controllable, and as a result, the Au heat sink
Even if the width between the electrode layers is narrowed to 5 to 10 .mu.m, the center of the gap can be formed between the bones, allowing effective heat dissipation in the vicinity of the reflective surface of the active region.

また反射面の位置とヒートシンク用Au電極層の端面と
の間の距離も制御性良く一定に保てるから、反射面以外
の溝の形成された部分も含めヒートシンク用Au電極層
の周縁が高融点バッファ電極層の周縁よりも完全に内側
に位置する。したがって、融着材が高融点バッファ電極
層及び接触電極層の側面を通シ越して半導体と接触する
ことがないから、素子特性が安定に維持される。更に共
振器の反射面近傍を除きレーザ素子の側面がメサエッチ
されているから、側面のp−n接合部がn型InP基板
側面より内側に引込んでいる。従′って反射面以外のレ
ーザ素子の側面をビンセット等で狭む際、ピンセント等
が側面のp −11接合部に触れないからP−n接合部
をキズっけた9汚したシすることがなく、この点でも素
子特性を劣化させないという付随効果が得られる。
Furthermore, since the distance between the position of the reflective surface and the end face of the Au electrode layer for the heat sink can be kept constant with good controllability, the periphery of the Au electrode layer for the heat sink, including the grooved portion other than the reflective surface, is a high melting point buffer. It is located completely inside the periphery of the electrode layer. Therefore, since the fusing material does not pass through the side surfaces of the high-melting point buffer electrode layer and the contact electrode layer and come into contact with the semiconductor, the device characteristics can be maintained stably. Furthermore, since the side surfaces of the laser element are mesa-etched except for the vicinity of the reflecting surface of the resonator, the pn junction on the side surfaces is recessed inward from the side surface of the n-type InP substrate. Therefore, when narrowing the sides of the laser element other than the reflective surface with a pin set, etc., the pins etc. do not touch the P-11 junction on the side, so do not scratch or stain the P-N junction. This also provides the additional effect of not deteriorating the device characteristics.

尚、上述の実施例において、ショットキ型オーミック電
極としては接触電極層のTiをOrでまた高融点バッフ
ァ電極層のWをM6で置き換えても同様の効果が得られ
る。高融点バッファ電極層をPtとすることも可能であ
るが、との場合ptは化学エツチングが容易に行なえず
、イオンエツチング等の物理的エツチングを必要とする
In the above embodiment, the same effect can be obtained by replacing Ti in the contact electrode layer with Or and replacing W in the high melting point buffer electrode layer with M6 in the Schottky type ohmic electrode. It is also possible to use Pt as the high melting point buffer electrode layer, but in this case, Pt cannot be easily chemically etched and requires physical etching such as ion etching.

以上、プレーナストライプ構造を実施例として説明した
が8102ストライプ構造のように、半導体表面の大部
分が絶縁膜で覆われている構造であっても、本発明の方
法が適用できることは言うまでもない。この絶縁膜はS
in、の他に、PSG(phospho−ailica
te glass )やSiNでも差支えない。このよ
うな構造では、TiもしくはOr等の接触電極層はなく
ても良く、またメサエ、チンダ液として1〜2%ブロム
メタノールを用いればV字形の溝ができ、骨間がより精
度よく実現できる。
Although the planar stripe structure has been described as an example above, it goes without saying that the method of the present invention can also be applied to a structure in which most of the semiconductor surface is covered with an insulating film, such as the 8102 stripe structure. This insulating film is S
In, besides PSG (phospho-ailica
(te glass) or SiN may also be used. In such a structure, there is no need for a contact electrode layer such as Ti or Or, and if 1 to 2% bromine methanol is used as the mesae or tinda solution, a V-shaped groove can be created and the interosseous area can be realized with more precision. .

以上、InGaAs’P/InP、i長波長レーザを例
にとシ、説明してきたが、その他の半導体材料を用い九
牛導体レーザについても本発明を適用できることは言9
背でも々い。
Although the explanation has been given above using InGaAs'P/InP and i long wavelength lasers as examples, it goes without saying that the present invention can also be applied to nine conductor lasers using other semiconductor materials.
It's too tall.

以上説明したように、本発明によれば、共振器反射面が
骨間によシ位四制御性よく形成でき、製造歩留りのよい
半導体レーザ及びその製造方法が提供できる。
As described above, according to the present invention, it is possible to provide a semiconductor laser and a method for manufacturing the same, in which the resonator reflecting surface can be formed between the bones with good controllability, and the manufacturing yield is high.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体レーザとその製造方法を説明する
だめの図、第2図は本発明による半導体レーザとその製
造方法の一実施例を説明するための図であり、各図中、
(a)、(b)及び(c)は、素子分離前のウェハ上面
図、このウェハの断面図及びそのウェハから素子分離後
のレーザ素子の見取り図をそれぞれ示す。 1・・・・・・共振器の活性領域、2・・・・・・ヒー
トシンク用Au電極層、3・・・・・・ストライプ状溝
部(Au電極層のない部分)、5・・・・・・半導体層
、6・・・・・・ショットキ型オーミック電極の接触電
極層、7・・・・・・高融点バリヤ電極層(Pt)、7
/・・・・・・高融点バリヤ電極層(WもしくはMo)
、8・・・・・・n型オーミック電極、9・・・・・・
n型InP基板、10・・・・・・n型InPクラッド
層、11・・・・・・InGaAsP活性層、12・・
・・・・p型InPクラッド層、13・・・・・・In
GaAsPキャップ層、14・・・・・・ストライブ状
溝部(メサエッチングされた部分)、15・・・・・・
活性領域の反射面近傍、16・・・・・・活性層に付随
したp−n接合、17・・・・・・メサエッチング側面
。 #2 固
FIG. 1 is a diagram for explaining a conventional semiconductor laser and its manufacturing method, and FIG. 2 is a diagram for explaining an embodiment of a semiconductor laser and its manufacturing method according to the present invention.
(a), (b), and (c) respectively show a top view of a wafer before device separation, a cross-sectional view of this wafer, and a sketch of a laser device after device separation from the wafer. 1... Active region of resonator, 2... Au electrode layer for heat sink, 3... Striped groove portion (portion without Au electrode layer), 5... ... Semiconductor layer, 6 ... Contact electrode layer of Schottky type ohmic electrode, 7 ... High melting point barrier electrode layer (Pt), 7
/...High melting point barrier electrode layer (W or Mo)
, 8... n-type ohmic electrode, 9...
n-type InP substrate, 10... n-type InP cladding layer, 11... InGaAsP active layer, 12...
...p-type InP cladding layer, 13...In
GaAsP cap layer, 14... Striped groove portion (mesa etched portion), 15...
Near the reflective surface of the active region, 16...p-n junction attached to the active layer, 17... side surface of mesa etching. #2 Hard

Claims (1)

【特許請求の範囲】 (1)  ヒートシンク用Au電極層ととのAu電極層
の下に形成された高融点バリヤ電極層とを含むオーミッ
ク電極層が半導体のマウント側の表面I/C形成しであ
る半導体レーザに於いて、共振器の反射面近傍を除き前
記半導体の前記マウント側の側面がメサエッチングされ
ていることと、ことと、前記ヒートシンク用Au電極層
の周縁は前記高融点バリヤ電極層の周縁よシ内側にある
とととを特徴とする半導体レーザ。 (2、特許請求の範囲第1項記載の半導体レーザにおい
て、前記オーミック電極はTi又はOrからなる接触電
極層を含み、この接触電極層は前記高融点バリヤ電極層
の下にあり前記半導体と接触し、前記高融点バリヤ電極
層はW又はMoからなることを特徴とする半導体レーザ
。 (3)特許請求の範囲第1項又は第2項記載の半導体レ
ーザにおいて、前記共振器上部を除く領域の前記表面と
前記オーミック電極との間に絶縁膜が介在させであると
とを特徴とする半導体レーザ。 (4)半導体のウェハのマウント側表面に順に接触電極
層及び高融点バリヤ電極層を形成する第1の工程、互い
に平行な隣り合う共振器の軸の間に位置する第1のスト
ライプ状窓と、前記共振器の軸長をくり返しピッチとし
てくり返され第1のストライプ状窓と直角に交叉し前記
共振器軸の上方でのみ途切れた第2のストライプ状窓途
切れた部分も狭い幅のストライプで連絡して覆った格子
状のフォトレジストマスクをメッキマスクとしてAuの
選択メッキを行ない擬矩形状のAu電極層を形成する第
3の工程、前記第1及び第2のストライプ状窓を通して
前記接触電極層を前記高融点バリヤ層と同じ形駄にエツ
チングし更にこの高融点バリヤ層をマスクとして前記半
導体を深くメサエッチングする第4の工程、前記第2の
ストライプ状窓を通してメサエッチングされて生じた溝
に沿って弁開し前記共振器の反射面を形成する第5の工
程、及び前記第1のストライプ状窓を通してメサエッチ
ングされて生じた溝に沿って素子分離する第6の工程か
らなることを特徴とする半導体レーザの製造方法。
[Claims] (1) An ohmic electrode layer including an Au electrode layer for a heat sink and a high melting point barrier electrode layer formed under the Au electrode layer forms an I/C on the surface of the semiconductor mount side. In a certain semiconductor laser, the side surface of the semiconductor on the mount side except for the vicinity of the reflection surface of the resonator is mesa-etched, and the periphery of the Au electrode layer for the heat sink is formed by the high melting point barrier electrode layer. A semiconductor laser characterized by a dot and a dot on the inner side of the periphery. (2. In the semiconductor laser according to claim 1, the ohmic electrode includes a contact electrode layer made of Ti or Or, and the contact electrode layer is under the high melting point barrier electrode layer and is in contact with the semiconductor. A semiconductor laser characterized in that the high melting point barrier electrode layer is made of W or Mo. (3) In the semiconductor laser according to claim 1 or 2, the area other than the upper part of the resonator is A semiconductor laser characterized in that an insulating film is interposed between the surface and the ohmic electrode. (4) A contact electrode layer and a high melting point barrier electrode layer are sequentially formed on the mount side surface of the semiconductor wafer. The first step is to form a first striped window located between the axes of adjacent resonators that are parallel to each other, and a first striped window that is repeated at a repeating pitch of the axial length of the resonator and intersects at right angles to the first striped window. The second striped window is discontinued only above the resonator axis.The discontinuous portion is also connected with narrow stripes and covered with a grid-like photoresist mask as a plating mask, and selective plating of Au is performed to form a quasi-rectangular shape. a third step of forming an Au electrode layer, etching the contact electrode layer through the first and second striped windows into the same shape as the high melting point barrier layer, and using the high melting point barrier layer as a mask to form the contact electrode layer; a fourth step of deep mesa etching of the semiconductor; a fifth step of opening a valve along a groove formed by mesa etching through the second striped window to form a reflective surface of the resonator; and a fifth step of forming a reflective surface of the resonator. A method for manufacturing a semiconductor laser, comprising a sixth step of separating elements along grooves formed by mesa etching through a striped window.
JP5412583A 1983-03-30 1983-03-30 Semiconductor laser and manufacture thereof Pending JPS59181082A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5412583A JPS59181082A (en) 1983-03-30 1983-03-30 Semiconductor laser and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5412583A JPS59181082A (en) 1983-03-30 1983-03-30 Semiconductor laser and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS59181082A true JPS59181082A (en) 1984-10-15

Family

ID=12961870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5412583A Pending JPS59181082A (en) 1983-03-30 1983-03-30 Semiconductor laser and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS59181082A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04223387A (en) * 1990-12-25 1992-08-13 Matsushita Electron Corp Semiconductor light emitting element and manufacture thereof
US5180685A (en) * 1990-04-02 1993-01-19 Sharp Kabushiki Kaisha Method for the production of a semiconductor laser device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5180685A (en) * 1990-04-02 1993-01-19 Sharp Kabushiki Kaisha Method for the production of a semiconductor laser device
JPH04223387A (en) * 1990-12-25 1992-08-13 Matsushita Electron Corp Semiconductor light emitting element and manufacture thereof

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