JPS59177214U - low frequency amplifier - Google Patents
low frequency amplifierInfo
- Publication number
- JPS59177214U JPS59177214U JP6009784U JP6009784U JPS59177214U JP S59177214 U JPS59177214 U JP S59177214U JP 6009784 U JP6009784 U JP 6009784U JP 6009784 U JP6009784 U JP 6009784U JP S59177214 U JPS59177214 U JP S59177214U
- Authority
- JP
- Japan
- Prior art keywords
- output
- emitters
- low frequency
- frequency amplifier
- whose
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案による低周波増幅器の第１の実施例を示
す回路図、第２図はその第２の実施例を示す回路図であ
る。
Ｑ工ないしＱ７・・・トランジスタ、Ｄ工ないしＤｌ。
・・・ダイオード、Ｒ□ないしＲ７・・・抵抗、■１な
いしＩ３・・・定電流源、Ｓ・・・入力信号。FIG. 1 is a circuit diagram showing a first embodiment of a low frequency amplifier according to the present invention, and FIG. 2 is a circuit diagram showing a second embodiment thereof. Q engineering or Q7...transistor, D engineering or Dl. ...Diode, R□ to R7...Resistor, ■1 to I3...Constant current source, S...Input signal.
Claims (1)
第２の駆動トランジスタと、ベースがそれぞれ前記第１
及び第２の駆動トランジスタのエミッタに接続され、エ
ミッタが前記出力点にて共通接続される第１及び第２の
出力トランジスタを備え、前記第１及び第２の駆動トラ
ンジスタのベースに正負に変化する入力信号を印加して
プッシュプル動作するものにおいて、前記第１及び第２
の出力トランジスタのベースと出力点の間にそれぞれス
イッチング素子を介してバイアス回路を設け、該バイア
ス回路により前記第１または第２の出力トランジスタへ
、バイアスを供給して、これらのターンオフを妨げ、Ａ
級モードで動作するように構成したことを特徴とする低
周波増幅器。first and second drive transistors whose emitters are respectively commonly connected at the output point; and whose bases are respectively connected to the first drive transistor.
and first and second output transistors connected to the emitters of the second drive transistors, the emitters of which are commonly connected at the output point, and whose positive and negative polarities change to the bases of the first and second drive transistors. In the device that performs push-pull operation by applying an input signal, the first and second
A bias circuit is provided between the base of the output transistor and the output point via a switching element, and the bias circuit supplies a bias to the first or second output transistor to prevent their turn-off,
A low frequency amplifier characterized in that it is configured to operate in class mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6009784U JPS6029228Y2 (en) | 1984-04-24 | 1984-04-24 | low frequency amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6009784U JPS6029228Y2 (en) | 1984-04-24 | 1984-04-24 | low frequency amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59177214U true JPS59177214U (en) | 1984-11-27 |
| JPS6029228Y2 JPS6029228Y2 (en) | 1985-09-04 |
Family
ID=30190338
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6009784U Expired JPS6029228Y2 (en) | 1984-04-24 | 1984-04-24 | low frequency amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6029228Y2 (en) |
-
1984
- 1984-04-24 JP JP6009784U patent/JPS6029228Y2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6029228Y2 (en) | 1985-09-04 |
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