JPS5917624U - AGC circuit - Google Patents

AGC circuit

Info

Publication number
JPS5917624U
JPS5917624U JP10945782U JP10945782U JPS5917624U JP S5917624 U JPS5917624 U JP S5917624U JP 10945782 U JP10945782 U JP 10945782U JP 10945782 U JP10945782 U JP 10945782U JP S5917624 U JPS5917624 U JP S5917624U
Authority
JP
Japan
Prior art keywords
channel
operating range
agc circuit
agc
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10945782U
Other languages
Japanese (ja)
Inventor
安村 洋人
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP10945782U priority Critical patent/JPS5917624U/en
Publication of JPS5917624U publication Critical patent/JPS5917624U/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のAGC回路のブロック図、第2図は第1
図の動作を説明するグラフ、第3図は本考案のAGC回
路の一実施例のブロック図、第4図は第3図のAGC特
性を説明するグラフ、第5図及び第6図は第3図の他の
実施例のブロック図、第7図は第6図のAGC特性を説
明するグラフである。 図中符号18はチューナAGC回路、19゜23は選局
信号・電圧変換回路、24は中間周波レベル検出回路、
25はAGC補正回路、6゜21は選局装置、11はP
IFアンプ、12は映像検波器、14はAGC検波器で
ある。
Figure 1 is a block diagram of a conventional AGC circuit, and Figure 2 is a block diagram of a conventional AGC circuit.
3 is a block diagram of an embodiment of the AGC circuit of the present invention, FIG. 4 is a graph explaining the AGC characteristics of FIG. 3, and FIGS. FIG. 7 is a block diagram of another embodiment shown in the figure, and is a graph explaining the AGC characteristics of FIG. 6. In the figure, reference numeral 18 is a tuner AGC circuit, 19°23 is a tuning signal/voltage conversion circuit, 24 is an intermediate frequency level detection circuit,
25 is the AGC correction circuit, 6゜21 is the channel selection device, 11 is P
IF amplifier, 12 is a video detector, and 14 is an AGC detector.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)アンテナより入力される電波から選局されたチャ
ネルに同調した中間周波を形成し、所定の動作点を有す
るAGC信号に応じた利得で中間周波を出力するチュー
ナにおいて、前記チャネルを選局する選局手段と、前記
動作域を前記チャネルに対応して定めるべく前記動作域
を可変としたAGC回路とを具備し、チャネルに対応し
た動作域でチューナの利得を自動制御するよう構成した
ことを特徴とするAGC回路。
(1) In a tuner that forms an intermediate frequency tuned to a selected channel from radio waves input from an antenna and outputs the intermediate frequency with a gain according to an AGC signal having a predetermined operating point, selects the channel. and an AGC circuit whose operating range is variable to determine the operating range corresponding to the channel, and configured to automatically control the gain of the tuner in the operating range corresponding to the channel. An AGC circuit featuring:
(2)前記動作域を可変としたAGC回路として前記選
局手段に設けた選局信号、電圧変換手段で得た電圧そ変
化するよう構成した前記実用新案登録請求の範囲第1項
記載のAGC回路。
(2) The AGC circuit according to claim 1 of the utility model registration, wherein the AGC circuit has a variable operating range and is configured to change the channel selection signal provided in the channel selection means and the voltage obtained by the voltage conversion means. circuit.
(3)前記動作域を可変としたAGC回路として前記中
間周波のレベルに応じて補正すべ(AGC信号補正手段
を具備した前記実用新案登録請求の範囲第1項記載のA
GC回路。
(3) The AGC circuit with a variable operating range should be corrected according to the level of the intermediate frequency (A in accordance with claim 1 of the utility model registration claim, which is equipped with an AGC signal correction means).
GC circuit.
JP10945782U 1982-07-21 1982-07-21 AGC circuit Pending JPS5917624U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10945782U JPS5917624U (en) 1982-07-21 1982-07-21 AGC circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10945782U JPS5917624U (en) 1982-07-21 1982-07-21 AGC circuit

Publications (1)

Publication Number Publication Date
JPS5917624U true JPS5917624U (en) 1984-02-02

Family

ID=30254966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10945782U Pending JPS5917624U (en) 1982-07-21 1982-07-21 AGC circuit

Country Status (1)

Country Link
JP (1) JPS5917624U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5238805A (en) * 1975-09-23 1977-03-25 Casio Comput Co Ltd Receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5238805A (en) * 1975-09-23 1977-03-25 Casio Comput Co Ltd Receiver

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