JPS59166591U - stereo input circuit - Google Patents
stereo input circuitInfo
- Publication number
- JPS59166591U JPS59166591U JP5961183U JP5961183U JPS59166591U JP S59166591 U JPS59166591 U JP S59166591U JP 5961183 U JP5961183 U JP 5961183U JP 5961183 U JP5961183 U JP 5961183U JP S59166591 U JPS59166591 U JP S59166591U
- Authority
- JP
- Japan
- Prior art keywords
- input
- circuit
- output side
- input terminal
- buffer circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stereophonic Arrangements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のステレオ入力回路を示す回路図、第２図
は本考案によるステレオ入力回路の一実施例を示す回路
図、第３図ａ、 ｂはその実施例に使用するプラグと
連動スイッチ付の入力端子を簡略的に示す図である。
１．２・・・入力端子、３．４・・・第１第２バツフア
回路、５．６・・・第１第２音声増幅回路、８・・・連
動スイッチ。Figure 1 is a circuit diagram showing a conventional stereo input circuit, Figure 2 is a circuit diagram showing an embodiment of the stereo input circuit according to the present invention, and Figures 3a and b are plugs and interlocking switches used in that embodiment. FIG. 3 is a diagram schematically showing the attached input terminal. 1.2... Input terminal, 3.4... First and second buffer circuit, 5.6... First and second audio amplification circuit, 8... Interlocking switch.
Claims (1)
る一対の入力端子と、その一方の入力端子に入力側が接
続され出力側が第１の音声増幅回路に接続された第１バ
ッファ回路と、他方の上記入力端子に入力側が接続され
出力側が第２の音声増幅回路に接続された第２バッファ
回路と、前記他方の入力端子への音声信号の接続により
開放して前記第１バッファ回路の出力側と前記他方の入
力端子との間の信号路を遮断する連動スイッチとからな
るステレオ入力回路。a pair of input terminals into which left and right audio signals constituting the stereo are respectively introduced; a first buffer circuit whose input side is connected to one of the input terminals and whose output side is connected to the first audio amplification circuit; a second buffer circuit whose input side is connected to the input terminal and whose output side is connected to the second audio amplification circuit; and the output side of the first buffer circuit is opened by connecting the audio signal to the other input terminal, and the output side of the first buffer circuit is connected to the second audio amplifier circuit. A stereo input circuit consisting of an interlocking switch that blocks the signal path between the input terminal and the other input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5961183U JPS59166591U (en) | 1983-04-20 | 1983-04-20 | stereo input circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5961183U JPS59166591U (en) | 1983-04-20 | 1983-04-20 | stereo input circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59166591U true JPS59166591U (en) | 1984-11-08 |
Family
ID=30189852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5961183U Pending JPS59166591U (en) | 1983-04-20 | 1983-04-20 | stereo input circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59166591U (en) |
-
1983
- 1983-04-20 JP JP5961183U patent/JPS59166591U/en active Pending
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